2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
37 #define RC_ST0 0x0080 /* only for long double */
42 #define RC_XMM0 0x1000
43 #define RC_XMM1 0x2000
44 #define RC_XMM2 0x4000
45 #define RC_XMM3 0x8000
46 #define RC_XMM4 0x10000
47 #define RC_XMM5 0x20000
48 #define RC_XMM6 0x40000
49 #define RC_XMM7 0x80000
50 #define RC_IRET RC_RAX /* function return: integer register */
51 #define RC_LRET RC_RDX /* function return: second integer register */
52 #define RC_FRET RC_XMM0 /* function return: float register */
53 #define RC_QRET RC_XMM1 /* function return: second float register */
55 /* pretty names for the registers */
83 #define REX_BASE(reg) (((reg) >> 3) & 1)
84 #define REG_VALUE(reg) ((reg) & 7)
86 /* return registers for function */
87 #define REG_IRET TREG_RAX /* single word int return register */
88 #define REG_LRET TREG_RDX /* second word return register (for long long) */
89 #define REG_FRET TREG_XMM0 /* float return register */
90 #define REG_QRET TREG_XMM1 /* second float return register */
92 /* defined if function parameters must be evaluated in reverse order */
93 #define INVERT_FUNC_PARAMS
95 /* pointer size, in bytes */
98 /* long double size and alignment, in bytes */
99 #define LDOUBLE_SIZE 16
100 #define LDOUBLE_ALIGN 16
101 /* maximum alignment (for aligned attribute support) */
104 /******************************************************/
107 #define EM_TCC_TARGET EM_X86_64
109 /* relocation type for 32 bit data relocation */
110 #define R_DATA_32 R_X86_64_32
111 #define R_DATA_PTR R_X86_64_64
112 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
113 #define R_COPY R_X86_64_COPY
115 #define ELF_START_ADDR 0x400000
116 #define ELF_PAGE_SIZE 0x200000
118 /******************************************************/
119 #else /* ! TARGET_DEFS_ONLY */
120 /******************************************************/
124 ST_DATA
const int reg_classes
[NB_REGS
] = {
125 /* eax */ RC_INT
| RC_RAX
,
126 /* ecx */ RC_INT
| RC_RCX
,
127 /* edx */ RC_INT
| RC_RDX
,
141 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
142 /* xmm1 */ RC_FLOAT
| RC_XMM1
,
143 /* xmm2 */ RC_FLOAT
| RC_XMM2
,
144 /* xmm3 */ RC_FLOAT
| RC_XMM3
,
145 /* xmm4 */ RC_FLOAT
| RC_XMM4
,
146 /* xmm5 */ RC_FLOAT
| RC_XMM5
,
147 /* xmm6 an xmm7 are included so gv() can be used on them,
148 but they are not tagged with RC_FLOAT because they are
149 callee saved on Windows */
155 static unsigned long func_sub_sp_offset
;
156 static int func_ret_sub
;
158 /* XXX: make it faster ? */
163 if (ind1
> cur_text_section
->data_allocated
)
164 section_realloc(cur_text_section
, ind1
);
165 cur_text_section
->data
[ind
] = c
;
169 void o(unsigned int c
)
191 void gen_le64(int64_t c
)
203 void orex(int ll
, int r
, int r2
, int b
)
205 if ((r
& VT_VALMASK
) >= VT_CONST
)
207 if ((r2
& VT_VALMASK
) >= VT_CONST
)
209 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
210 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
214 /* output a symbol and patch all calls to it */
215 void gsym_addr(int t
, int a
)
219 ptr
= (int *)(cur_text_section
->data
+ t
);
220 n
= *ptr
; /* next value */
231 /* psym is used to put an instruction with a data field which is a
232 reference to a symbol. It is in fact the same as oad ! */
235 static int is64_type(int t
)
237 return ((t
& VT_BTYPE
) == VT_PTR
||
238 (t
& VT_BTYPE
) == VT_FUNC
||
239 (t
& VT_BTYPE
) == VT_LLONG
);
242 /* instruction + 4 bytes data. Return the address of the data */
243 ST_FUNC
int oad(int c
, int s
)
249 if (ind1
> cur_text_section
->data_allocated
)
250 section_realloc(cur_text_section
, ind1
);
251 *(int *)(cur_text_section
->data
+ ind
) = s
;
257 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
260 greloc(cur_text_section
, sym
, ind
, R_X86_64_32
);
264 /* output constant with relocation if 'r & VT_SYM' is true */
265 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
268 greloc(cur_text_section
, sym
, ind
, R_X86_64_64
);
272 /* output constant with relocation if 'r & VT_SYM' is true */
273 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
276 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
280 /* output got address with relocation */
281 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
283 #ifndef TCC_TARGET_PE
286 greloc(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
);
287 sr
= cur_text_section
->reloc
;
288 rel
= (ElfW(Rela
) *)(sr
->data
+ sr
->data_offset
- sizeof(ElfW(Rela
)));
291 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
292 get_tok_str(sym
->v
, NULL
), c
, r
,
293 cur_text_section
->data
[ind
-3],
294 cur_text_section
->data
[ind
-2],
295 cur_text_section
->data
[ind
-1]
297 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
301 /* we use add c, %xxx for displacement */
303 o(0xc0 + REG_VALUE(r
));
308 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
310 op_reg
= REG_VALUE(op_reg
) << 3;
311 if ((r
& VT_VALMASK
) == VT_CONST
) {
312 /* constant memory reference */
315 gen_gotpcrel(r
, sym
, c
);
317 gen_addrpc32(r
, sym
, c
);
319 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
320 /* currently, we use only ebp as base */
322 /* short reference */
326 oad(0x85 | op_reg
, c
);
328 } else if ((r
& VT_VALMASK
) >= TREG_MEM
) {
330 g(0x80 | op_reg
| REG_VALUE(r
));
333 g(0x00 | op_reg
| REG_VALUE(r
));
336 g(0x00 | op_reg
| REG_VALUE(r
));
340 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
342 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
344 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
347 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
349 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
352 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
353 orex(1, r
, op_reg
, opcode
);
354 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
358 /* load 'r' from value 'sv' */
359 void load(int r
, SValue
*sv
)
361 int v
, t
, ft
, fc
, fr
;
366 sv
= pe_getimport(sv
, &v2
);
370 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
373 #ifndef TCC_TARGET_PE
374 /* we use indirect access via got */
375 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
376 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
377 /* use the result register as a temporal register */
378 int tr
= r
| TREG_MEM
;
380 /* we cannot use float registers as a temporal register */
381 tr
= get_reg(RC_INT
) | TREG_MEM
;
383 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
385 /* load from the temporal register */
393 if (v
== VT_LLOCAL
) {
395 v1
.r
= VT_LOCAL
| VT_LVAL
;
398 if (!(reg_classes
[fr
] & RC_INT
))
399 fr
= get_reg(RC_INT
);
403 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
405 r
= REG_VALUE(r
); /* movd */
406 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
407 b
= 0x7e0ff3; /* movq */
409 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
410 b
= 0xdb, r
= 5; /* fldt */
411 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
412 b
= 0xbe0f; /* movsbl */
413 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
414 b
= 0xb60f; /* movzbl */
415 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
416 b
= 0xbf0f; /* movswl */
417 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
418 b
= 0xb70f; /* movzwl */
420 assert(((ft
& VT_BTYPE
) == VT_INT
) || ((ft
& VT_BTYPE
) == VT_LLONG
)
421 || ((ft
& VT_BTYPE
) == VT_PTR
) || ((ft
& VT_BTYPE
) == VT_ENUM
)
422 || ((ft
& VT_BTYPE
) == VT_FUNC
));
427 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
430 gen_modrm(r
, fr
, sv
->sym
, fc
);
437 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
438 gen_addrpc32(fr
, sv
->sym
, fc
);
440 if (sv
->sym
->type
.t
& VT_STATIC
) {
442 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
443 gen_addrpc32(fr
, sv
->sym
, fc
);
446 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
447 gen_gotpcrel(r
, sv
->sym
, fc
);
450 } else if (is64_type(ft
)) {
451 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
454 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
457 } else if (v
== VT_LOCAL
) {
458 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
459 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
460 } else if (v
== VT_CMP
) {
462 if ((fc
& ~0x100) != TOK_NE
)
463 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
465 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
468 /* This was a float compare. If the parity bit is
469 set the result was unordered, meaning false for everything
470 except TOK_NE, and true for TOK_NE. */
472 o(0x037a + (REX_BASE(r
) << 8));
474 orex(0,r
,0, 0x0f); /* setxx %br */
476 o(0xc0 + REG_VALUE(r
));
477 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
480 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
481 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
484 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
486 if ((r
>= TREG_XMM0
) && (r
<= TREG_XMM7
)) {
488 /* gen_cvt_ftof(VT_DOUBLE); */
489 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
490 /* movsd -0x10(%rsp),%xmmN */
492 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
495 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
496 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
499 assert((ft
& VT_BTYPE
) == VT_DOUBLE
);
502 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
504 } else if (r
== TREG_ST0
) {
505 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
506 /* gen_cvt_ftof(VT_LDOUBLE); */
507 /* movsd %xmmN,-0x10(%rsp) */
509 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
511 o(0xf02444dd); /* fldl -0x10(%rsp) */
514 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
520 /* store register 'r' in lvalue 'v' */
521 void store(int r
, SValue
*v
)
525 /* store the REX prefix in this variable when PIC is enabled */
530 v
= pe_getimport(v
, &v2
);
535 fr
= v
->r
& VT_VALMASK
;
538 #ifndef TCC_TARGET_PE
539 /* we need to access the variable via got */
540 if (fr
== VT_CONST
&& (v
->r
& VT_SYM
)) {
541 /* mov xx(%rip), %r11 */
543 gen_gotpcrel(TREG_R11
, v
->sym
, v
->c
.ul
);
544 pic
= is64_type(bt
) ? 0x49 : 0x41;
548 /* XXX: incorrect if float reg to reg */
549 if (bt
== VT_FLOAT
) {
552 o(0x7e0f); /* movd */
554 } else if (bt
== VT_DOUBLE
) {
557 o(0xd60f); /* movq */
559 } else if (bt
== VT_LDOUBLE
) {
560 o(0xc0d9); /* fld %st(0) */
568 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
570 else if (is64_type(bt
))
576 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
581 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
582 gen_modrm64(op64
, r
, v
->r
, v
->sym
, fc
);
583 } else if (fr
!= r
) {
584 /* XXX: don't we really come here? */
586 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
589 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
590 gen_modrm(r
, v
->r
, v
->sym
, fc
);
591 } else if (fr
!= r
) {
592 /* XXX: don't we really come here? */
594 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
599 /* 'is_jmp' is '1' if it is a jump */
600 static void gcall_or_jmp(int is_jmp
)
603 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
&&
604 ((vtop
->r
& VT_SYM
) || (vtop
->c
.ll
-4) == (int)(vtop
->c
.ll
-4))) {
606 if (vtop
->r
& VT_SYM
) {
607 /* relocation case */
609 greloc(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PC32
);
611 greloc(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PLT32
);
614 /* put an empty PC32 relocation */
615 put_elf_reloc(symtab_section
, cur_text_section
,
616 ind
+ 1, R_X86_64_PC32
, 0);
618 oad(0xe8 + is_jmp
, vtop
->c
.ul
- 4); /* call/jmp im */
620 /* otherwise, indirect call */
624 o(0xff); /* call/jmp *r */
625 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
629 #if defined(CONFIG_TCC_BCHECK)
630 #ifndef TCC_TARGET_PE
631 static addr_t func_bound_offset
;
632 static unsigned long func_bound_ind
;
635 static void gen_static_call(int v
)
637 Sym
*sym
= external_global_sym(v
, &func_old_type
, 0);
639 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
642 /* generate a bounded pointer addition */
643 ST_FUNC
void gen_bounded_ptr_add(void)
645 /* save all temporary registers */
648 /* prepare fast x86_64 function call */
650 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
654 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
657 /* do a fast function call */
658 gen_static_call(TOK___bound_ptr_add
);
660 /* returned pointer is in rax */
662 vtop
->r
= TREG_RAX
| VT_BOUNDED
;
665 /* relocation offset of the bounding function call point */
666 vtop
->c
.ull
= (cur_text_section
->reloc
->data_offset
- sizeof(ElfW(Rela
)));
669 /* patch pointer addition in vtop so that pointer dereferencing is
671 ST_FUNC
void gen_bounded_ptr_deref(void)
679 /* XXX: put that code in generic part of tcc */
680 if (!is_float(vtop
->type
.t
)) {
681 if (vtop
->r
& VT_LVAL_BYTE
)
683 else if (vtop
->r
& VT_LVAL_SHORT
)
687 size
= type_size(&vtop
->type
, &align
);
689 case 1: func
= TOK___bound_ptr_indir1
; break;
690 case 2: func
= TOK___bound_ptr_indir2
; break;
691 case 4: func
= TOK___bound_ptr_indir4
; break;
692 case 8: func
= TOK___bound_ptr_indir8
; break;
693 case 12: func
= TOK___bound_ptr_indir12
; break;
694 case 16: func
= TOK___bound_ptr_indir16
; break;
696 tcc_error("unhandled size when dereferencing bounded pointer");
701 sym
= external_global_sym(func
, &func_old_type
, 0);
703 put_extern_sym(sym
, NULL
, 0, 0);
705 /* patch relocation */
706 /* XXX: find a better solution ? */
708 rel
= (ElfW(Rela
) *)(cur_text_section
->reloc
->data
+ vtop
->c
.ull
);
709 rel
->r_info
= ELF64_R_INFO(sym
->c
, ELF64_R_TYPE(rel
->r_info
));
716 static const uint8_t arg_regs
[REGN
] = {
717 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
720 /* Prepare arguments in R10 and R11 rather than RCX and RDX
721 because gv() will not ever use these */
722 static int arg_prepare_reg(int idx
) {
723 if (idx
== 0 || idx
== 1)
724 /* idx=0: r10, idx=1: r11 */
727 return arg_regs
[idx
];
730 static int func_scratch
;
732 /* Generate function call. The function address is pushed first, then
733 all the parameters in call order. This functions pops all the
734 parameters and the function address. */
736 void gen_offs_sp(int b
, int r
, int d
)
738 orex(1,0,r
& 0x100 ? 0 : r
, b
);
740 o(0x2444 | (REG_VALUE(r
) << 3));
743 o(0x2484 | (REG_VALUE(r
) << 3));
748 /* Return the number of registers needed to return the struct, or 0 if
749 returning via struct pointer. */
750 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
754 *ret_align
= 1; // Never have to re-align return values for x86-64
755 size
= type_size(vt
, &align
);
759 } else if (size
> 4) {
762 } else if (size
> 2) {
765 } else if (size
> 1) {
774 static int is_sse_float(int t
) {
777 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
780 int gfunc_arg_size(CType
*type
) {
782 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
784 return type_size(type
, &align
);
787 void gfunc_call(int nb_args
)
789 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
792 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
795 /* for struct arguments, we need to call memcpy and the function
796 call breaks register passing arguments we are preparing.
797 So, we process arguments which will be passed by stack first. */
798 struct_size
= args_size
;
799 for(i
= 0; i
< nb_args
; i
++) {
804 bt
= (sv
->type
.t
& VT_BTYPE
);
805 size
= gfunc_arg_size(&sv
->type
);
808 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
810 if (bt
== VT_STRUCT
) {
811 /* align to stack align size */
812 size
= (size
+ 15) & ~15;
813 /* generate structure store */
815 gen_offs_sp(0x8d, r
, struct_size
);
818 /* generate memcpy call */
819 vset(&sv
->type
, r
| VT_LVAL
, 0);
823 } else if (bt
== VT_LDOUBLE
) {
825 gen_offs_sp(0xdb, 0x107, struct_size
);
830 if (func_scratch
< struct_size
)
831 func_scratch
= struct_size
;
834 struct_size
= args_size
;
836 for(i
= 0; i
< nb_args
; i
++) {
838 bt
= (vtop
->type
.t
& VT_BTYPE
);
840 size
= gfunc_arg_size(&vtop
->type
);
842 /* align to stack align size */
843 size
= (size
+ 15) & ~15;
846 gen_offs_sp(0x8d, d
, struct_size
);
847 gen_offs_sp(0x89, d
, arg
*8);
849 d
= arg_prepare_reg(arg
);
850 gen_offs_sp(0x8d, d
, struct_size
);
854 if (is_sse_float(vtop
->type
.t
)) {
855 gv(RC_XMM0
); /* only use one float register */
857 /* movq %xmm0, j*8(%rsp) */
858 gen_offs_sp(0xd60f66, 0x100, arg
*8);
860 /* movaps %xmm0, %xmmN */
862 o(0xc0 + (arg
<< 3));
863 d
= arg_prepare_reg(arg
);
864 /* mov %xmm0, %rxx */
867 o(0xc0 + REG_VALUE(d
));
870 if (bt
== VT_STRUCT
) {
871 vtop
->type
.ref
= NULL
;
872 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
873 : size
> 1 ? VT_SHORT
: VT_BYTE
;
878 gen_offs_sp(0x89, r
, arg
*8);
880 d
= arg_prepare_reg(arg
);
881 orex(1,d
,r
,0x89); /* mov */
882 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
890 /* Copy R10 and R11 into RCX and RDX, respectively */
892 o(0xd1894c); /* mov %r10, %rcx */
894 o(0xda894c); /* mov %r11, %rdx */
903 #define FUNC_PROLOG_SIZE 11
905 /* generate function prolog of type 't' */
906 void gfunc_prolog(CType
*func_type
)
908 int addr
, reg_param_index
, bt
, size
;
917 ind
+= FUNC_PROLOG_SIZE
;
918 func_sub_sp_offset
= ind
;
921 sym
= func_type
->ref
;
923 /* if the function returns a structure, then add an
924 implicit pointer parameter */
926 func_var
= (sym
->c
== FUNC_ELLIPSIS
);
927 size
= gfunc_arg_size(&func_vt
);
929 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
935 /* define parameters */
936 while ((sym
= sym
->next
) != NULL
) {
938 bt
= type
->t
& VT_BTYPE
;
939 size
= gfunc_arg_size(type
);
941 if (reg_param_index
< REGN
) {
942 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
944 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
| VT_REF
, addr
);
946 if (reg_param_index
< REGN
) {
947 /* save arguments passed by register */
948 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
949 o(0xd60f66); /* movq */
950 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
952 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
955 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
, addr
);
961 while (reg_param_index
< REGN
) {
962 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
963 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
970 /* generate function epilog */
971 void gfunc_epilog(void)
976 if (func_ret_sub
== 0) {
981 g(func_ret_sub
>> 8);
985 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
986 /* align local size to word & save local variables */
987 v
= (func_scratch
+ -loc
+ 15) & -16;
990 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
991 oad(0xb8, v
); /* mov stacksize, %eax */
992 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
993 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
994 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
996 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
997 o(0xec8148); /* sub rsp, stacksize */
1001 cur_text_section
->data_offset
= saved_ind
;
1002 pe_add_unwind_data(ind
, saved_ind
, v
);
1003 ind
= cur_text_section
->data_offset
;
1008 static void gadd_sp(int val
)
1010 if (val
== (char)val
) {
1014 oad(0xc48148, val
); /* add $xxx, %rsp */
1018 typedef enum X86_64_Mode
{
1021 x86_64_mode_integer
,
1026 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
)
1030 else if (a
== x86_64_mode_none
)
1032 else if (b
== x86_64_mode_none
)
1034 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
1035 return x86_64_mode_memory
;
1036 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
1037 return x86_64_mode_integer
;
1038 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
1039 return x86_64_mode_memory
;
1041 return x86_64_mode_sse
;
1044 static X86_64_Mode
classify_x86_64_inner(CType
*ty
)
1049 switch (ty
->t
& VT_BTYPE
) {
1050 case VT_VOID
: return x86_64_mode_none
;
1059 case VT_ENUM
: return x86_64_mode_integer
;
1062 case VT_DOUBLE
: return x86_64_mode_sse
;
1064 case VT_LDOUBLE
: return x86_64_mode_x87
;
1070 if (f
->next
&& (f
->c
== f
->next
->c
))
1071 return x86_64_mode_memory
;
1073 mode
= x86_64_mode_none
;
1074 for (; f
; f
= f
->next
)
1075 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
1083 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
)
1086 int size
, align
, ret_t
= 0;
1088 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
1093 mode
= x86_64_mode_integer
;
1095 size
= type_size(ty
, &align
);
1096 *psize
= (size
+ 7) & ~7;
1097 *palign
= (align
+ 7) & ~7;
1100 mode
= x86_64_mode_memory
;
1102 mode
= classify_x86_64_inner(ty
);
1104 case x86_64_mode_integer
:
1110 ret_t
= (size
> 4) ? VT_LLONG
: VT_INT
;
1114 case x86_64_mode_x87
:
1119 case x86_64_mode_sse
:
1125 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1128 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1141 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
)
1143 /* This definition must be synced with stdarg.h */
1144 enum __va_arg_type
{
1145 __va_gen_reg
, __va_float_reg
, __va_stack
1147 int size
, align
, reg_count
;
1148 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1150 default: return __va_stack
;
1151 case x86_64_mode_integer
: return __va_gen_reg
;
1152 case x86_64_mode_sse
: return __va_float_reg
;
1156 /* Return the number of registers needed to return the struct, or 0 if
1157 returning via struct pointer. */
1158 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
1160 int size
, align
, reg_count
;
1161 *ret_align
= 1; // Never have to re-align return values for x86-64
1163 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1167 static const uint8_t arg_regs
[REGN
] = {
1168 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1171 static int arg_prepare_reg(int idx
) {
1172 if (idx
== 2 || idx
== 3)
1173 /* idx=2: r10, idx=3: r11 */
1176 return arg_regs
[idx
];
1179 /* Generate function call. The function address is pushed first, then
1180 all the parameters in call order. This functions pops all the
1181 parameters and the function address. */
1182 void gfunc_call(int nb_args
)
1186 int size
, align
, r
, args_size
, stack_adjust
, run_start
, run_end
, i
, reg_count
;
1187 int nb_reg_args
= 0;
1188 int nb_sse_args
= 0;
1189 int sse_reg
, gen_reg
;
1191 /* calculate the number of integer/float register arguments */
1192 for(i
= 0; i
< nb_args
; i
++) {
1193 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1194 if (mode
== x86_64_mode_sse
)
1195 nb_sse_args
+= reg_count
;
1196 else if (mode
== x86_64_mode_integer
)
1197 nb_reg_args
+= reg_count
;
1200 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1201 and ended by a 16-byte aligned argument. This is because, from the point of view of
1202 the callee, argument alignment is computed from the bottom up. */
1203 /* for struct arguments, we need to call memcpy and the function
1204 call breaks register passing arguments we are preparing.
1205 So, we process arguments which will be passed by stack first. */
1206 gen_reg
= nb_reg_args
;
1207 sse_reg
= nb_sse_args
;
1210 while (run_start
!= nb_args
) {
1211 int run_gen_reg
= gen_reg
, run_sse_reg
= sse_reg
;
1215 for(i
= run_start
; (i
< nb_args
) && (run_end
== nb_args
); i
++) {
1216 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1218 case x86_64_mode_memory
:
1219 case x86_64_mode_x87
:
1224 stack_adjust
+= size
;
1227 case x86_64_mode_sse
:
1228 sse_reg
-= reg_count
;
1229 if (sse_reg
+ reg_count
> 8) goto stack_arg
;
1232 case x86_64_mode_integer
:
1233 gen_reg
-= reg_count
;
1234 if (gen_reg
+ reg_count
> REGN
) goto stack_arg
;
1236 default: break; /* nothing to be done for x86_64_mode_none */
1240 gen_reg
= run_gen_reg
;
1241 sse_reg
= run_sse_reg
;
1243 /* adjust stack to align SSE boundary */
1244 if (stack_adjust
&= 15) {
1245 /* fetch cpu flag before the following sub will change the value */
1246 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1249 stack_adjust
= 16 - stack_adjust
;
1251 oad(0xec81, stack_adjust
); /* sub $xxx, %rsp */
1252 args_size
+= stack_adjust
;
1255 for(i
= run_start
; i
< run_end
;) {
1256 /* Swap argument to top, it will possibly be changed here,
1257 and might use more temps. At the end of the loop we keep
1258 in on the stack and swap it back to its original position
1259 if it is a register. */
1260 SValue tmp
= vtop
[0];
1264 mode
= classify_x86_64_arg(&vtop
->type
, NULL
, &size
, &align
, ®_count
);
1267 switch (vtop
->type
.t
& VT_BTYPE
) {
1269 if (mode
== x86_64_mode_sse
) {
1271 sse_reg
-= reg_count
;
1274 } else if (mode
== x86_64_mode_integer
) {
1276 gen_reg
-= reg_count
;
1282 /* allocate the necessary size on stack */
1284 oad(0xec81, size
); /* sub $xxx, %rsp */
1285 /* generate structure store */
1286 r
= get_reg(RC_INT
);
1287 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1288 o(0xe0 + REG_VALUE(r
));
1289 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1302 assert(mode
== x86_64_mode_sse
);
1306 o(0x50); /* push $rax */
1307 /* movq %xmmN, (%rsp) */
1309 o(0x04 + REG_VALUE(r
)*8);
1318 assert(mode
== x86_64_mode_integer
);
1320 /* XXX: implicit cast ? */
1321 if (gen_reg
> REGN
) {
1324 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1332 /* And swap the argument back to it's original position. */
1339 assert((vtop
->type
.t
== tmp
.type
.t
) && (vtop
->r
== tmp
.r
));
1348 /* handle 16 byte aligned arguments at end of run */
1349 run_start
= i
= run_end
;
1350 while (i
< nb_args
) {
1351 /* Rotate argument to top since it will always be popped */
1352 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1358 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1360 oad(0xec8148, size
); /* sub $xxx, %rsp */
1361 o(0x7cdb); /* fstpt 0(%rsp) */
1366 assert(mode
== x86_64_mode_memory
);
1368 /* allocate the necessary size on stack */
1370 oad(0xec81, size
); /* sub $xxx, %rsp */
1371 /* generate structure store */
1372 r
= get_reg(RC_INT
);
1373 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1374 o(0xe0 + REG_VALUE(r
));
1375 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1386 /* XXX This should be superfluous. */
1387 save_regs(0); /* save used temporary registers */
1389 /* then, we prepare register passing arguments.
1390 Note that we cannot set RDX and RCX in this loop because gv()
1391 may break these temporary registers. Let's use R10 and R11
1393 assert(gen_reg
<= REGN
);
1394 assert(sse_reg
<= 8);
1395 for(i
= 0; i
< nb_args
; i
++) {
1396 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1397 /* Alter stack entry type so that gv() knows how to treat it */
1399 if (mode
== x86_64_mode_sse
) {
1400 if (reg_count
== 2) {
1402 gv(RC_FRET
); /* Use pair load into xmm0 & xmm1 */
1403 if (sse_reg
) { /* avoid redundant movaps %xmm0, %xmm0 */
1404 /* movaps %xmm0, %xmmN */
1406 o(0xc0 + (sse_reg
<< 3));
1407 /* movaps %xmm1, %xmmN */
1409 o(0xc1 + ((sse_reg
+1) << 3));
1412 assert(reg_count
== 1);
1414 /* Load directly to register */
1415 gv(RC_XMM0
<< sse_reg
);
1417 } else if (mode
== x86_64_mode_integer
) {
1419 /* XXX: implicit cast ? */
1420 gen_reg
-= reg_count
;
1422 int d
= arg_prepare_reg(gen_reg
);
1423 orex(1,d
,r
,0x89); /* mov */
1424 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
1425 if (reg_count
== 2) {
1426 d
= arg_prepare_reg(gen_reg
+1);
1427 orex(1,d
,vtop
->r2
,0x89); /* mov */
1428 o(0xc0 + REG_VALUE(vtop
->r2
) * 8 + REG_VALUE(d
));
1433 assert(gen_reg
== 0);
1434 assert(sse_reg
== 0);
1436 /* We shouldn't have many operands on the stack anymore, but the
1437 call address itself is still there, and it might be in %eax
1438 (or edx/ecx) currently, which the below writes would clobber.
1439 So evict all remaining operands here. */
1442 /* Copy R10 and R11 into RDX and RCX, respectively */
1443 if (nb_reg_args
> 2) {
1444 o(0xd2894c); /* mov %r10, %rdx */
1445 if (nb_reg_args
> 3) {
1446 o(0xd9894c); /* mov %r11, %rcx */
1450 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1458 #define FUNC_PROLOG_SIZE 11
1460 static void push_arg_reg(int i
) {
1462 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1465 /* generate function prolog of type 't' */
1466 void gfunc_prolog(CType
*func_type
)
1469 int i
, addr
, align
, size
, reg_count
;
1470 int param_addr
= 0, reg_param_index
, sse_param_index
;
1474 sym
= func_type
->ref
;
1475 addr
= PTR_SIZE
* 2;
1477 ind
+= FUNC_PROLOG_SIZE
;
1478 func_sub_sp_offset
= ind
;
1481 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
1482 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1483 seen_reg_num
= seen_sse_num
= 0;
1484 /* frame pointer and return address */
1485 seen_stack_size
= PTR_SIZE
* 2;
1486 /* count the number of seen parameters */
1487 sym
= func_type
->ref
;
1488 while ((sym
= sym
->next
) != NULL
) {
1490 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1494 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1497 case x86_64_mode_integer
:
1498 if (seen_reg_num
+ reg_count
<= 8) {
1499 seen_reg_num
+= reg_count
;
1506 case x86_64_mode_sse
:
1507 if (seen_sse_num
+ reg_count
<= 8) {
1508 seen_sse_num
+= reg_count
;
1518 /* movl $0x????????, -0x10(%rbp) */
1520 gen_le32(seen_reg_num
* 8);
1521 /* movl $0x????????, -0xc(%rbp) */
1523 gen_le32(seen_sse_num
* 16 + 48);
1524 /* movl $0x????????, -0x8(%rbp) */
1526 gen_le32(seen_stack_size
);
1528 /* save all register passing arguments */
1529 for (i
= 0; i
< 8; i
++) {
1531 o(0xd60f66); /* movq */
1532 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1533 /* movq $0, loc+8(%rbp) */
1538 for (i
= 0; i
< REGN
; i
++) {
1539 push_arg_reg(REGN
-1-i
);
1543 sym
= func_type
->ref
;
1544 reg_param_index
= 0;
1545 sse_param_index
= 0;
1547 /* if the function returns a structure, then add an
1548 implicit pointer parameter */
1549 func_vt
= sym
->type
;
1550 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1551 if (mode
== x86_64_mode_memory
) {
1552 push_arg_reg(reg_param_index
);
1556 /* define parameters */
1557 while ((sym
= sym
->next
) != NULL
) {
1559 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1561 case x86_64_mode_sse
:
1562 if (sse_param_index
+ reg_count
<= 8) {
1563 /* save arguments passed by register */
1564 loc
-= reg_count
* 8;
1566 for (i
= 0; i
< reg_count
; ++i
) {
1567 o(0xd60f66); /* movq */
1568 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1572 addr
= (addr
+ align
- 1) & -align
;
1575 sse_param_index
+= reg_count
;
1579 case x86_64_mode_memory
:
1580 case x86_64_mode_x87
:
1581 addr
= (addr
+ align
- 1) & -align
;
1586 case x86_64_mode_integer
: {
1587 if (reg_param_index
+ reg_count
<= REGN
) {
1588 /* save arguments passed by register */
1589 loc
-= reg_count
* 8;
1591 for (i
= 0; i
< reg_count
; ++i
) {
1592 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1596 addr
= (addr
+ align
- 1) & -align
;
1599 reg_param_index
+= reg_count
;
1603 default: break; /* nothing to be done for x86_64_mode_none */
1605 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1606 VT_LOCAL
| VT_LVAL
, param_addr
);
1609 #ifdef CONFIG_TCC_BCHECK
1610 /* leave some room for bound checking code */
1611 if (tcc_state
->do_bounds_check
) {
1612 func_bound_offset
= lbounds_section
->data_offset
;
1613 func_bound_ind
= ind
;
1614 oad(0xb8, 0); /* lbound section pointer */
1615 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1616 oad(0xb8, 0); /* call to function */
1621 /* generate function epilog */
1622 void gfunc_epilog(void)
1626 #ifdef CONFIG_TCC_BCHECK
1627 if (tcc_state
->do_bounds_check
1628 && func_bound_offset
!= lbounds_section
->data_offset
)
1634 /* add end of table info */
1635 bounds_ptr
= section_ptr_add(lbounds_section
, sizeof(addr_t
));
1638 /* generate bound local allocation */
1639 sym_data
= get_sym_ref(&char_pointer_type
, lbounds_section
,
1640 func_bound_offset
, lbounds_section
->data_offset
);
1642 ind
= func_bound_ind
;
1643 greloc(cur_text_section
, sym_data
, ind
+ 1, R_386_32
);
1645 gen_static_call(TOK___bound_local_new
);
1648 /* generate bound check local freeing */
1649 o(0x5250); /* save returned value, if any */
1650 greloc(cur_text_section
, sym_data
, ind
+ 1, R_386_32
);
1651 oad(0xb8, 0); /* mov xxx, %rax */
1652 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1653 gen_static_call(TOK___bound_local_delete
);
1654 o(0x585a); /* restore returned value, if any */
1657 o(0xc9); /* leave */
1658 if (func_ret_sub
== 0) {
1661 o(0xc2); /* ret n */
1663 g(func_ret_sub
>> 8);
1665 /* align local size to word & save local variables */
1666 v
= (-loc
+ 15) & -16;
1668 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1669 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1670 o(0xec8148); /* sub rsp, stacksize */
1677 /* generate a jump to a label */
1680 return psym(0xe9, t
);
1683 /* generate a jump to a fixed address */
1684 void gjmp_addr(int a
)
1692 oad(0xe9, a
- ind
- 5);
1696 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1697 int gtst(int inv
, int t
)
1701 v
= vtop
->r
& VT_VALMASK
;
1703 /* fast case : can jump directly since flags are set */
1704 if (vtop
->c
.i
& 0x100)
1706 /* This was a float compare. If the parity flag is set
1707 the result was unordered. For anything except != this
1708 means false and we don't jump (anding both conditions).
1709 For != this means true (oring both).
1710 Take care about inverting the test. We need to jump
1711 to our target if the result was unordered and test wasn't NE,
1712 otherwise if unordered we don't want to jump. */
1713 vtop
->c
.i
&= ~0x100;
1714 if (!inv
== (vtop
->c
.i
!= TOK_NE
))
1715 o(0x067a); /* jp +6 */
1719 t
= psym(0x8a, t
); /* jp t */
1723 t
= psym((vtop
->c
.i
- 16) ^ inv
, t
);
1724 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1725 /* && or || optimization */
1726 if ((v
& 1) == inv
) {
1727 /* insert vtop->c jump list in t */
1730 p
= (int *)(cur_text_section
->data
+ *p
);
1742 /* generate an integer binary operation */
1743 void gen_opi(int op
)
1748 ll
= is64_type(vtop
[-1].type
.t
);
1749 uu
= (vtop
[-1].type
.t
& VT_UNSIGNED
) != 0;
1750 cc
= (vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1754 case TOK_ADDC1
: /* add with carry generation */
1757 if (cc
&& (!ll
|| (int)vtop
->c
.ll
== vtop
->c
.ll
)) {
1764 /* XXX: generate inc and dec for smaller code ? */
1765 orex(ll
, r
, 0, 0x83);
1766 o(0xc0 | (opc
<< 3) | REG_VALUE(r
));
1769 orex(ll
, r
, 0, 0x81);
1770 oad(0xc0 | (opc
<< 3) | REG_VALUE(r
), c
);
1773 gv2(RC_INT
, RC_INT
);
1776 orex(ll
, r
, fr
, (opc
<< 3) | 0x01);
1777 o(0xc0 + REG_VALUE(r
) + REG_VALUE(fr
) * 8);
1780 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1786 case TOK_SUBC1
: /* sub with carry generation */
1789 case TOK_ADDC2
: /* add with carry use */
1792 case TOK_SUBC2
: /* sub with carry use */
1805 gv2(RC_INT
, RC_INT
);
1808 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1809 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
) * 8);
1821 opc
= 0xc0 | (opc
<< 3);
1827 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1828 o(opc
| REG_VALUE(r
));
1829 g(vtop
->c
.i
& (ll
? 63 : 31));
1831 /* we generate the shift in ecx */
1832 gv2(RC_INT
, RC_RCX
);
1834 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1835 o(opc
| REG_VALUE(r
));
1848 /* first operand must be in eax */
1849 /* XXX: need better constraint for second operand */
1850 gv2(RC_RAX
, RC_RCX
);
1855 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1856 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1857 o((uu
? 0xf0 : 0xf8) + REG_VALUE(fr
));
1858 if (op
== '%' || op
== TOK_UMOD
)
1870 void gen_opl(int op
)
1875 /* generate a floating point operation 'v = t1 op t2' instruction. The
1876 two operands are guaranted to have the same floating point type */
1877 /* XXX: need to use ST1 too */
1878 void gen_opf(int op
)
1880 int a
, ft
, fc
, swapped
, r
;
1882 (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1884 /* convert constants to memory references */
1885 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1890 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1893 /* must put at least one value in the floating point register */
1894 if ((vtop
[-1].r
& VT_LVAL
) &&
1895 (vtop
[0].r
& VT_LVAL
)) {
1901 /* swap the stack if needed so that t1 is the register and t2 is
1902 the memory reference */
1903 if (vtop
[-1].r
& VT_LVAL
) {
1907 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1908 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1909 /* load on stack second operand */
1910 load(TREG_ST0
, vtop
);
1911 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1912 if (op
== TOK_GE
|| op
== TOK_GT
)
1914 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1917 o(0xc9d9); /* fxch %st(1) */
1918 if (op
== TOK_EQ
|| op
== TOK_NE
)
1919 o(0xe9da); /* fucompp */
1921 o(0xd9de); /* fcompp */
1922 o(0xe0df); /* fnstsw %ax */
1924 o(0x45e480); /* and $0x45, %ah */
1925 o(0x40fC80); /* cmp $0x40, %ah */
1926 } else if (op
== TOK_NE
) {
1927 o(0x45e480); /* and $0x45, %ah */
1928 o(0x40f480); /* xor $0x40, %ah */
1930 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1931 o(0x05c4f6); /* test $0x05, %ah */
1934 o(0x45c4f6); /* test $0x45, %ah */
1941 /* no memory reference possible for long double operations */
1942 load(TREG_ST0
, vtop
);
1966 o(0xde); /* fxxxp %st, %st(1) */
1971 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1972 /* if saved lvalue, then we must reload it */
1975 if ((r
& VT_VALMASK
) == VT_LLOCAL
) {
1977 r
= get_reg(RC_INT
);
1979 v1
.r
= VT_LOCAL
| VT_LVAL
;
1985 if (op
== TOK_EQ
|| op
== TOK_NE
) {
1988 if (op
== TOK_LE
|| op
== TOK_LT
)
1990 if (op
== TOK_LE
|| op
== TOK_GE
) {
1991 op
= 0x93; /* setae */
1993 op
= 0x97; /* seta */
2001 assert(!(vtop
[-1].r
& VT_LVAL
));
2003 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
2005 if (op
== TOK_EQ
|| op
== TOK_NE
)
2006 o(0x2e0f); /* ucomisd */
2008 o(0x2f0f); /* comisd */
2010 if (vtop
->r
& VT_LVAL
) {
2011 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2013 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2018 vtop
->c
.i
= op
| 0x100;
2020 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
2038 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
2041 /* if saved lvalue, then we must reload it */
2042 if ((vtop
->r
& VT_VALMASK
) == VT_LLOCAL
) {
2044 r
= get_reg(RC_INT
);
2046 v1
.r
= VT_LOCAL
| VT_LVAL
;
2052 assert(!(vtop
[-1].r
& VT_LVAL
));
2054 assert(vtop
->r
& VT_LVAL
);
2059 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
2067 if (vtop
->r
& VT_LVAL
) {
2068 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2070 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2078 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2079 and 'long long' cases. */
2080 void gen_cvt_itof(int t
)
2082 if ((t
& VT_BTYPE
) == VT_LDOUBLE
) {
2085 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2086 /* signed long long to float/double/long double (unsigned case
2087 is handled generically) */
2088 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2089 o(0x242cdf); /* fildll (%rsp) */
2090 o(0x08c48348); /* add $8, %rsp */
2091 } else if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2092 (VT_INT
| VT_UNSIGNED
)) {
2093 /* unsigned int to float/double/long double */
2094 o(0x6a); /* push $0 */
2096 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2097 o(0x242cdf); /* fildll (%rsp) */
2098 o(0x10c48348); /* add $16, %rsp */
2100 /* int to float/double/long double */
2101 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2102 o(0x2404db); /* fildl (%rsp) */
2103 o(0x08c48348); /* add $8, %rsp */
2107 int r
= get_reg(RC_FLOAT
);
2109 o(0xf2 + ((t
& VT_BTYPE
) == VT_FLOAT
?1:0));
2110 if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2111 (VT_INT
| VT_UNSIGNED
) ||
2112 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2116 o(0xc0 + (vtop
->r
& VT_VALMASK
) + REG_VALUE(r
)*8); /* cvtsi2sd */
2121 /* convert from one floating point type to another */
2122 void gen_cvt_ftof(int t
)
2130 if (bt
== VT_FLOAT
) {
2132 if (tbt
== VT_DOUBLE
) {
2133 o(0x140f); /* unpcklps */
2134 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2135 o(0x5a0f); /* cvtps2pd */
2136 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2137 } else if (tbt
== VT_LDOUBLE
) {
2139 /* movss %xmm0,-0x10(%rsp) */
2141 o(0x44 + REG_VALUE(vtop
->r
)*8);
2143 o(0xf02444d9); /* flds -0x10(%rsp) */
2146 } else if (bt
== VT_DOUBLE
) {
2148 if (tbt
== VT_FLOAT
) {
2149 o(0x140f66); /* unpcklpd */
2150 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2151 o(0x5a0f66); /* cvtpd2ps */
2152 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2153 } else if (tbt
== VT_LDOUBLE
) {
2155 /* movsd %xmm0,-0x10(%rsp) */
2157 o(0x44 + REG_VALUE(vtop
->r
)*8);
2159 o(0xf02444dd); /* fldl -0x10(%rsp) */
2165 r
= get_reg(RC_FLOAT
);
2166 if (tbt
== VT_DOUBLE
) {
2167 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2168 /* movsd -0x10(%rsp),%xmm0 */
2170 o(0x44 + REG_VALUE(r
)*8);
2173 } else if (tbt
== VT_FLOAT
) {
2174 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2175 /* movss -0x10(%rsp),%xmm0 */
2177 o(0x44 + REG_VALUE(r
)*8);
2184 /* convert fp to int 't' type */
2185 void gen_cvt_ftoi(int t
)
2187 int ft
, bt
, size
, r
;
2190 if (bt
== VT_LDOUBLE
) {
2191 gen_cvt_ftof(VT_DOUBLE
);
2201 r
= get_reg(RC_INT
);
2202 if (bt
== VT_FLOAT
) {
2204 } else if (bt
== VT_DOUBLE
) {
2209 orex(size
== 8, r
, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2210 o(0xc0 + REG_VALUE(vtop
->r
) + REG_VALUE(r
)*8);
2214 /* computed goto support */
2221 /* Save the stack pointer onto the stack and return the location of its address */
2222 ST_FUNC
void gen_vla_sp_save(int addr
) {
2223 /* mov %rsp,addr(%rbp)*/
2224 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2227 /* Restore the SP from a location on the stack */
2228 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2229 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2232 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2233 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2234 #ifdef TCC_TARGET_PE
2235 /* alloca does more than just adjust %rsp on Windows */
2236 vpush_global_sym(&func_old_type
, TOK_alloca
);
2237 vswap(); /* Move alloca ref past allocation size */
2239 vset(type
, REG_IRET
, 0);
2242 r
= gv(RC_INT
); /* allocation size */
2245 o(0xe0 | REG_VALUE(r
));
2246 /* We align to 16 bytes rather than align */
2251 o(0xe0 | REG_VALUE(r
));
2258 /* end of x86-64 code generator */
2259 /*************************************************************/
2260 #endif /* ! TARGET_DEFS_ONLY */
2261 /******************************************************/