2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
37 #define RC_ST0 0x0020 /* only for long double */
40 #define RC_XMM0 0x0100
41 #define RC_XMM1 0x0200
42 #define RC_XMM2 0x0400
43 #define RC_XMM3 0x0800
44 #define RC_XMM4 0x1000
45 #define RC_XMM5 0x2000
46 #define RC_XMM6 0x4000
47 #define RC_XMM7 0x8000
48 #define RC_RSI 0x10000
49 #define RC_RDI 0x20000
50 #define RC_INT1 0x40000 /* function_pointer */
51 #define RC_INT2 0x80000
52 #define RC_RBX 0x100000
53 #define RC_R10 0x200000
54 #define RC_R11 0x400000
55 #define RC_R12 0x800000
56 #define RC_R13 0x1000000
57 #define RC_R14 0x2000000
58 #define RC_R15 0x4000000
59 #define RC_IRET RC_RAX /* function return: integer register */
60 #define RC_LRET RC_RDX /* function return: second integer register */
61 #define RC_FRET RC_XMM0 /* function return: float register */
62 #define RC_QRET RC_XMM1 /* function return: second float register */
63 #define RC_MASK (RC_INT|RC_INT1|RC_INT2|RC_FLOAT)
65 /* pretty names for the registers */
91 #define REX_BASE(reg) (((reg) >> 3) & 1)
92 #define REG_VALUE(reg) ((reg) & 7)
95 /* return registers for function */
96 #define REG_IRET TREG_RAX /* single word int return register */
97 #define REG_LRET TREG_RDX /* second word return register (for long long) */
98 #define REG_FRET TREG_XMM0 /* float return register */
99 #define REG_QRET TREG_XMM1 /* second float return register */
101 /* defined if function parameters must be evaluated in reverse order */
102 #define INVERT_FUNC_PARAMS
104 /* pointer size, in bytes */
107 /* long double size and alignment, in bytes */
108 #define LDOUBLE_SIZE 16
109 #define LDOUBLE_ALIGN 16
110 /* maximum alignment (for aligned attribute support) */
113 /******************************************************/
116 #define EM_TCC_TARGET EM_X86_64
118 /* relocation type for 32 bit data relocation */
119 #define R_DATA_32 R_X86_64_32
120 #define R_DATA_PTR R_X86_64_64
121 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
122 #define R_COPY R_X86_64_COPY
124 #define ELF_START_ADDR 0x400000
125 #define ELF_PAGE_SIZE 0x200000
127 /******************************************************/
128 #else /* ! TARGET_DEFS_ONLY */
129 /******************************************************/
133 ST_DATA
const int reg_classes
[NB_REGS
] = {
134 /* eax */ RC_INT
|RC_RAX
|RC_INT2
,
135 /* ecx */ RC_INT
|RC_RCX
|RC_INT2
,
136 /* edx */ RC_INT
|RC_RDX
,
137 RC_INT
|RC_INT1
|RC_INT2
|RC_RBX
,
142 RC_INT
|RC_R8
|RC_INT2
,
143 RC_INT
|RC_R9
|RC_INT2
,
144 RC_INT
|RC_INT1
|RC_INT2
|RC_R10
,
145 RC_INT
|RC_INT1
|RC_INT2
|RC_R11
,
146 RC_INT
|RC_INT1
|RC_INT2
|RC_R12
,
147 RC_INT
|RC_INT1
|RC_INT2
|RC_R13
,
148 RC_INT
|RC_INT1
|RC_INT2
|RC_R14
,
149 RC_INT
|RC_INT1
|RC_INT2
|RC_R15
,
150 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
160 static unsigned long func_sub_sp_offset
;
161 static int func_ret_sub
;
163 /* XXX: make it faster ? */
168 if (ind1
> cur_text_section
->data_allocated
)
169 section_realloc(cur_text_section
, ind1
);
170 cur_text_section
->data
[ind
] = c
;
174 void o(unsigned int c
)
196 void gen_le64(int64_t c
)
208 void orex(int ll
, int r
, int r2
, int b
)
210 if ((r
& VT_VALMASK
) >= VT_CONST
)
212 if ((r2
& VT_VALMASK
) >= VT_CONST
)
214 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
215 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
219 /* output a symbol and patch all calls to it */
220 void gsym_addr(int t
, int a
)
224 ptr
= (int *)(cur_text_section
->data
+ t
);
225 n
= *ptr
; /* next value */
236 /* psym is used to put an instruction with a data field which is a
237 reference to a symbol. It is in fact the same as oad ! */
240 static int is64_type(int t
)
242 return ((t
& VT_BTYPE
) == VT_PTR
||
243 (t
& VT_BTYPE
) == VT_FUNC
||
244 (t
& VT_BTYPE
) == VT_LLONG
);
247 /* instruction + 4 bytes data. Return the address of the data */
248 ST_FUNC
int oad(int c
, int s
)
254 if (ind1
> cur_text_section
->data_allocated
)
255 section_realloc(cur_text_section
, ind1
);
256 *(int *)(cur_text_section
->data
+ ind
) = s
;
262 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
265 greloc(cur_text_section
, sym
, ind
, R_X86_64_32
);
269 /* output constant with relocation if 'r & VT_SYM' is true */
270 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
273 greloc(cur_text_section
, sym
, ind
, R_X86_64_64
);
277 /* output constant with relocation if 'r & VT_SYM' is true */
278 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
281 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
285 /* output got address with relocation */
286 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
288 #ifndef TCC_TARGET_PE
291 greloc(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
);
292 sr
= cur_text_section
->reloc
;
293 rel
= (ElfW(Rela
) *)(sr
->data
+ sr
->data_offset
- sizeof(ElfW(Rela
)));
296 printf("picpic: %s %x %x | %02x %02x %02x\n", get_tok_str(sym
->v
, NULL
), c
, r
,
297 cur_text_section
->data
[ind
-3],
298 cur_text_section
->data
[ind
-2],
299 cur_text_section
->data
[ind
-1]
301 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
305 /* we use add c, %xxx for displacement */
307 o(0xc0 + REG_VALUE(r
));
312 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
314 op_reg
= REG_VALUE(op_reg
) << 3;
315 if ((r
& VT_VALMASK
) == VT_CONST
) {
316 /* constant memory reference */
319 gen_gotpcrel(r
, sym
, c
);
321 gen_addrpc32(r
, sym
, c
);
323 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
324 /* currently, we use only ebp as base */
326 /* short reference */
330 oad(0x85 | op_reg
, c
);
332 } else if (r
& TREG_MEM
) {
334 g(0x80 | op_reg
| REG_VALUE(r
));
337 g(0x00 | op_reg
| REG_VALUE(r
));
340 g(0x00 | op_reg
| REG_VALUE(r
));
344 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
346 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
348 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
351 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
353 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
356 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
357 orex(1, r
, op_reg
, opcode
);
358 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
362 /* load 'r' from value 'sv' */
363 void load(int r
, SValue
*sv
)
365 int v
, t
, ft
, fc
, fr
;
370 sv
= pe_getimport(sv
, &v2
);
374 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
377 #ifndef TCC_TARGET_PE
378 /* we use indirect access via got */
379 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
380 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
381 /* use the result register as a temporal register */
382 int tr
= r
| TREG_MEM
;
384 /* we cannot use float registers as a temporal register */
385 tr
= get_reg(RC_INT
) | TREG_MEM
;
387 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
389 /* load from the temporal register */
397 if (v
== VT_LLOCAL
) {
399 v1
.r
= VT_LOCAL
| VT_LVAL
;
402 if (!(reg_classes
[fr
] & RC_INT
))
403 fr
= get_reg(RC_INT
);
407 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
409 r
= REG_VALUE(r
); /* movd */
410 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
411 b
= 0x7e0ff3; /* movq */
413 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
414 b
= 0xdb, r
= 5; /* fldt */
415 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
416 b
= 0xbe0f; /* movsbl */
417 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
418 b
= 0xb60f; /* movzbl */
419 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
420 b
= 0xbf0f; /* movswl */
421 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
422 b
= 0xb70f; /* movzwl */
424 assert(((ft
& VT_BTYPE
) == VT_INT
) || ((ft
& VT_BTYPE
) == VT_LLONG
)
425 || ((ft
& VT_BTYPE
) == VT_PTR
) || ((ft
& VT_BTYPE
) == VT_ENUM
)
426 || ((ft
& VT_BTYPE
) == VT_FUNC
));
431 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
434 gen_modrm(r
, fr
, sv
->sym
, fc
);
441 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
442 gen_addrpc32(fr
, sv
->sym
, fc
);
444 if (sv
->sym
->type
.t
& VT_STATIC
) {
446 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
447 gen_addrpc32(fr
, sv
->sym
, fc
);
450 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
451 gen_gotpcrel(r
, sv
->sym
, fc
);
454 } else if (is64_type(ft
)) {
455 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
458 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
461 } else if (v
== VT_LOCAL
) {
462 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
463 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
464 } else if (v
== VT_CMP
) {
466 if ((fc
& ~0x100) != TOK_NE
)
467 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
469 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
472 /* This was a float compare. If the parity bit is
473 set the result was unordered, meaning false for everything
474 except TOK_NE, and true for TOK_NE. */
476 o(0x037a + (REX_BASE(r
) << 8));
478 orex(0,r
,0, 0x0f); /* setxx %br */
480 o(0xc0 + REG_VALUE(r
));
481 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
484 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
485 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
488 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
490 if (reg_classes
[r
] & RC_FLOAT
) {
492 /* gen_cvt_ftof(VT_DOUBLE); */
493 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
494 /* movsd -0x10(%rsp),%xmm0 */
496 o(0xf02444 + REG_VALUE(r
)*8);
497 }else if(reg_classes
[v
] & RC_FLOAT
){
499 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
502 } else if (r
== TREG_ST0
) {
503 assert(reg_classes
[v
] & RC_FLOAT
);
504 /* gen_cvt_ftof(VT_LDOUBLE); */
505 /* movsd %xmm0,-0x10(%rsp) */
507 o(0xf02444 + REG_VALUE(v
)*8);
508 o(0xf02444dd); /* fldl -0x10(%rsp) */
511 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
517 /* store register 'r' in lvalue 'v' */
518 void store(int r
, SValue
*sv
)
520 int fr
, bt
, ft
, fc
, ll
, v
;
524 sv
= pe_getimport(sv
, &v2
);
526 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
533 //#ifndef TCC_TARGET_PE
534 /* we need to access the variable via got */
535 // if (fr == VT_CONST && (v->r & VT_SYM)) {
536 /* mov xx(%rip), %r11 */
538 // gen_gotpcrel(TREG_R11, v->sym, v->c.ul);
539 //pic = is64_type(bt) ? 0x49 : 0x41;
543 /* XXX: incorrect if float reg to reg */
544 if (bt
== VT_FLOAT
) {
545 orex(0, fr
, r
, 0x110ff3); /* movss */
546 } else if (bt
== VT_DOUBLE
) {
547 orex(0, fr
, r
, 0x110ff2);/* movds */
548 } else if (bt
== VT_LDOUBLE
) {
549 o(0xc0d9); /* fld %st(0) */
550 orex(0, fr
, r
, 0xdb);/* fstpt */
555 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
556 orex(ll
, fr
, r
, 0x88);
558 orex(ll
, fr
, r
, 0x89);
561 if (v
== VT_CONST
|| v
== VT_LOCAL
|| (fr
& VT_LVAL
)) {
562 gen_modrm(r
, fr
, sv
->sym
, fc
);
564 /* XXX: don't we really come here? */
566 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8); /* mov r, fr */
570 /* 'is_jmp' is '1' if it is a jump */
571 static void gcall_or_jmp(int is_jmp
)
574 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
576 if (vtop
->r
& VT_SYM
) {
577 /* relocation case */
578 greloc(cur_text_section
, vtop
->sym
,
579 ind
+ 1, R_X86_64_PLT32
);
581 /* put an empty PC32 relocation */
582 put_elf_reloc(symtab_section
, cur_text_section
,
583 ind
+ 1, R_X86_64_PC32
, 0);
585 oad(0xe8 + is_jmp
, vtop
->c
.ul
- 4); /* call/jmp im */
587 /* otherwise, indirect call */
588 r
= get_reg(RC_INT1
);
590 orex(0, r
, 0, 0xff); /* REX call/jmp *r */
591 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
595 void struct_copy(SValue
*d
, SValue
*s
, SValue
*c
)
603 o(0xa4f3);// rep movsb
606 void gen_putz(SValue
*d
, int size
)
614 o(0xb8 + REG_VALUE(TREG_RCX
)); /* mov $xx, r */
623 static const uint8_t arg_regs
[REGN
] = {
624 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
627 /* Prepare arguments in R10 and R11 rather than RCX and RDX
628 because gv() will not ever use these */
629 static int arg_prepare_reg(int idx
) {
630 if (idx
== 0 || idx
== 1)
631 /* idx=0: r10, idx=1: r11 */
634 return arg_regs
[idx
];
637 static int func_scratch
;
639 /* Generate function call. The function address is pushed first, then
640 all the parameters in call order. This functions pops all the
641 parameters and the function address. */
643 void gen_offs_sp(int b
, int r
, int d
)
645 orex(1,0,r
& 0x100 ? 0 : r
, b
);
647 o(0x2444 | (REG_VALUE(r
) << 3));
650 o(0x2484 | (REG_VALUE(r
) << 3));
655 /* Return the number of registers needed to return the struct, or 0 if
656 returning via struct pointer. */
657 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
)
660 *ret_align
= 1; // Never have to re-align return values for x86-64
661 size
= type_size(vt
, &align
);
665 } else if (size
> 4) {
668 } else if (size
> 2) {
671 } else if (size
> 1) {
680 static int is_sse_float(int t
) {
683 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
686 int gfunc_arg_size(CType
*type
) {
688 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
690 return type_size(type
, &align
);
693 void gfunc_call(int nb_args
)
695 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
698 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
701 /* for struct arguments, we need to call memcpy and the function
702 call breaks register passing arguments we are preparing.
703 So, we process arguments which will be passed by stack first. */
704 struct_size
= args_size
;
705 for(i
= 0; i
< nb_args
; i
++) {
710 bt
= (sv
->type
.t
& VT_BTYPE
);
711 size
= gfunc_arg_size(&sv
->type
);
714 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
716 if (bt
== VT_STRUCT
) {
717 /* align to stack align size */
718 size
= (size
+ 15) & ~15;
719 /* generate structure store */
721 gen_offs_sp(0x8d, r
, struct_size
);
724 /* generate memcpy call */
725 vset(&sv
->type
, r
| VT_LVAL
, 0);
729 } else if (bt
== VT_LDOUBLE
) {
731 gen_offs_sp(0xdb, 0x107, struct_size
);
736 if (func_scratch
< struct_size
)
737 func_scratch
= struct_size
;
740 struct_size
= args_size
;
742 for(i
= 0; i
< nb_args
; i
++) {
744 bt
= (vtop
->type
.t
& VT_BTYPE
);
746 size
= gfunc_arg_size(&vtop
->type
);
748 /* align to stack align size */
749 size
= (size
+ 15) & ~15;
752 gen_offs_sp(0x8d, d
, struct_size
);
753 gen_offs_sp(0x89, d
, arg
*8);
755 d
= arg_prepare_reg(arg
);
756 gen_offs_sp(0x8d, d
, struct_size
);
760 if (is_sse_float(vtop
->type
.t
)) {
761 gv(RC_XMM0
); /* only use one float register */
763 /* movq %xmm0, j*8(%rsp) */
764 gen_offs_sp(0xd60f66, 0x100, arg
*8);
766 /* movaps %xmm0, %xmmN */
768 o(0xc0 + (arg
<< 3));
769 d
= arg_prepare_reg(arg
);
770 /* mov %xmm0, %rxx */
773 o(0xc0 + REG_VALUE(d
));
776 if (bt
== VT_STRUCT
) {
777 vtop
->type
.ref
= NULL
;
778 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
779 : size
> 1 ? VT_SHORT
: VT_BYTE
;
784 gen_offs_sp(0x89, r
, arg
*8);
786 d
= arg_prepare_reg(arg
);
787 orex(1,d
,r
,0x89); /* mov */
788 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
796 /* Copy R10 and R11 into RCX and RDX, respectively */
798 o(0xd1894c); /* mov %r10, %rcx */
800 o(0xda894c); /* mov %r11, %rdx */
809 #define FUNC_PROLOG_SIZE 11
811 /* generate function prolog of type 't' */
812 void gfunc_prolog(CType
*func_type
)
814 int addr
, reg_param_index
, bt
, size
;
823 ind
+= FUNC_PROLOG_SIZE
;
824 func_sub_sp_offset
= ind
;
827 sym
= func_type
->ref
;
829 /* if the function returns a structure, then add an
830 implicit pointer parameter */
832 func_var
= (sym
->c
== FUNC_ELLIPSIS
);
833 size
= gfunc_arg_size(&func_vt
);
835 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
841 /* define parameters */
842 while ((sym
= sym
->next
) != NULL
) {
844 bt
= type
->t
& VT_BTYPE
;
845 size
= gfunc_arg_size(type
);
847 if (reg_param_index
< REGN
) {
848 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
850 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
| VT_REF
, addr
);
852 if (reg_param_index
< REGN
) {
853 /* save arguments passed by register */
854 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
855 o(0xd60f66); /* movq */
856 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
858 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
861 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
, addr
);
867 while (reg_param_index
< REGN
) {
868 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
869 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
876 /* generate function epilog */
877 void gfunc_epilog(void)
882 if (func_ret_sub
== 0) {
887 g(func_ret_sub
>> 8);
891 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
892 /* align local size to word & save local variables */
893 v
= (func_scratch
+ -loc
+ 15) & -16;
896 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
897 oad(0xb8, v
); /* mov stacksize, %eax */
898 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
899 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
900 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
902 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
903 o(0xec8148); /* sub rsp, stacksize */
907 cur_text_section
->data_offset
= saved_ind
;
908 pe_add_unwind_data(ind
, saved_ind
, v
);
909 ind
= cur_text_section
->data_offset
;
914 static void gadd_sp(int val
)
916 if (val
== (char)val
) {
920 oad(0xc48148, val
); /* add $xxx, %rsp */
924 typedef enum X86_64_Mode
{
932 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
)
936 else if (a
== x86_64_mode_none
)
938 else if (b
== x86_64_mode_none
)
940 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
941 return x86_64_mode_memory
;
942 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
943 return x86_64_mode_integer
;
944 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
945 return x86_64_mode_memory
;
947 return x86_64_mode_sse
;
950 static X86_64_Mode
classify_x86_64_inner(CType
*ty
)
955 switch (ty
->t
& VT_BTYPE
) {
956 case VT_VOID
: return x86_64_mode_none
;
966 case VT_ENUM
: return x86_64_mode_integer
;
970 case VT_DOUBLE
: return x86_64_mode_sse
;
972 case VT_LDOUBLE
: return x86_64_mode_x87
;
978 if (f
->next
&& (f
->c
== f
->next
->c
))
979 return x86_64_mode_memory
;
981 mode
= x86_64_mode_none
;
982 for (f
= f
->next
; f
; f
= f
->next
)
983 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
991 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
)
994 int size
, align
, ret_t
= 0;
996 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
1001 mode
= x86_64_mode_integer
;
1003 size
= type_size(ty
, &align
);
1004 *psize
= (size
+ 7) & ~7;
1005 *palign
= (align
+ 7) & ~7;
1008 mode
= x86_64_mode_memory
;
1011 mode
= classify_x86_64_inner(ty
);
1013 case x86_64_mode_integer
:
1028 ret_t
|= (ty
->t
& VT_UNSIGNED
);
1030 case x86_64_mode_x87
:
1034 case x86_64_mode_sse
:
1040 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1045 break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1058 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
)
1060 /* This definition must be synced with stdarg.h */
1061 enum __va_arg_type
{
1062 __va_gen_reg
, __va_float_reg
, __va_ld_reg
, __va_stack
1064 int size
, align
, reg_count
;
1065 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1067 default: return __va_stack
;
1068 case x86_64_mode_x87
: return __va_ld_reg
;
1069 case x86_64_mode_integer
: return __va_gen_reg
;
1070 case x86_64_mode_sse
: return __va_float_reg
;
1074 /* Return the number of registers needed to return the struct, or 0 if
1075 returning via struct pointer. */
1076 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
)
1078 int size
, align
, reg_count
;
1079 *ret_align
= 1; // Never have to re-align return values for x86-64
1080 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1084 static const uint8_t arg_regs
[REGN
] = {
1085 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1088 /* Generate function call. The function address is pushed first, then
1089 all the parameters in call order. This functions pops all the
1090 parameters and the function address. */
1091 void gfunc_call(int nb_args
)
1095 int size
, align
, r
, args_size
, stack_adjust
, run_start
, run_end
, i
, reg_count
;
1096 int nb_reg_args
= 0;
1097 int nb_sse_args
= 0;
1098 int sse_reg
, gen_reg
;
1100 /* fetch cpu flag before the following sub will change the value */
1101 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1103 /* calculate the number of integer/float register arguments */
1104 for(i
= 0; i
< nb_args
; i
++) {
1105 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1106 if (mode
== x86_64_mode_sse
)
1107 nb_sse_args
+= reg_count
;
1108 else if (mode
== x86_64_mode_integer
)
1109 nb_reg_args
+= reg_count
;
1112 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1113 and ended by a 16-byte aligned argument. This is because, from the point of view of
1114 the callee, argument alignment is computed from the bottom up. */
1115 /* for struct arguments, we need to call memcpy and the function
1116 call breaks register passing arguments we are preparing.
1117 So, we process arguments which will be passed by stack first. */
1118 gen_reg
= nb_reg_args
;
1119 sse_reg
= nb_sse_args
;
1122 while (run_start
!= nb_args
) {
1123 int run_gen_reg
= gen_reg
, run_sse_reg
= sse_reg
;
1127 for(i
= run_start
; (i
< nb_args
) && (run_end
== nb_args
); i
++) {
1128 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1130 case x86_64_mode_memory
:
1131 case x86_64_mode_x87
:
1136 stack_adjust
+= size
;
1139 case x86_64_mode_sse
:
1140 sse_reg
-= reg_count
;
1141 if (sse_reg
+ reg_count
> 8) goto stack_arg
;
1144 case x86_64_mode_integer
:
1145 gen_reg
-= reg_count
;
1146 if (gen_reg
+ reg_count
> REGN
) goto stack_arg
;
1148 default: break; /* nothing to be done for x86_64_mode_none */
1152 gen_reg
= run_gen_reg
;
1153 sse_reg
= run_sse_reg
;
1155 /* adjust stack to align SSE boundary */
1156 if (stack_adjust
&= 15) {
1157 /* fetch cpu flag before the following sub will change the value */
1158 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1161 stack_adjust
= 16 - stack_adjust
;
1163 oad(0xec81, stack_adjust
); /* sub $xxx, %rsp */
1164 args_size
+= stack_adjust
;
1167 for(i
= run_start
; i
< run_end
;) {
1168 /* Swap argument to top, it will possibly be changed here,
1169 and might use more temps. At the end of the loop we keep
1170 in on the stack and swap it back to its original position
1171 if it is a register. */
1172 SValue tmp
= vtop
[0];
1176 mode
= classify_x86_64_arg(&vtop
->type
, NULL
, &size
, &align
, ®_count
);
1179 switch (vtop
->type
.t
& VT_BTYPE
) {
1181 if (mode
== x86_64_mode_sse
) {
1183 sse_reg
-= reg_count
;
1186 } else if (mode
== x86_64_mode_integer
) {
1188 gen_reg
-= reg_count
;
1194 /* allocate the necessary size on stack */
1196 oad(0xec81, size
); /* sub $xxx, %rsp */
1197 /* generate structure store */
1198 r
= get_reg(RC_INT
);
1199 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1200 o(0xe0 + REG_VALUE(r
));
1201 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1214 assert(mode
== x86_64_mode_sse
);
1218 o(0x50); /* push $rax */
1219 /* movq %xmmN, (%rsp) */
1221 o(0x04 + REG_VALUE(r
)*8);
1230 assert(mode
== x86_64_mode_integer
);
1232 /* XXX: implicit cast ? */
1233 if (gen_reg
> REGN
) {
1236 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1244 /* And swap the argument back to it's original position. */
1251 assert((vtop
->type
.t
== tmp
.type
.t
) && (vtop
->r
== tmp
.r
));
1260 /* handle 16 byte aligned arguments at end of run */
1261 run_start
= i
= run_end
;
1262 while (i
< nb_args
) {
1263 /* Rotate argument to top since it will always be popped */
1264 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1270 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1272 oad(0xec8148, size
); /* sub $xxx, %rsp */
1273 o(0x7cdb); /* fstpt 0(%rsp) */
1278 //assert(mode == x86_64_mode_memory);
1280 /* allocate the necessary size on stack */
1282 oad(0xec81, size
); /* sub $xxx, %rsp */
1283 /* generate structure store */
1284 r
= get_reg(RC_INT
);
1285 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1286 o(0xe0 + REG_VALUE(r
));
1287 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1298 /* XXX This should be superfluous. */
1299 // save_regs(0); /* save used temporary registers */
1301 /* then, we prepare register passing arguments.
1302 Note that we cannot set RDX and RCX in this loop because gv()
1303 may break these temporary registers. Let's use R10 and R11
1305 assert(gen_reg
<= REGN
);
1306 assert(sse_reg
<= 8);
1307 for(i
= 0; i
< nb_args
; i
++) {
1308 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1309 /* Alter stack entry type so that gv() knows how to treat it */
1311 if (mode
== x86_64_mode_sse
) {
1312 sse_reg
-= reg_count
;
1313 if (sse_reg
+ reg_count
<= 8) {
1314 if (reg_count
== 2) {
1315 ex_rc
= RC_XMM0
<< (sse_reg
+ 1);
1316 gv(RC_XMM0
<< sse_reg
);
1318 assert(reg_count
== 1);
1319 /* Load directly to register */
1320 gv(RC_XMM0
<< sse_reg
);
1323 } else if (mode
== x86_64_mode_integer
) {
1325 /* XXX: implicit cast ? */
1327 gen_reg
-= reg_count
;
1328 if (gen_reg
+ reg_count
<= REGN
) {
1329 if (reg_count
== 2) {
1330 d
= arg_regs
[gen_reg
+1];
1331 ex_rc
= reg_classes
[d
] & ~RC_MASK
;
1332 d
= arg_regs
[gen_reg
];
1333 gv(reg_classes
[d
] & ~RC_MASK
);
1335 assert(reg_count
== 1);
1336 d
= arg_regs
[gen_reg
];
1337 gv(reg_classes
[d
] & ~RC_MASK
);
1343 assert(gen_reg
== 0);
1344 assert(sse_reg
== 0);
1346 /* We shouldn't have many operands on the stack anymore, but the
1347 call address itself is still there, and it might be in %eax
1348 (or edx/ecx) currently, which the below writes would clobber.
1349 So evict all remaining operands here. */
1351 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1359 #define FUNC_PROLOG_SIZE 11
1361 static void push_arg_reg(int i
) {
1363 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1366 /* generate function prolog of type 't' */
1367 void gfunc_prolog(CType
*func_type
)
1370 int i
, addr
, align
, size
, reg_count
;
1371 int param_addr
= 0, reg_param_index
, sse_param_index
;
1375 sym
= func_type
->ref
;
1376 addr
= PTR_SIZE
* 2;
1377 pop_stack
= loc
= 0;
1378 ind
+= FUNC_PROLOG_SIZE
;
1379 func_sub_sp_offset
= ind
;
1382 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
1383 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1384 seen_reg_num
= seen_sse_num
= 0;
1385 /* frame pointer and return address */
1386 seen_stack_size
= PTR_SIZE
* 2;
1387 /* count the number of seen parameters */
1388 while ((sym
= sym
->next
) != NULL
) {
1390 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1394 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1397 case x86_64_mode_integer
:
1398 if (seen_reg_num
+ reg_count
<= 8) {
1399 seen_reg_num
+= reg_count
;
1406 case x86_64_mode_sse
:
1407 if (seen_sse_num
+ reg_count
<= 8) {
1408 seen_sse_num
+= reg_count
;
1418 /* movl $0x????????, -0x10(%rbp) */
1420 gen_le32(seen_reg_num
* 8);
1421 /* movl $0x????????, -0xc(%rbp) */
1423 gen_le32(seen_sse_num
* 16 + 48);
1424 /* movl $0x????????, -0x8(%rbp) */
1426 gen_le32(seen_stack_size
);
1428 o(0xc084);/* test %al,%al */
1430 g(4*(8 - seen_sse_num
) + 3);
1432 /* save all register passing arguments */
1433 for (i
= 0; i
< 8; i
++) {
1435 o(0x290f);/* movaps %xmm1-7,-XXX(%rbp) */
1436 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1438 for (i
= 0; i
< (REGN
- seen_reg_num
); i
++) {
1439 push_arg_reg(REGN
-1 - i
);
1443 sym
= func_type
->ref
;
1444 reg_param_index
= 0;
1445 sse_param_index
= 0;
1447 /* if the function returns a structure, then add an
1448 implicit pointer parameter */
1449 func_vt
= sym
->type
;
1450 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1451 if (mode
== x86_64_mode_memory
) {
1452 push_arg_reg(reg_param_index
);
1456 /* define parameters */
1457 while ((sym
= sym
->next
) != NULL
) {
1459 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1461 case x86_64_mode_sse
:
1462 if (sse_param_index
+ reg_count
<= 8) {
1463 /* save arguments passed by register */
1464 loc
-= reg_count
* 8;
1466 for (i
= 0; i
< reg_count
; ++i
) {
1467 o(0xd60f66); /* movq */
1468 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1472 addr
= (addr
+ align
- 1) & -align
;
1475 sse_param_index
+= reg_count
;
1479 case x86_64_mode_memory
:
1480 case x86_64_mode_x87
:
1481 addr
= (addr
+ align
- 1) & -align
;
1486 case x86_64_mode_integer
: {
1487 if (reg_param_index
+ reg_count
<= REGN
) {
1488 /* save arguments passed by register */
1489 loc
-= reg_count
* 8;
1491 for (i
= 0; i
< reg_count
; ++i
) {
1492 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1496 addr
= (addr
+ align
- 1) & -align
;
1499 reg_param_index
+= reg_count
;
1503 default: break; /* nothing to be done for x86_64_mode_none */
1505 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1506 VT_LOCAL
| VT_LVAL
, param_addr
);
1510 /* generate function epilog */
1511 void gfunc_epilog(void)
1515 o(0xc9); /* leave */
1516 if (func_ret_sub
== 0) {
1519 o(0xc2); /* ret n */
1521 g(func_ret_sub
>> 8);
1523 /* align local size to word & save local variables */
1524 v
= (-loc
+ 15) & -16;
1526 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1527 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1528 o(0xec8148); /* sub rsp, stacksize */
1535 /* generate a jump to a label */
1538 return psym(0xe9, t
);
1541 /* generate a jump to a fixed address */
1542 void gjmp_addr(int a
)
1550 oad(0xe9, a
- ind
- 5);
1554 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1555 int gtst(int inv
, int t
)
1559 v
= vtop
->r
& VT_VALMASK
;
1561 /* fast case : can jump directly since flags are set */
1562 if (vtop
->c
.i
& 0x100)
1564 /* This was a float compare. If the parity flag is set
1565 the result was unordered. For anything except != this
1566 means false and we don't jump (anding both conditions).
1567 For != this means true (oring both).
1568 Take care about inverting the test. We need to jump
1569 to our target if the result was unordered and test wasn't NE,
1570 otherwise if unordered we don't want to jump. */
1571 vtop
->c
.i
&= ~0x100;
1572 if (!inv
== (vtop
->c
.i
!= TOK_NE
))
1573 o(0x067a); /* jp +6 */
1577 t
= psym(0x8a, t
); /* jp t */
1581 t
= psym((vtop
->c
.i
- 16) ^ inv
, t
);
1582 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1583 /* && or || optimization */
1584 if ((v
& 1) == inv
) {
1585 /* insert vtop->c jump list in t */
1588 p
= (int *)(cur_text_section
->data
+ *p
);
1596 if (is_float(vtop
->type
.t
) ||
1597 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1601 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1602 /* constant jmp optimization */
1603 if ((vtop
->c
.i
!= 0) != inv
)
1608 o(0xc0 + REG_VALUE(v
) * 9);
1610 t
= psym(0x85 ^ inv
, t
);
1617 /* generate an integer binary operation */
1618 void gen_opi(int op
)
1620 int r
, fr
, opc
, fc
, c
, ll
, uu
, cc
, tt2
;
1624 ll
= is64_type(vtop
[-1].type
.t
);
1625 cc
= (fr
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1626 tt2
= (fr
& (VT_LVAL
| VT_LVAL_TYPE
)) == VT_LVAL
;
1630 case TOK_ADDC1
: /* add with carry generation */
1636 if (cc
&& (!ll
|| (int)vtop
->c
.ll
== vtop
->c
.ll
)) {
1640 /* XXX: generate inc and dec for smaller code ? */
1641 orex(ll
, r
, 0, 0x83);
1642 o(0xc0 + REG_VALUE(r
) + opc
*8);
1645 orex(ll
, r
, 0, 0x81);
1646 oad(0xc0 + REG_VALUE(r
) + opc
*8, c
);
1651 orex(ll
, fr
, r
, 0x03 + opc
*8);
1653 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1655 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1658 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1664 case TOK_SUBC1
: /* sub with carry generation */
1667 case TOK_ADDC2
: /* add with carry use */
1670 case TOK_SUBC2
: /* sub with carry use */
1692 orex(ll
, fr
, r
, 0xf7);
1694 gen_modrm(opc
, fr
, vtop
->sym
, fc
);
1696 o(0xc0 + REG_VALUE(fr
) + opc
*8);
1698 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1700 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1702 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1722 orex(ll
, r
, 0, 0xd1);
1723 o(0xc0 + REG_VALUE(r
) + opc
*8);
1725 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1726 o(0xc0 + REG_VALUE(r
) + opc
*8);
1727 g(c
& (ll
? 0x3f : 0x1f));
1730 /* we generate the shift in ecx */
1731 gv2(RC_INT
, RC_RCX
);
1733 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1734 o(0xc0 + REG_VALUE(r
) + opc
*8);
1749 /* first operand must be in eax */
1750 /* XXX: need better constraint for second operand */
1752 gv2(RC_RAX
, RC_INT2
);
1760 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cdq RDX:RAX <- sign-extend of RAX. */
1761 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1763 gen_modrm(opc
, fr
, vtop
->sym
, fc
);
1765 o(0xc0 + REG_VALUE(fr
) + opc
*8);
1766 if (op
== '%' || op
== TOK_UMOD
)
1779 void gen_opl(int op
)
1784 /* generate a floating point operation 'v = t1 op t2' instruction. The
1785 two operands are guaranted to have the same floating point type */
1786 /* XXX: need to use ST1 too */
1787 void gen_opf(int op
)
1789 int a
, ft
, fc
, swapped
, fr
, r
;
1790 int float_type
= (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1792 /* convert constants to memory references */
1793 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1798 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1805 if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
1806 /* swap the stack if needed so that t1 is the register and t2 is
1807 the memory reference */
1808 /* must put at least one value in the floating point register */
1809 if ((vtop
[-1].r
& VT_LVAL
) && (vtop
[0].r
& VT_LVAL
)) {
1814 if (vtop
[-1].r
& VT_LVAL
) {
1818 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1819 /* load on stack second operand */
1820 load(TREG_ST0
, vtop
);
1821 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1822 if (op
== TOK_GE
|| op
== TOK_GT
)
1824 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1827 o(0xc9d9); /* fxch %st(1) */
1828 if (op
== TOK_EQ
|| op
== TOK_NE
)
1829 o(0xe9da); /* fucompp */
1831 o(0xd9de); /* fcompp */
1832 o(0xe0df); /* fnstsw %ax */
1834 o(0x45e480); /* and $0x45, %ah */
1835 o(0x40fC80); /* cmp $0x40, %ah */
1836 } else if (op
== TOK_NE
) {
1837 o(0x45e480); /* and $0x45, %ah */
1838 o(0x40f480); /* xor $0x40, %ah */
1840 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1841 o(0x05c4f6); /* test $0x05, %ah */
1844 o(0x45c4f6); /* test $0x45, %ah */
1851 /* no memory reference possible for long double operations */
1852 load(TREG_ST0
, vtop
);
1873 o(0xde); /* fxxxp %st, %st(1) */
1883 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1886 op
= TOK_ULE
; /* setae */
1895 op
= TOK_UGT
; /* seta */
1898 assert(!(vtop
[-1].r
& VT_LVAL
));
1899 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
1901 o(0x2e0f); /* ucomisd */
1903 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1905 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1908 vtop
->c
.i
= op
| 0x100;
1910 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
1911 /* no memory reference possible for long double operations */
1927 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
1928 assert(!(vtop
[-1].r
& VT_LVAL
));
1929 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
1937 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1939 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1945 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1946 and 'long long' cases. */
1947 void gen_cvt_itof(int t
)
1956 if (tbt
== VT_LDOUBLE
) {
1958 if ((ft
& VT_BTYPE
) == VT_LLONG
) {
1959 /* signed long long to float/double/long double (unsigned case
1960 is handled generically) */
1961 o(0x50 + REG_VALUE(r
)); /* push r */
1962 o(0x242cdf); /* fildll (%rsp) */
1963 o(0x08c48348); /* add $8, %rsp */
1964 } else if ((ft
& (VT_BTYPE
| VT_UNSIGNED
)) == (VT_INT
| VT_UNSIGNED
)) {
1965 /* unsigned int to float/double/long double */
1966 o(0x6a); /* push $0 */
1968 o(0x50 + REG_VALUE(r
)); /* push r */
1969 o(0x242cdf); /* fildll (%rsp) */
1970 o(0x10c48348); /* add $16, %rsp */
1972 /* int to float/double/long double */
1973 o(0x50 + REG_VALUE(r
)); /* push r */
1974 o(0x2404db); /* fildl (%rsp) */
1975 o(0x08c48348); /* add $8, %rsp */
1980 r_xmm
= get_reg(RC_FLOAT
);
1981 o(0xf2 + (tbt
== VT_FLOAT
));
1982 if ((ft
& (VT_BTYPE
| VT_UNSIGNED
)) == (VT_INT
| VT_UNSIGNED
) || bt
== VT_LLONG
) {
1986 o(0xc0 + REG_VALUE(r
) + REG_VALUE(r_xmm
)*8); /* cvtsi2sd or cvtsi2ss */
1991 /* convert from one floating point type to another */
1992 void gen_cvt_ftof(int t
)
2000 if(bt
== VT_LDOUBLE
)
2001 r
= get_reg(RC_FLOAT
);
2004 if (bt
== VT_FLOAT
) {
2005 if (tbt
== VT_DOUBLE
) {
2006 o(0x5a0f); /* cvtps2pd */
2007 o(0xc0 + REG_VALUE(r
) + REG_VALUE(r
) * 8);
2008 } else if (tbt
== VT_LDOUBLE
) {
2009 /* movss %xmm0-7,-0x10(%rsp) */
2011 o(0xf02444 + REG_VALUE(r
)*8);
2012 o(0xf02444d9); /* flds -0x10(%rsp) */
2015 } else if (bt
== VT_DOUBLE
) {
2016 if (tbt
== VT_FLOAT
) {
2017 o(0x5a0f66); /* cvtpd2ps */
2018 o(0xc0 + REG_VALUE(r
) + REG_VALUE(r
) * 8);
2019 } else if (tbt
== VT_LDOUBLE
) {
2020 /* movsd %xmm0-7,-0x10(%rsp) */
2022 o(0xf02444 + REG_VALUE(r
)*8);
2023 o(0xf02444dd); /* fldl -0x10(%rsp) */
2028 if (tbt
== VT_DOUBLE
) {
2029 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2030 /* movsd -0x10(%rsp),%xmm0-7 */
2032 o(0xf02444 + REG_VALUE(r
)*8);
2034 } else if (tbt
== VT_FLOAT
) {
2035 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2036 /* movss -0x10(%rsp),%xmm0-7 */
2038 o(0xf02444 + REG_VALUE(r
)*8);
2044 /* convert fp to int 't' type */
2045 void gen_cvt_ftoi(int t
)
2047 int ft
, bt
, ll
, r
, r_xmm
;
2052 if (bt
== VT_LDOUBLE
) {
2053 gen_cvt_ftof(VT_DOUBLE
);
2056 r_xmm
= gv(RC_FLOAT
);
2057 if ((t
& VT_BTYPE
) == VT_INT
)
2061 r
= get_reg(RC_INT
);
2062 if (bt
== VT_FLOAT
) {
2064 } else if (bt
== VT_DOUBLE
) {
2069 orex(ll
, r
, r_xmm
, 0x2c0f); /* cvttss2si or cvttsd2si */
2070 o(0xc0 + REG_VALUE(r_xmm
) + (REG_VALUE(r
) << 3));
2074 /* computed goto support */
2081 /* Save the stack pointer onto the stack and return the location of its address */
2082 ST_FUNC
void gen_vla_sp_save(int addr
) {
2083 /* mov %rsp,addr(%rbp)*/
2084 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2087 /* Restore the SP from a location on the stack */
2088 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2089 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2092 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2093 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2094 #ifdef TCC_TARGET_PE
2095 /* alloca does more than just adjust %rsp on Windows */
2096 vpush_global_sym(&func_old_type
, TOK_alloca
);
2097 vswap(); /* Move alloca ref past allocation size */
2099 vset(type
, REG_IRET
, 0);
2102 r
= gv(RC_INT
); /* allocation size */
2105 o(0xe0 | REG_VALUE(r
));
2106 /* We align to 16 bytes rather than align */
2111 o(0xe0 | REG_VALUE(r
));
2118 /* end of x86-64 code generator */
2119 /*************************************************************/
2120 #endif /* ! TARGET_DEFS_ONLY */
2121 /******************************************************/