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Fix va_arg bug, Fix type conversion bug, an increase of loc_stack () function is...
[tinycc.git] / x86_64-gen.c
blob484da3f3cfb58a966eab3e4a67c433802eb31549
1 /*
2 * x86-64 code generator for TCC
3 *
4 * Copyright (c) 2008 Shinichiro Hamaji
5 *
6 * Based on i386-gen.c by Fabrice Bellard
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #ifdef TARGET_DEFS_ONLY
24
25 /* number of available registers */
26 #define NB_REGS 25
27 #define NB_ASM_REGS 8
28
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
34 #define RC_RAX 0x0004
35 #define RC_RCX 0x0008
36 #define RC_RDX 0x0010
37 #define RC_ST0 0x0020 /* only for long double */
38 #define RC_R8 0x0040
39 #define RC_R9 0x0080
40 #define RC_XMM0 0x0100
41 #define RC_XMM1 0x0200
42 #define RC_XMM2 0x0400
43 #define RC_XMM3 0x0800
44 #define RC_XMM4 0x1000
45 #define RC_XMM5 0x2000
46 #define RC_XMM6 0x4000
47 #define RC_XMM7 0x8000
48 #define RC_RSI 0x10000
49 #define RC_RDI 0x20000
50 #define RC_INT1 0x40000 /* function_pointer */
51 #define RC_INT2 0x80000
52 #define RC_RBX 0x100000
53 #define RC_R10 0x200000
54 #define RC_R11 0x400000
55 #define RC_R12 0x800000
56 #define RC_R13 0x1000000
57 #define RC_R14 0x2000000
58 #define RC_R15 0x4000000
59 #define RC_IRET RC_RAX /* function return: integer register */
60 #define RC_LRET RC_RDX /* function return: second integer register */
61 #define RC_FRET RC_XMM0 /* function return: float register */
62 #define RC_QRET RC_XMM1 /* function return: second float register */
63 #define RC_MASK (RC_INT|RC_INT1|RC_INT2|RC_FLOAT)
64
65 /* pretty names for the registers */
66 enum {
67 TREG_RAX = 0,
68 TREG_RCX = 1,
69 TREG_RDX = 2,
70 TREG_RSP = 4,
71 TREG_ST0 = 5,
72 TREG_RSI = 6,
73 TREG_RDI = 7,
74
75 TREG_R8 = 8,
76 TREG_R9 = 9,
77 TREG_R10 = 10,
78 TREG_R11 = 11,
79
80 TREG_XMM0 = 16,
81 TREG_XMM1 = 17,
82 TREG_XMM2 = 18,
83 TREG_XMM3 = 19,
84 TREG_XMM4 = 20,
85 TREG_XMM5 = 21,
86 TREG_XMM6 = 22,
87 TREG_XMM7 = 23,
88
89 };
90
91 #define REX_BASE(reg) (((reg) >> 3) & 1)
92 #define REG_VALUE(reg) ((reg) & 7)
93 #define FLAG_GOT 0X01
94
95 /* return registers for function */
96 #define REG_IRET TREG_RAX /* single word int return register */
97 #define REG_LRET TREG_RDX /* second word return register (for long long) */
98 #define REG_FRET TREG_XMM0 /* float return register */
99 #define REG_QRET TREG_XMM1 /* second float return register */
100
101 /* defined if function parameters must be evaluated in reverse order */
102 #define INVERT_FUNC_PARAMS
103
104 /* pointer size, in bytes */
105 #define PTR_SIZE 8
106
107 /* long double size and alignment, in bytes */
108 #define LDOUBLE_SIZE 16
109 #define LDOUBLE_ALIGN 16
110 /* maximum alignment (for aligned attribute support) */
111 #define MAX_ALIGN 16
112
113 /******************************************************/
114 /* ELF defines */
115
116 #define EM_TCC_TARGET EM_X86_64
117
118 /* relocation type for 32 bit data relocation */
119 #define R_DATA_32 R_X86_64_32
120 #define R_DATA_PTR R_X86_64_64
121 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
122 #define R_COPY R_X86_64_COPY
123
124 #define ELF_START_ADDR 0x400000
125 #define ELF_PAGE_SIZE 0x200000
126
127 /******************************************************/
128 #else /* ! TARGET_DEFS_ONLY */
129 /******************************************************/
130 #include "tcc.h"
131 #include <assert.h>
132
133 ST_DATA const int reg_classes[NB_REGS] = {
134 /* eax */ RC_INT|RC_RAX|RC_INT2,
135 /* ecx */ RC_INT|RC_RCX|RC_INT2,
136 /* edx */ RC_INT|RC_RDX,
137 RC_INT|RC_INT1|RC_INT2|RC_RBX,
138 0,
139 /* st0 */ RC_ST0,
140 RC_RSI|RC_INT2,
141 RC_RDI|RC_INT2,
142 RC_INT|RC_R8|RC_INT2,
143 RC_INT|RC_R9|RC_INT2,
144 RC_INT|RC_INT1|RC_INT2|RC_R10,
145 RC_INT|RC_INT1|RC_INT2|RC_R11,
146 RC_INT|RC_INT1|RC_INT2|RC_R12,
147 RC_INT|RC_INT1|RC_INT2|RC_R13,
148 RC_INT|RC_INT1|RC_INT2|RC_R14,
149 RC_INT|RC_INT1|RC_INT2|RC_R15,
150 /* xmm0 */ RC_FLOAT | RC_XMM0,
151 RC_FLOAT|RC_XMM1,
152 RC_FLOAT|RC_XMM2,
153 RC_FLOAT|RC_XMM3,
154 RC_FLOAT|RC_XMM4,
155 RC_FLOAT|RC_XMM5,
156 RC_FLOAT|RC_XMM6,
157 RC_FLOAT|RC_XMM7,
158 };
159
160 static unsigned long func_sub_sp_offset;
161 static int func_ret_sub;
162
163 /* XXX: make it faster ? */
164 void g(int c)
165 {
166 int ind1;
167 ind1 = ind + 1;
168 if (ind1 > cur_text_section->data_allocated)
169 section_realloc(cur_text_section, ind1);
170 cur_text_section->data[ind] = c;
171 ind = ind1;
172 }
173
174 void o(unsigned int c)
175 {
176 while (c) {
177 g(c);
178 c = c >> 8;
179 }
180 }
181
182 void gen_le16(int v)
183 {
184 g(v);
185 g(v >> 8);
186 }
187
188 void gen_le32(int c)
189 {
190 g(c);
191 g(c >> 8);
192 g(c >> 16);
193 g(c >> 24);
194 }
195
196 void gen_le64(int64_t c)
197 {
198 g(c);
199 g(c >> 8);
200 g(c >> 16);
201 g(c >> 24);
202 g(c >> 32);
203 g(c >> 40);
204 g(c >> 48);
205 g(c >> 56);
206 }
207
208 void orex(int ll, int r, int r2, int b)
209 {
210 if ((r & VT_VALMASK) >= VT_CONST)
211 r = 0;
212 if ((r2 & VT_VALMASK) >= VT_CONST)
213 r2 = 0;
214 if (ll || REX_BASE(r) || REX_BASE(r2))
215 o(0x40 | REX_BASE(r) | (REX_BASE(r2) << 2) | (ll << 3));
216 o(b);
217 }
218
219 /* output a symbol and patch all calls to it */
220 void gsym_addr(int t, int a)
221 {
222 int n, *ptr;
223 while (t) {
224 ptr = (int *)(cur_text_section->data + t);
225 n = *ptr; /* next value */
226 *ptr = a - t - 4;
227 t = n;
228 }
229 }
230
231 void gsym(int t)
232 {
233 gsym_addr(t, ind);
234 }
235
236 /* psym is used to put an instruction with a data field which is a
237 reference to a symbol. It is in fact the same as oad ! */
238 #define psym oad
239
240 static int is64_type(int t)
241 {
242 return ((t & VT_BTYPE) == VT_PTR ||
243 (t & VT_BTYPE) == VT_FUNC ||
244 (t & VT_BTYPE) == VT_LLONG);
245 }
246
247 /* instruction + 4 bytes data. Return the address of the data */
248 ST_FUNC int oad(int c, int s)
249 {
250 int ind1;
251
252 o(c);
253 ind1 = ind + 4;
254 if (ind1 > cur_text_section->data_allocated)
255 section_realloc(cur_text_section, ind1);
256 *(int *)(cur_text_section->data + ind) = s;
257 s = ind;
258 ind = ind1;
259 return s;
260 }
261
262 ST_FUNC void gen_addr32(int r, Sym *sym, int c)
263 {
264 if (r & VT_SYM)
265 greloc(cur_text_section, sym, ind, R_X86_64_32);
266 gen_le32(c);
267 }
268
269 /* output constant with relocation if 'r & VT_SYM' is true */
270 ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
271 {
272 if (r & VT_SYM)
273 greloc(cur_text_section, sym, ind, R_X86_64_64);
274 gen_le64(c);
275 }
276
277 /* output constant with relocation if 'r & VT_SYM' is true */
278 ST_FUNC void gen_addrpc32(int r, Sym *sym, int c)
279 {
280 if (r & VT_SYM)
281 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
282 gen_le32(c-4);
283 }
284
285 /* output got address with relocation */
286 static void gen_gotpcrel(int r, Sym *sym, int c)
287 {
288 #ifndef TCC_TARGET_PE
289 Section *sr;
290 ElfW(Rela) *rel;
291 greloc(cur_text_section, sym, ind, R_X86_64_GOTPCREL);
292 sr = cur_text_section->reloc;
293 rel = (ElfW(Rela) *)(sr->data + sr->data_offset - sizeof(ElfW(Rela)));
294 rel->r_addend = -4;
295 #else
296 printf("picpic: %s %x %x | %02x %02x %02x\n", get_tok_str(sym->v, NULL), c, r,
297 cur_text_section->data[ind-3],
298 cur_text_section->data[ind-2],
299 cur_text_section->data[ind-1]
300 );
301 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
302 #endif
303 gen_le32(0);
304 if (c) {
305 /* we use add c, %xxx for displacement */
306 orex(1, r, 0, 0x81);
307 o(0xc0 + REG_VALUE(r));
308 gen_le32(c);
309 }
310 }
311
312 static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
313 {
314 op_reg = REG_VALUE(op_reg) << 3;
315 if ((r & VT_VALMASK) == VT_CONST) {
316 /* constant memory reference */
317 o(0x05 | op_reg);
318 if (is_got) {
319 gen_gotpcrel(r, sym, c);
320 } else {
321 gen_addrpc32(r, sym, c);
322 }
323 } else if ((r & VT_VALMASK) == VT_LOCAL) {
324 /* currently, we use only ebp as base */
325 if (c == (char)c) {
326 /* short reference */
327 o(0x45 | op_reg);
328 g(c);
329 } else {
330 oad(0x85 | op_reg, c);
331 }
332 } else if (r & TREG_MEM) {
333 if (c) {
334 g(0x80 | op_reg | REG_VALUE(r));
335 gen_le32(c);
336 } else {
337 g(0x00 | op_reg | REG_VALUE(r));
338 }
339 } else {
340 g(0x00 | op_reg | REG_VALUE(r));
341 }
342 }
343
344 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
345 opcode bits */
346 static void gen_modrm(int op_reg, int r, Sym *sym, int c)
347 {
348 gen_modrm_impl(op_reg, r, sym, c, 0);
349 }
350
351 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
352 opcode bits */
353 static void gen_modrm64(int opcode, int op_reg, int r, Sym *sym, int c)
354 {
355 int is_got;
356 is_got = (op_reg & TREG_MEM) && !(sym->type.t & VT_STATIC);
357 orex(1, r, op_reg, opcode);
358 gen_modrm_impl(op_reg, r, sym, c, is_got);
359 }
360
361
362 /* load 'r' from value 'sv' */
363 void load(int r, SValue *sv)
364 {
365 int v, t, ft, fc, fr;
366 SValue v1;
367
368 #ifdef TCC_TARGET_PE
369 SValue v2;
370 sv = pe_getimport(sv, &v2);
371 #endif
372
373 fr = sv->r;
374 ft = sv->type.t & ~VT_DEFSIGN;
375 fc = sv->c.ul;
376
377 #ifndef TCC_TARGET_PE
378 /* we use indirect access via got */
379 if ((fr & VT_VALMASK) == VT_CONST && (fr & VT_SYM) &&
380 (fr & VT_LVAL) && !(sv->sym->type.t & VT_STATIC)) {
381 /* use the result register as a temporal register */
382 int tr = r | TREG_MEM;
383 if (is_float(ft)) {
384 /* we cannot use float registers as a temporal register */
385 tr = get_reg(RC_INT) | TREG_MEM;
386 }
387 gen_modrm64(0x8b, tr, fr, sv->sym, 0);
388
389 /* load from the temporal register */
390 fr = tr | VT_LVAL;
391 }
392 #endif
393
394 v = fr & VT_VALMASK;
395 if (fr & VT_LVAL) {
396 int b, ll;
397 if (v == VT_LLOCAL) {
398 v1.type.t = VT_PTR;
399 v1.r = VT_LOCAL | VT_LVAL;
400 v1.c.ul = fc;
401 fr = r;
402 if (!(reg_classes[fr] & RC_INT))
403 fr = get_reg(RC_INT);
404 load(fr, &v1);
405 }
406 ll = 0;
407 if ((ft & VT_BTYPE) == VT_FLOAT) {
408 b = 0x6e0f66;
409 r = REG_VALUE(r); /* movd */
410 } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
411 b = 0x7e0ff3; /* movq */
412 r = REG_VALUE(r);
413 } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
414 b = 0xdb, r = 5; /* fldt */
415 } else if ((ft & VT_TYPE) == VT_BYTE || (ft & VT_TYPE) == VT_BOOL) {
416 b = 0xbe0f; /* movsbl */
417 } else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED)) {
418 b = 0xb60f; /* movzbl */
419 } else if ((ft & VT_TYPE) == VT_SHORT) {
420 b = 0xbf0f; /* movswl */
421 } else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED)) {
422 b = 0xb70f; /* movzwl */
423 } else {
424 assert(((ft & VT_BTYPE) == VT_INT) || ((ft & VT_BTYPE) == VT_LLONG)
425 || ((ft & VT_BTYPE) == VT_PTR) || ((ft & VT_BTYPE) == VT_ENUM)
426 || ((ft & VT_BTYPE) == VT_FUNC));
427 ll = is64_type(ft);
428 b = 0x8b;
429 }
430 if (ll) {
431 gen_modrm64(b, r, fr, sv->sym, fc);
432 } else {
433 orex(ll, fr, r, b);
434 gen_modrm(r, fr, sv->sym, fc);
435 }
436 } else {
437 if (v == VT_CONST) {
438 if (fr & VT_SYM) {
439 #ifdef TCC_TARGET_PE
440 orex(1,0,r,0x8d);
441 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
442 gen_addrpc32(fr, sv->sym, fc);
443 #else
444 if (sv->sym->type.t & VT_STATIC) {
445 orex(1,0,r,0x8d);
446 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
447 gen_addrpc32(fr, sv->sym, fc);
448 } else {
449 orex(1,0,r,0x8b);
450 o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */
451 gen_gotpcrel(r, sv->sym, fc);
452 }
453 #endif
454 } else if (is64_type(ft)) {
455 orex(1,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
456 gen_le64(sv->c.ull);
457 } else {
458 orex(0,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
459 gen_le32(fc);
460 }
461 } else if (v == VT_LOCAL) {
462 orex(1,0,r,0x8d); /* lea xxx(%ebp), r */
463 gen_modrm(r, VT_LOCAL, sv->sym, fc);
464 } else if (v == VT_CMP) {
465 orex(0,r,0,0);
466 if ((fc & ~0x100) != TOK_NE)
467 oad(0xb8 + REG_VALUE(r), 0); /* mov $0, r */
468 else
469 oad(0xb8 + REG_VALUE(r), 1); /* mov $1, r */
470 if (fc & 0x100)
471 {
472 /* This was a float compare. If the parity bit is
473 set the result was unordered, meaning false for everything
474 except TOK_NE, and true for TOK_NE. */
475 fc &= ~0x100;
476 o(0x037a + (REX_BASE(r) << 8));
477 }
478 orex(0,r,0, 0x0f); /* setxx %br */
479 o(fc);
480 o(0xc0 + REG_VALUE(r));
481 } else if (v == VT_JMP || v == VT_JMPI) {
482 t = v & 1;
483 orex(0,r,0,0);
484 oad(0xb8 + REG_VALUE(r), t); /* mov $1, r */
485 o(0x05eb + (REX_BASE(r) << 8)); /* jmp after */
486 gsym(fc);
487 orex(0,r,0,0);
488 oad(0xb8 + REG_VALUE(r), t ^ 1); /* mov $0, r */
489 } else if (v != r) {
490 if ((r >= TREG_XMM0) && (r <= TREG_XMM7)) {
491 if (v == TREG_ST0) {
492 /* gen_cvt_ftof(VT_DOUBLE); */
493 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
494 /* movsd -0x10(%rsp),%xmmN */
495 o(0x100ff2);
496 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
497 o(0xf024);
498 } else {
499 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
500 if ((ft & VT_BTYPE) == VT_FLOAT) {
501 o(0x100ff3);
502 } else {
503 assert((ft & VT_BTYPE) == VT_DOUBLE);
504 o(0x100ff2);
505 }
506 o(0xc0 + REG_VALUE(v) + REG_VALUE(r)*8);
507 }
508 } else if (r == TREG_ST0) {
509 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
510 /* gen_cvt_ftof(VT_LDOUBLE); */
511 /* movsd %xmmN,-0x10(%rsp) */
512 o(0x110ff2);
513 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
514 o(0xf024);
515 o(0xf02444dd); /* fldl -0x10(%rsp) */
516 } else {
517 orex(1,r,v, 0x89);
518 o(0xc0 + REG_VALUE(r) + REG_VALUE(v) * 8); /* mov v, r */
519 }
520 }
521 }
522 }
523
524 /* store register 'r' in lvalue 'v' */
525 void store(int r, SValue *v)
526 {
527 int fr, bt, ft, fc;
528 int op64 = 0;
529 /* store the REX prefix in this variable when PIC is enabled */
530 int pic = 0;
531
532 #ifdef TCC_TARGET_PE
533 SValue v2;
534 v = pe_getimport(v, &v2);
535 #endif
536
537 ft = v->type.t;
538 fc = v->c.ul;
539 fr = v->r & VT_VALMASK;
540 bt = ft & VT_BTYPE;
541
542 #ifndef TCC_TARGET_PE
543 /* we need to access the variable via got */
544 if (fr == VT_CONST && (v->r & VT_SYM)) {
545 /* mov xx(%rip), %r11 */
546 o(0x1d8b4c);
547 gen_gotpcrel(TREG_R11, v->sym, v->c.ul);
548 pic = is64_type(bt) ? 0x49 : 0x41;
549 }
550 #endif
551
552 /* XXX: incorrect if float reg to reg */
553 if (bt == VT_FLOAT) {
554 o(0x66);
555 o(pic);
556 o(0x7e0f); /* movd */
557 r = REG_VALUE(r);
558 } else if (bt == VT_DOUBLE) {
559 o(0x66);
560 o(pic);
561 o(0xd60f); /* movq */
562 r = REG_VALUE(r);
563 } else if (bt == VT_LDOUBLE) {
564 o(0xc0d9); /* fld %st(0) */
565 o(pic);
566 o(0xdb); /* fstpt */
567 r = 7;
568 } else {
569 if (bt == VT_SHORT)
570 o(0x66);
571 o(pic);
572 if (bt == VT_BYTE || bt == VT_BOOL)
573 orex(0, 0, r, 0x88);
574 else if (is64_type(bt))
575 op64 = 0x89;
576 else
577 orex(0, 0, r, 0x89);
578 }
579 if (pic) {
580 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
581 if (op64)
582 o(op64);
583 o(3 + (r << 3));
584 } else if (op64) {
585 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
586 gen_modrm64(op64, r, v->r, v->sym, fc);
587 } else if (fr != r) {
588 /* XXX: don't we really come here? */
589 abort();
590 o(0xc0 + fr + r * 8); /* mov r, fr */
591 }
592 } else {
593 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
594 gen_modrm(r, v->r, v->sym, fc);
595 } else if (fr != r) {
596 /* XXX: don't we really come here? */
597 abort();
598 o(0xc0 + fr + r * 8); /* mov r, fr */
599 }
600 }
601 }
602
603 /* 'is_jmp' is '1' if it is a jump */
604 static void gcall_or_jmp(int is_jmp)
605 {
606 int r;
607 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
608 /* constant case */
609 if (vtop->r & VT_SYM) {
610 /* relocation case */
611 greloc(cur_text_section, vtop->sym,
612 ind + 1, R_X86_64_PLT32);
613 } else {
614 /* put an empty PC32 relocation */
615 put_elf_reloc(symtab_section, cur_text_section,
616 ind + 1, R_X86_64_PC32, 0);
617 }
618 oad(0xe8 + is_jmp, vtop->c.ul - 4); /* call/jmp im */
619 } else {
620 /* otherwise, indirect call */
621 r = TREG_R11;
622 load(r, vtop);
623 o(0x41); /* REX */
624 o(0xff); /* call/jmp *r */
625 o(0xd0 + REG_VALUE(r) + (is_jmp << 4));
626 }
627 }
628
629 #ifdef TCC_TARGET_PE
630
631 #define REGN 4
632 static const uint8_t arg_regs[REGN] = {
633 TREG_RCX, TREG_RDX, TREG_R8, TREG_R9
634 };
635
636 /* Prepare arguments in R10 and R11 rather than RCX and RDX
637 because gv() will not ever use these */
638 static int arg_prepare_reg(int idx) {
639 if (idx == 0 || idx == 1)
640 /* idx=0: r10, idx=1: r11 */
641 return idx + 10;
642 else
643 return arg_regs[idx];
644 }
645
646 static int func_scratch;
647
648 /* Generate function call. The function address is pushed first, then
649 all the parameters in call order. This functions pops all the
650 parameters and the function address. */
651
652 void gen_offs_sp(int b, int r, int d)
653 {
654 orex(1,0,r & 0x100 ? 0 : r, b);
655 if (d == (char)d) {
656 o(0x2444 | (REG_VALUE(r) << 3));
657 g(d);
658 } else {
659 o(0x2484 | (REG_VALUE(r) << 3));
660 gen_le32(d);
661 }
662 }
663
664 /* Return the number of registers needed to return the struct, or 0 if
665 returning via struct pointer. */
666 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align)
667 {
668 int size, align;
669 *ret_align = 1; // Never have to re-align return values for x86-64
670 size = type_size(vt, &align);
671 ret->ref = NULL;
672 if (size > 8) {
673 return 0;
674 } else if (size > 4) {
675 ret->t = VT_LLONG;
676 return 1;
677 } else if (size > 2) {
678 ret->t = VT_INT;
679 return 1;
680 } else if (size > 1) {
681 ret->t = VT_SHORT;
682 return 1;
683 } else {
684 ret->t = VT_BYTE;
685 return 1;
686 }
687 }
688
689 static int is_sse_float(int t) {
690 int bt;
691 bt = t & VT_BTYPE;
692 return bt == VT_DOUBLE || bt == VT_FLOAT;
693 }
694
695 int gfunc_arg_size(CType *type) {
696 int align;
697 if (type->t & (VT_ARRAY|VT_BITFIELD))
698 return 8;
699 return type_size(type, &align);
700 }
701
702 void gfunc_call(int nb_args)
703 {
704 int size, r, args_size, i, d, bt, struct_size;
705 int arg;
706
707 args_size = (nb_args < REGN ? REGN : nb_args) * PTR_SIZE;
708 arg = nb_args;
709
710 /* for struct arguments, we need to call memcpy and the function
711 call breaks register passing arguments we are preparing.
712 So, we process arguments which will be passed by stack first. */
713 struct_size = args_size;
714 for(i = 0; i < nb_args; i++) {
715 SValue *sv;
716
717 --arg;
718 sv = &vtop[-i];
719 bt = (sv->type.t & VT_BTYPE);
720 size = gfunc_arg_size(&sv->type);
721
722 if (size <= 8)
723 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
724
725 if (bt == VT_STRUCT) {
726 /* align to stack align size */
727 size = (size + 15) & ~15;
728 /* generate structure store */
729 r = get_reg(RC_INT);
730 gen_offs_sp(0x8d, r, struct_size);
731 struct_size += size;
732
733 /* generate memcpy call */
734 vset(&sv->type, r | VT_LVAL, 0);
735 vpushv(sv);
736 vstore();
737 --vtop;
738 } else if (bt == VT_LDOUBLE) {
739 gv(RC_ST0);
740 gen_offs_sp(0xdb, 0x107, struct_size);
741 struct_size += 16;
742 }
743 }
744
745 if (func_scratch < struct_size)
746 func_scratch = struct_size;
747
748 arg = nb_args;
749 struct_size = args_size;
750
751 for(i = 0; i < nb_args; i++) {
752 --arg;
753 bt = (vtop->type.t & VT_BTYPE);
754
755 size = gfunc_arg_size(&vtop->type);
756 if (size > 8) {
757 /* align to stack align size */
758 size = (size + 15) & ~15;
759 if (arg >= REGN) {
760 d = get_reg(RC_INT);
761 gen_offs_sp(0x8d, d, struct_size);
762 gen_offs_sp(0x89, d, arg*8);
763 } else {
764 d = arg_prepare_reg(arg);
765 gen_offs_sp(0x8d, d, struct_size);
766 }
767 struct_size += size;
768 } else {
769 if (is_sse_float(vtop->type.t)) {
770 gv(RC_XMM0); /* only use one float register */
771 if (arg >= REGN) {
772 /* movq %xmm0, j*8(%rsp) */
773 gen_offs_sp(0xd60f66, 0x100, arg*8);
774 } else {
775 /* movaps %xmm0, %xmmN */
776 o(0x280f);
777 o(0xc0 + (arg << 3));
778 d = arg_prepare_reg(arg);
779 /* mov %xmm0, %rxx */
780 o(0x66);
781 orex(1,d,0, 0x7e0f);
782 o(0xc0 + REG_VALUE(d));
783 }
784 } else {
785 if (bt == VT_STRUCT) {
786 vtop->type.ref = NULL;
787 vtop->type.t = size > 4 ? VT_LLONG : size > 2 ? VT_INT
788 : size > 1 ? VT_SHORT : VT_BYTE;
789 }
790
791 r = gv(RC_INT);
792 if (arg >= REGN) {
793 gen_offs_sp(0x89, r, arg*8);
794 } else {
795 d = arg_prepare_reg(arg);
796 orex(1,d,r,0x89); /* mov */
797 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
798 }
799 }
800 }
801 vtop--;
802 }
803 save_regs(0);
804
805 /* Copy R10 and R11 into RCX and RDX, respectively */
806 if (nb_args > 0) {
807 o(0xd1894c); /* mov %r10, %rcx */
808 if (nb_args > 1) {
809 o(0xda894c); /* mov %r11, %rdx */
810 }
811 }
812
813 gcall_or_jmp(0);
814 vtop--;
815 }
816
817
818 #define FUNC_PROLOG_SIZE 11
819
820 /* generate function prolog of type 't' */
821 void gfunc_prolog(CType *func_type)
822 {
823 int addr, reg_param_index, bt, size;
824 Sym *sym;
825 CType *type;
826
827 func_ret_sub = 0;
828 func_scratch = 0;
829 pop_stack = loc = 0;
830
831 addr = PTR_SIZE * 2;
832 ind += FUNC_PROLOG_SIZE;
833 func_sub_sp_offset = ind;
834 reg_param_index = 0;
835
836 sym = func_type->ref;
837
838 /* if the function returns a structure, then add an
839 implicit pointer parameter */
840 func_vt = sym->type;
841 func_var = (sym->c == FUNC_ELLIPSIS);
842 size = gfunc_arg_size(&func_vt);
843 if (size > 8) {
844 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
845 func_vc = addr;
846 reg_param_index++;
847 addr += 8;
848 }
849
850 /* define parameters */
851 while ((sym = sym->next) != NULL) {
852 type = &sym->type;
853 bt = type->t & VT_BTYPE;
854 size = gfunc_arg_size(type);
855 if (size > 8) {
856 if (reg_param_index < REGN) {
857 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
858 }
859 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL | VT_REF, addr);
860 } else {
861 if (reg_param_index < REGN) {
862 /* save arguments passed by register */
863 if ((bt == VT_FLOAT) || (bt == VT_DOUBLE)) {
864 o(0xd60f66); /* movq */
865 gen_modrm(reg_param_index, VT_LOCAL, NULL, addr);
866 } else {
867 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
868 }
869 }
870 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL, addr);
871 }
872 addr += 8;
873 reg_param_index++;
874 }
875
876 while (reg_param_index < REGN) {
877 if (func_type->ref->c == FUNC_ELLIPSIS) {
878 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
879 addr += 8;
880 }
881 reg_param_index++;
882 }
883 }
884
885 /* generate function epilog */
886 void gfunc_epilog(void)
887 {
888 int v, saved_ind;
889
890 o(0xc9); /* leave */
891 if (func_ret_sub == 0) {
892 o(0xc3); /* ret */
893 } else {
894 o(0xc2); /* ret n */
895 g(func_ret_sub);
896 g(func_ret_sub >> 8);
897 }
898
899 saved_ind = ind;
900 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
901 /* align local size to word & save local variables */
902 v = (func_scratch + -loc + 15) & -16;
903
904 if (v >= 4096) {
905 Sym *sym = external_global_sym(TOK___chkstk, &func_old_type, 0);
906 oad(0xb8, v); /* mov stacksize, %eax */
907 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
908 greloc(cur_text_section, sym, ind-4, R_X86_64_PC32);
909 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
910 } else {
911 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
912 o(0xec8148); /* sub rsp, stacksize */
913 gen_le32(v);
914 }
915
916 cur_text_section->data_offset = saved_ind;
917 pe_add_unwind_data(ind, saved_ind, v);
918 ind = cur_text_section->data_offset;
919 }
920
921 #else
922
923 static void gadd_sp(int val)
924 {
925 if (val == (char)val) {
926 o(0xc48348);
927 g(val);
928 } else {
929 oad(0xc48148, val); /* add $xxx, %rsp */
930 }
931 }
932
933 typedef enum X86_64_Mode {
934 x86_64_mode_none,
935 x86_64_mode_memory,
936 x86_64_mode_integer,
937 x86_64_mode_sse,
938 x86_64_mode_x87
939 } X86_64_Mode;
940
941 static X86_64_Mode classify_x86_64_merge(X86_64_Mode a, X86_64_Mode b)
942 {
943 if (a == b)
944 return a;
945 else if (a == x86_64_mode_none)
946 return b;
947 else if (b == x86_64_mode_none)
948 return a;
949 else if ((a == x86_64_mode_memory) || (b == x86_64_mode_memory))
950 return x86_64_mode_memory;
951 else if ((a == x86_64_mode_integer) || (b == x86_64_mode_integer))
952 return x86_64_mode_integer;
953 else if ((a == x86_64_mode_x87) || (b == x86_64_mode_x87))
954 return x86_64_mode_memory;
955 else
956 return x86_64_mode_sse;
957 }
958
959 static X86_64_Mode classify_x86_64_inner(CType *ty)
960 {
961 X86_64_Mode mode;
962 Sym *f;
963
964 switch (ty->t & VT_BTYPE) {
965 case VT_VOID: return x86_64_mode_none;
966
967 case VT_INT:
968 case VT_BYTE:
969 case VT_SHORT:
970 case VT_LLONG:
971 case VT_QLONG:
972 case VT_BOOL:
973 case VT_PTR:
974 case VT_FUNC:
975 case VT_ENUM: return x86_64_mode_integer;
976
977 case VT_FLOAT:
978 case VT_QFLOAT:
979 case VT_DOUBLE: return x86_64_mode_sse;
980
981 case VT_LDOUBLE: return x86_64_mode_x87;
982
983 case VT_STRUCT:
984 f = ty->ref;
985
986 // Detect union
987 if (f->next && (f->c == f->next->c))
988 return x86_64_mode_memory;
989
990 mode = x86_64_mode_none;
991 for (f = f->next; f; f = f->next)
992 mode = classify_x86_64_merge(mode, classify_x86_64_inner(&f->type));
993
994 return mode;
995 }
996
997 assert(0);
998 }
999
1000 static int classify_x86_64_arg(CType *ty, CType *ret, int *psize, int *palign, int *reg_count)
1001 {
1002 X86_64_Mode mode;
1003 int size, align, ret_t = 0;
1004
1005 if (ty->t & (VT_BITFIELD|VT_ARRAY)) {
1006 *psize = 8;
1007 *palign = 8;
1008 *reg_count = 1;
1009 ret_t = ty->t;
1010 mode = x86_64_mode_integer;
1011 } else {
1012 size = type_size(ty, &align);
1013 *psize = (size + 7) & ~7;
1014 *palign = (align + 7) & ~7;
1015
1016 if (size > 16) {
1017 mode = x86_64_mode_memory;
1018 ret_t = ty->t;
1019 } else {
1020 mode = classify_x86_64_inner(ty);
1021 switch (mode) {
1022 case x86_64_mode_integer:
1023 if (size > 8) {
1024 *reg_count = 2;
1025 ret_t = VT_QLONG;
1026 } else {
1027 *reg_count = 1;
1028 if(size > 4)
1029 ret_t = VT_LLONG;
1030 else if(size > 2){
1031 ret_t = VT_INT;
1032 }else if(size > 1)
1033 ret_t = VT_SHORT;
1034 else
1035 ret_t = VT_BYTE;
1036 }
1037 ret_t |= (ty->t & VT_UNSIGNED);
1038 break;
1039 case x86_64_mode_x87:
1040 *reg_count = 1;
1041 ret_t = VT_LDOUBLE;
1042 break;
1043 case x86_64_mode_sse:
1044 if (size > 8) {
1045 *reg_count = 2;
1046 ret_t = VT_QFLOAT;
1047 } else {
1048 *reg_count = 1;
1049 ret_t = (size > 4) ? VT_DOUBLE : VT_FLOAT;
1050 }
1051 break;
1052 default:
1053 ret_t = ty->t;
1054 break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1055 }
1056 }
1057 }
1058
1059 if (ret) {
1060 ret->ref = ty->ref;
1061 ret->t = ret_t;
1062 }
1063
1064 return mode;
1065 }
1066
1067 ST_FUNC int classify_x86_64_va_arg(CType *ty)
1068 {
1069 /* This definition must be synced with stdarg.h */
1070 enum __va_arg_type {
1071 __va_gen_reg, __va_float_reg, __va_ld_reg, __va_stack
1072 };
1073 int size, align, reg_count;
1074 X86_64_Mode mode = classify_x86_64_arg(ty, NULL, &size, &align, &reg_count);
1075 switch (mode) {
1076 default: return __va_stack;
1077 case x86_64_mode_x87: return __va_ld_reg;
1078 case x86_64_mode_integer: return __va_gen_reg;
1079 case x86_64_mode_sse: return __va_float_reg;
1080 }
1081 }
1082
1083 /* Return the number of registers needed to return the struct, or 0 if
1084 returning via struct pointer. */
1085 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align)
1086 {
1087 int size, align, reg_count;
1088 *ret_align = 1; // Never have to re-align return values for x86-64
1089 return (classify_x86_64_arg(vt, ret, &size, &align, &reg_count) != x86_64_mode_memory);
1090 }
1091
1092 #define REGN 6
1093 static const uint8_t arg_regs[REGN] = {
1094 TREG_RDI, TREG_RSI, TREG_RDX, TREG_RCX, TREG_R8, TREG_R9
1095 };
1096
1097 static int arg_prepare_reg(int idx) {
1098 if (idx == 2 || idx == 3)
1099 /* idx=2: r10, idx=3: r11 */
1100 return idx + 8;
1101 else
1102 return arg_regs[idx];
1103 }
1104
1105 /* Generate function call. The function address is pushed first, then
1106 all the parameters in call order. This functions pops all the
1107 parameters and the function address. */
1108 void gfunc_call(int nb_args)
1109 {
1110 X86_64_Mode mode;
1111 CType type;
1112 int size, align, r, args_size, stack_adjust, run_start, run_end, i, reg_count;
1113 int nb_reg_args = 0;
1114 int nb_sse_args = 0;
1115 int sse_reg, gen_reg;
1116
1117 /* calculate the number of integer/float register arguments */
1118 for(i = 0; i < nb_args; i++) {
1119 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1120 if (mode == x86_64_mode_sse)
1121 nb_sse_args += reg_count;
1122 else if (mode == x86_64_mode_integer)
1123 nb_reg_args += reg_count;
1124 }
1125
1126 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1127 and ended by a 16-byte aligned argument. This is because, from the point of view of
1128 the callee, argument alignment is computed from the bottom up. */
1129 /* for struct arguments, we need to call memcpy and the function
1130 call breaks register passing arguments we are preparing.
1131 So, we process arguments which will be passed by stack first. */
1132 gen_reg = nb_reg_args;
1133 sse_reg = nb_sse_args;
1134 run_start = 0;
1135 args_size = 0;
1136 while (run_start != nb_args) {
1137 int run_gen_reg = gen_reg, run_sse_reg = sse_reg;
1138
1139 run_end = nb_args;
1140 stack_adjust = 0;
1141 for(i = run_start; (i < nb_args) && (run_end == nb_args); i++) {
1142 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1143 switch (mode) {
1144 case x86_64_mode_memory:
1145 case x86_64_mode_x87:
1146 stack_arg:
1147 if (align == 16)
1148 run_end = i;
1149 else
1150 stack_adjust += size;
1151 break;
1152
1153 case x86_64_mode_sse:
1154 sse_reg -= reg_count;
1155 if (sse_reg + reg_count > 8) goto stack_arg;
1156 break;
1157
1158 case x86_64_mode_integer:
1159 gen_reg -= reg_count;
1160 if (gen_reg + reg_count > REGN) goto stack_arg;
1161 break;
1162 default: break; /* nothing to be done for x86_64_mode_none */
1163 }
1164 }
1165
1166 gen_reg = run_gen_reg;
1167 sse_reg = run_sse_reg;
1168
1169 /* adjust stack to align SSE boundary */
1170 if (stack_adjust &= 15) {
1171 /* fetch cpu flag before the following sub will change the value */
1172 if (vtop >= vstack && (vtop->r & VT_VALMASK) == VT_CMP)
1173 gv(RC_INT);
1174
1175 stack_adjust = 16 - stack_adjust;
1176 o(0x48);
1177 oad(0xec81, stack_adjust); /* sub $xxx, %rsp */
1178 args_size += stack_adjust;
1179 }
1180
1181 for(i = run_start; i < run_end;) {
1182 /* Swap argument to top, it will possibly be changed here,
1183 and might use more temps. At the end of the loop we keep
1184 in on the stack and swap it back to its original position
1185 if it is a register. */
1186 SValue tmp = vtop[0];
1187 vtop[0] = vtop[-i];
1188 vtop[-i] = tmp;
1189
1190 mode = classify_x86_64_arg(&vtop->type, NULL, &size, &align, &reg_count);
1191
1192 int arg_stored = 1;
1193 switch (vtop->type.t & VT_BTYPE) {
1194 case VT_STRUCT:
1195 if (mode == x86_64_mode_sse) {
1196 if (sse_reg > 8)
1197 sse_reg -= reg_count;
1198 else
1199 arg_stored = 0;
1200 } else if (mode == x86_64_mode_integer) {
1201 if (gen_reg > REGN)
1202 gen_reg -= reg_count;
1203 else
1204 arg_stored = 0;
1205 }
1206
1207 if (arg_stored) {
1208 /* allocate the necessary size on stack */
1209 o(0x48);
1210 oad(0xec81, size); /* sub $xxx, %rsp */
1211 /* generate structure store */
1212 r = get_reg(RC_INT);
1213 orex(1, r, 0, 0x89); /* mov %rsp, r */
1214 o(0xe0 + REG_VALUE(r));
1215 vset(&vtop->type, r | VT_LVAL, 0);
1216 vswap();
1217 vstore();
1218 args_size += size;
1219 }
1220 break;
1221
1222 case VT_LDOUBLE:
1223 assert(0);
1224 break;
1225
1226 case VT_FLOAT:
1227 case VT_DOUBLE:
1228 assert(mode == x86_64_mode_sse);
1229 if (sse_reg > 8) {
1230 --sse_reg;
1231 r = gv(RC_FLOAT);
1232 o(0x50); /* push $rax */
1233 /* movq %xmmN, (%rsp) */
1234 o(0xd60f66);
1235 o(0x04 + REG_VALUE(r)*8);
1236 o(0x24);
1237 args_size += size;
1238 } else {
1239 arg_stored = 0;
1240 }
1241 break;
1242
1243 default:
1244 assert(mode == x86_64_mode_integer);
1245 /* simple type */
1246 /* XXX: implicit cast ? */
1247 if (gen_reg > REGN) {
1248 --gen_reg;
1249 r = gv(RC_INT);
1250 orex(0,r,0,0x50 + REG_VALUE(r)); /* push r */
1251 args_size += size;
1252 } else {
1253 arg_stored = 0;
1254 }
1255 break;
1256 }
1257
1258 /* And swap the argument back to it's original position. */
1259 tmp = vtop[0];
1260 vtop[0] = vtop[-i];
1261 vtop[-i] = tmp;
1262
1263 if (arg_stored) {
1264 vrotb(i+1);
1265 assert((vtop->type.t == tmp.type.t) && (vtop->r == tmp.r));
1266 vpop();
1267 --nb_args;
1268 --run_end;
1269 } else {
1270 ++i;
1271 }
1272 }
1273
1274 /* handle 16 byte aligned arguments at end of run */
1275 run_start = i = run_end;
1276 while (i < nb_args) {
1277 /* Rotate argument to top since it will always be popped */
1278 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1279 if (align != 16)
1280 break;
1281
1282 vrotb(i+1);
1283
1284 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1285 gv(RC_ST0);
1286 oad(0xec8148, size); /* sub $xxx, %rsp */
1287 o(0x7cdb); /* fstpt 0(%rsp) */
1288 g(0x24);
1289 g(0x00);
1290 args_size += size;
1291 } else {
1292 //assert(mode == x86_64_mode_memory);
1293
1294 /* allocate the necessary size on stack */
1295 o(0x48);
1296 oad(0xec81, size); /* sub $xxx, %rsp */
1297 /* generate structure store */
1298 r = get_reg(RC_INT);
1299 orex(1, r, 0, 0x89); /* mov %rsp, r */
1300 o(0xe0 + REG_VALUE(r));
1301 vset(&vtop->type, r | VT_LVAL, 0);
1302 vswap();
1303 vstore();
1304 args_size += size;
1305 }
1306
1307 vpop();
1308 --nb_args;
1309 }
1310 }
1311
1312 /* XXX This should be superfluous. */
1313 save_regs(0); /* save used temporary registers */
1314
1315 /* then, we prepare register passing arguments.
1316 Note that we cannot set RDX and RCX in this loop because gv()
1317 may break these temporary registers. Let's use R10 and R11
1318 instead of them */
1319 assert(gen_reg <= REGN);
1320 assert(sse_reg <= 8);
1321 for(i = 0; i < nb_args; i++) {
1322 mode = classify_x86_64_arg(&vtop->type, &type, &size, &align, &reg_count);
1323 /* Alter stack entry type so that gv() knows how to treat it */
1324 vtop->type = type;
1325 if (mode == x86_64_mode_sse) {
1326 if (reg_count == 2) {
1327 sse_reg -= 2;
1328 gv(RC_FRET); /* Use pair load into xmm0 & xmm1 */
1329 if (sse_reg) { /* avoid redundant movaps %xmm0, %xmm0 */
1330 /* movaps %xmm0, %xmmN */
1331 o(0x280f);
1332 o(0xc0 + (sse_reg << 3));
1333 /* movaps %xmm1, %xmmN */
1334 o(0x280f);
1335 o(0xc1 + ((sse_reg+1) << 3));
1336 }
1337 } else {
1338 assert(reg_count == 1);
1339 --sse_reg;
1340 /* Load directly to register */
1341 gv(RC_XMM0 << sse_reg);
1342 }
1343 } else if (mode == x86_64_mode_integer) {
1344 /* simple type */
1345 /* XXX: implicit cast ? */
1346 gen_reg -= reg_count;
1347 r = gv(RC_INT);
1348 int d = arg_prepare_reg(gen_reg);
1349 orex(1,d,r,0x89); /* mov */
1350 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
1351 if (reg_count == 2) {
1352 d = arg_prepare_reg(gen_reg+1);
1353 orex(1,d,vtop->r2,0x89); /* mov */
1354 o(0xc0 + REG_VALUE(vtop->r2) * 8 + REG_VALUE(d));
1355 }
1356 }
1357 vtop--;
1358 }
1359 assert(gen_reg == 0);
1360 assert(sse_reg == 0);
1361
1362 /* We shouldn't have many operands on the stack anymore, but the
1363 call address itself is still there, and it might be in %eax
1364 (or edx/ecx) currently, which the below writes would clobber.
1365 So evict all remaining operands here. */
1366 save_regs(0);
1367
1368 /* Copy R10 and R11 into RDX and RCX, respectively */
1369 if (nb_reg_args > 2) {
1370 o(0xd2894c); /* mov %r10, %rdx */
1371 if (nb_reg_args > 3) {
1372 o(0xd9894c); /* mov %r11, %rcx */
1373 }
1374 }
1375
1376 oad(0xb8, nb_sse_args < 8 ? nb_sse_args : 8); /* mov nb_sse_args, %eax */
1377 gcall_or_jmp(0);
1378 if (args_size)
1379 gadd_sp(args_size);
1380 vtop--;
1381 }
1382
1383
1384 #define FUNC_PROLOG_SIZE 11
1385
1386 static void push_arg_reg(int i) {
1387 loc -= 8;
1388 gen_modrm64(0x89, arg_regs[i], VT_LOCAL, NULL, loc);
1389 }
1390
1391 /* generate function prolog of type 't' */
1392 void gfunc_prolog(CType *func_type)
1393 {
1394 X86_64_Mode mode;
1395 int i, addr, align, size, reg_count;
1396 int param_addr = 0, reg_param_index, sse_param_index;
1397 Sym *sym;
1398 CType *type;
1399
1400 sym = func_type->ref;
1401 addr = PTR_SIZE * 2;
1402 pop_stack = loc = 0;
1403 ind += FUNC_PROLOG_SIZE;
1404 func_sub_sp_offset = ind;
1405 func_ret_sub = 0;
1406
1407 if (func_type->ref->c == FUNC_ELLIPSIS) {
1408 int seen_reg_num, seen_sse_num, seen_stack_size;
1409 seen_reg_num = seen_sse_num = 0;
1410 /* frame pointer and return address */
1411 seen_stack_size = PTR_SIZE * 2;
1412 /* count the number of seen parameters */
1413 while ((sym = sym->next) != NULL) {
1414 type = &sym->type;
1415 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1416 switch (mode) {
1417 default:
1418 stack_arg:
1419 seen_stack_size = ((seen_stack_size + align - 1) & -align) + size;
1420 break;
1421
1422 case x86_64_mode_integer:
1423 if (seen_reg_num + reg_count <= 8) {
1424 seen_reg_num += reg_count;
1425 } else {
1426 seen_reg_num = 8;
1427 goto stack_arg;
1428 }
1429 break;
1430
1431 case x86_64_mode_sse:
1432 if (seen_sse_num + reg_count <= 8) {
1433 seen_sse_num += reg_count;
1434 } else {
1435 seen_sse_num = 8;
1436 goto stack_arg;
1437 }
1438 break;
1439 }
1440 }
1441
1442 loc -= 16;
1443 /* movl $0x????????, -0x10(%rbp) */
1444 o(0xf045c7);
1445 gen_le32(seen_reg_num * 8);
1446 /* movl $0x????????, -0xc(%rbp) */
1447 o(0xf445c7);
1448 gen_le32(seen_sse_num * 16 + 48);
1449 /* movl $0x????????, -0x8(%rbp) */
1450 o(0xf845c7);
1451 gen_le32(seen_stack_size);
1452
1453 o(0xc084);/* test %al,%al */
1454 o(0x74);/* je */
1455 g(4*(8 - seen_sse_num) + 3);
1456
1457 /* save all register passing arguments */
1458 for (i = 0; i < 8; i++) {
1459 loc -= 16;
1460 o(0x290f);/* movaps %xmm1-7,-XXX(%rbp) */
1461 gen_modrm(7 - i, VT_LOCAL, NULL, loc);
1462 }
1463 for (i = 0; i < (REGN - seen_reg_num); i++) {
1464 push_arg_reg(REGN-1 - i);
1465 }
1466 }
1467
1468 sym = func_type->ref;
1469 reg_param_index = 0;
1470 sse_param_index = 0;
1471
1472 /* if the function returns a structure, then add an
1473 implicit pointer parameter */
1474 func_vt = sym->type;
1475 mode = classify_x86_64_arg(&func_vt, NULL, &size, &align, &reg_count);
1476 if (mode == x86_64_mode_memory) {
1477 push_arg_reg(reg_param_index);
1478 func_vc = loc;
1479 reg_param_index++;
1480 }
1481 /* define parameters */
1482 while ((sym = sym->next) != NULL) {
1483 type = &sym->type;
1484 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1485 switch (mode) {
1486 case x86_64_mode_sse:
1487 if (sse_param_index + reg_count <= 8) {
1488 /* save arguments passed by register */
1489 loc -= reg_count * 8;
1490 param_addr = loc;
1491 for (i = 0; i < reg_count; ++i) {
1492 o(0xd60f66); /* movq */
1493 gen_modrm(sse_param_index, VT_LOCAL, NULL, param_addr + i*8);
1494 ++sse_param_index;
1495 }
1496 } else {
1497 addr = (addr + align - 1) & -align;
1498 param_addr = addr;
1499 addr += size;
1500 sse_param_index += reg_count;
1501 }
1502 break;
1503
1504 case x86_64_mode_memory:
1505 case x86_64_mode_x87:
1506 addr = (addr + align - 1) & -align;
1507 param_addr = addr;
1508 addr += size;
1509 break;
1510
1511 case x86_64_mode_integer: {
1512 if (reg_param_index + reg_count <= REGN) {
1513 /* save arguments passed by register */
1514 loc -= reg_count * 8;
1515 param_addr = loc;
1516 for (i = 0; i < reg_count; ++i) {
1517 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, param_addr + i*8);
1518 ++reg_param_index;
1519 }
1520 } else {
1521 addr = (addr + align - 1) & -align;
1522 param_addr = addr;
1523 addr += size;
1524 reg_param_index += reg_count;
1525 }
1526 break;
1527 }
1528 default: break; /* nothing to be done for x86_64_mode_none */
1529 }
1530 sym_push(sym->v & ~SYM_FIELD, type,
1531 VT_LOCAL | VT_LVAL, param_addr);
1532 }
1533 }
1534
1535 /* generate function epilog */
1536 void gfunc_epilog(void)
1537 {
1538 int v, saved_ind;
1539
1540 o(0xc9); /* leave */
1541 if (func_ret_sub == 0) {
1542 o(0xc3); /* ret */
1543 } else {
1544 o(0xc2); /* ret n */
1545 g(func_ret_sub);
1546 g(func_ret_sub >> 8);
1547 }
1548 /* align local size to word & save local variables */
1549 v = (-loc + 15) & -16;
1550 saved_ind = ind;
1551 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1552 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1553 o(0xec8148); /* sub rsp, stacksize */
1554 gen_le32(v);
1555 ind = saved_ind;
1556 }
1557
1558 #endif /* not PE */
1559
1560 /* generate a jump to a label */
1561 int gjmp(int t)
1562 {
1563 return psym(0xe9, t);
1564 }
1565
1566 /* generate a jump to a fixed address */
1567 void gjmp_addr(int a)
1568 {
1569 int r;
1570 r = a - ind - 2;
1571 if (r == (char)r) {
1572 g(0xeb);
1573 g(r);
1574 } else {
1575 oad(0xe9, a - ind - 5);
1576 }
1577 }
1578
1579 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1580 int gtst(int inv, int t)
1581 {
1582 int v, *p;
1583
1584 v = vtop->r & VT_VALMASK;
1585 if (v == VT_CMP) {
1586 /* fast case : can jump directly since flags are set */
1587 if (vtop->c.i & 0x100)
1588 {
1589 /* This was a float compare. If the parity flag is set
1590 the result was unordered. For anything except != this
1591 means false and we don't jump (anding both conditions).
1592 For != this means true (oring both).
1593 Take care about inverting the test. We need to jump
1594 to our target if the result was unordered and test wasn't NE,
1595 otherwise if unordered we don't want to jump. */
1596 vtop->c.i &= ~0x100;
1597 if (!inv == (vtop->c.i != TOK_NE))
1598 o(0x067a); /* jp +6 */
1599 else
1600 {
1601 g(0x0f);
1602 t = psym(0x8a, t); /* jp t */
1603 }
1604 }
1605 g(0x0f);
1606 t = psym((vtop->c.i - 16) ^ inv, t);
1607 } else if (v == VT_JMP || v == VT_JMPI) {
1608 /* && or || optimization */
1609 if ((v & 1) == inv) {
1610 /* insert vtop->c jump list in t */
1611 p = &vtop->c.i;
1612 while (*p != 0)
1613 p = (int *)(cur_text_section->data + *p);
1614 *p = t;
1615 t = vtop->c.i;
1616 } else {
1617 t = gjmp(t);
1618 gsym(vtop->c.i);
1619 }
1620 } else {
1621 if (is_float(vtop->type.t) ||
1622 (vtop->type.t & VT_BTYPE) == VT_LLONG) {
1623 vpushi(0);
1624 gen_op(TOK_NE);
1625 }
1626 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1627 /* constant jmp optimization */
1628 if ((vtop->c.i != 0) != inv)
1629 t = gjmp(t);
1630 } else {
1631 v = gv(RC_INT);
1632 orex(0,v,v,0x85);
1633 o(0xc0 + REG_VALUE(v) * 9);
1634 g(0x0f);
1635 t = psym(0x85 ^ inv, t);
1636 }
1637 }
1638 vtop--;
1639 return t;
1640 }
1641
1642 /* generate an integer binary operation */
1643 void gen_opi(int op)
1644 {
1645 int r, fr, opc, fc, c, ll, uu, cc, tt2;
1646
1647 fr = vtop[0].r;
1648 fc = vtop->c.ul;
1649 ll = is64_type(vtop[-1].type.t);
1650 cc = (fr & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
1651 tt2 = (fr & (VT_LVAL | VT_LVAL_TYPE)) == VT_LVAL;
1652
1653 switch(op) {
1654 case '+':
1655 case TOK_ADDC1: /* add with carry generation */
1656 opc = 0;
1657 gen_op8:
1658 vswap();
1659 r = gv(RC_INT);
1660 vswap();
1661 if (cc && (!ll || (int)vtop->c.ll == vtop->c.ll)) {
1662 /* constant case */
1663 c = vtop->c.i;
1664 if (c == (char)c) {
1665 /* XXX: generate inc and dec for smaller code ? */
1666 orex(ll, r, 0, 0x83);
1667 o(0xc0 + REG_VALUE(r) + opc*8);
1668 g(c);
1669 } else {
1670 orex(ll, r, 0, 0x81);
1671 oad(0xc0 + REG_VALUE(r) + opc*8, c);
1672 }
1673 } else {
1674 if(!tt2)
1675 fr = gv(RC_INT);
1676 orex(ll, fr, r, 0x03 + opc*8);
1677 if(fr >= VT_CONST)
1678 gen_modrm(r, fr, vtop->sym, fc);
1679 else
1680 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
1681 }
1682 vtop--;
1683 if (op >= TOK_ULT && op <= TOK_GT) {
1684 vtop->r = VT_CMP;
1685 vtop->c.i = op;
1686 }
1687 break;
1688 case '-':
1689 case TOK_SUBC1: /* sub with carry generation */
1690 opc = 5;
1691 goto gen_op8;
1692 case TOK_ADDC2: /* add with carry use */
1693 opc = 2;
1694 goto gen_op8;
1695 case TOK_SUBC2: /* sub with carry use */
1696 opc = 3;
1697 goto gen_op8;
1698 case '&':
1699 opc = 4;
1700 goto gen_op8;
1701 case '^':
1702 opc = 6;
1703 goto gen_op8;
1704 case '|':
1705 opc = 1;
1706 goto gen_op8;
1707 case '*':
1708 opc = 5;
1709 vswap();
1710 r = gv(RC_INT);
1711 vswap();
1712 if(!tt2)
1713 fr = gv(RC_INT);
1714 if(r == TREG_RAX){
1715 if(fr != TREG_RDX)
1716 save_reg(TREG_RDX);
1717 orex(ll, fr, r, 0xf7);
1718 if(fr >= VT_CONST)
1719 gen_modrm(opc, fr, vtop->sym, fc);
1720 else
1721 o(0xc0 + REG_VALUE(fr) + opc*8);
1722 }else{
1723 orex(ll, fr, r, 0xaf0f); /* imul fr, r */
1724 if(fr >= VT_CONST)
1725 gen_modrm(r, fr, vtop->sym, fc);
1726 else
1727 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
1728 }
1729 vtop--;
1730 break;
1731 case TOK_SHL:
1732 opc = 4;
1733 goto gen_shift;
1734 case TOK_SHR:
1735 opc = 5;
1736 goto gen_shift;
1737 case TOK_SAR:
1738 opc = 7;
1739 gen_shift:
1740 if (cc) {
1741 /* constant case */
1742 vswap();
1743 r = gv(RC_INT);
1744 vswap();
1745 c = vtop->c.i;
1746 if(c == 1){
1747 orex(ll, r, 0, 0xd1);
1748 o(0xc0 + REG_VALUE(r) + opc*8);
1749 }else{
1750 orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
1751 o(0xc0 + REG_VALUE(r) + opc*8);
1752 g(c & (ll ? 0x3f : 0x1f));
1753 }
1754 } else {
1755 /* we generate the shift in ecx */
1756 gv2(RC_INT, RC_RCX);
1757 r = vtop[-1].r;
1758 orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
1759 o(0xc0 + REG_VALUE(r) + opc*8);
1760 }
1761 vtop--;
1762 break;
1763 case TOK_UDIV:
1764 case TOK_UMOD:
1765 opc = 6;
1766 uu = 1;
1767 goto divmod;
1768 case '/':
1769 case '%':
1770 case TOK_PDIV:
1771 opc = 7;
1772 uu = 0;
1773 divmod:
1774 /* first operand must be in eax */
1775 /* XXX: need better constraint for second operand */
1776 if(!tt2){
1777 gv2(RC_RAX, RC_INT2);
1778 fr = vtop[0].r;
1779 }else{
1780 vswap();
1781 gv(RC_RAX);
1782 vswap();
1783 }
1784 save_reg(TREG_RDX);
1785 orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cdq RDX:RAX <- sign-extend of RAX. */
1786 orex(ll, fr, 0, 0xf7); /* div fr, %eax */
1787 if(fr >= VT_CONST)
1788 gen_modrm(opc, fr, vtop->sym, fc);
1789 else
1790 o(0xc0 + REG_VALUE(fr) + opc*8);
1791 if (op == '%' || op == TOK_UMOD)
1792 r = TREG_RDX;
1793 else
1794 r = TREG_RAX;
1795 vtop--;
1796 vtop->r = r;
1797 break;
1798 default:
1799 opc = 7;
1800 goto gen_op8;
1801 }
1802 }
1803
1804 void gen_opl(int op)
1805 {
1806 gen_opi(op);
1807 }
1808
1809 /* generate a floating point operation 'v = t1 op t2' instruction. The
1810 two operands are guaranted to have the same floating point type */
1811 /* XXX: need to use ST1 too */
1812 void gen_opf(int op)
1813 {
1814 int a, ft, fc, swapped, fr, r;
1815 int float_type = (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
1816
1817 /* convert constants to memory references */
1818 if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
1819 vswap();
1820 gv(float_type);
1821 vswap();
1822 }
1823 if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
1824 gv(float_type);
1825
1826 swapped = 0;
1827 fc = vtop->c.ul;
1828 ft = vtop->type.t;
1829
1830 if ((ft & VT_BTYPE) == VT_LDOUBLE) {
1831 /* swap the stack if needed so that t1 is the register and t2 is
1832 the memory reference */
1833 /* must put at least one value in the floating point register */
1834 if ((vtop[-1].r & VT_LVAL) && (vtop[0].r & VT_LVAL)) {
1835 vswap();
1836 gv(float_type);
1837 vswap();
1838 }
1839 if (vtop[-1].r & VT_LVAL) {
1840 vswap();
1841 swapped = 1;
1842 }
1843 if (op >= TOK_ULT && op <= TOK_GT) {
1844 /* load on stack second operand */
1845 load(TREG_ST0, vtop);
1846 save_reg(TREG_RAX); /* eax is used by FP comparison code */
1847 if (op == TOK_GE || op == TOK_GT)
1848 swapped = !swapped;
1849 else if (op == TOK_EQ || op == TOK_NE)
1850 swapped = 0;
1851 if (swapped)
1852 o(0xc9d9); /* fxch %st(1) */
1853 if (op == TOK_EQ || op == TOK_NE)
1854 o(0xe9da); /* fucompp */
1855 else
1856 o(0xd9de); /* fcompp */
1857 o(0xe0df); /* fnstsw %ax */
1858 if (op == TOK_EQ) {
1859 o(0x45e480); /* and $0x45, %ah */
1860 o(0x40fC80); /* cmp $0x40, %ah */
1861 } else if (op == TOK_NE) {
1862 o(0x45e480); /* and $0x45, %ah */
1863 o(0x40f480); /* xor $0x40, %ah */
1864 op = TOK_NE;
1865 } else if (op == TOK_GE || op == TOK_LE) {
1866 o(0x05c4f6); /* test $0x05, %ah */
1867 op = TOK_EQ;
1868 } else {
1869 o(0x45c4f6); /* test $0x45, %ah */
1870 op = TOK_EQ;
1871 }
1872 vtop--;
1873 vtop->r = VT_CMP;
1874 vtop->c.i = op;
1875 } else {
1876 /* no memory reference possible for long double operations */
1877 load(TREG_ST0, vtop);
1878 swapped = !swapped;
1879 switch(op) {
1880 default:
1881 case '+':
1882 a = 0;
1883 break;
1884 case '-':
1885 a = 4;
1886 if (swapped)
1887 a++;
1888 break;
1889 case '*':
1890 a = 1;
1891 break;
1892 case '/':
1893 a = 6;
1894 if (swapped)
1895 a++;
1896 break;
1897 }
1898 o(0xde); /* fxxxp %st, %st(1) */
1899 o(0xc1 + (a << 3));
1900 vtop--;
1901 }
1902 } else {
1903 vswap();
1904 gv(float_type);
1905 vswap();
1906 fr = vtop->r;
1907 r = vtop[-1].r;
1908 if (op >= TOK_ULT && op <= TOK_GT) {
1909 switch(op){
1910 case TOK_LE:
1911 op = TOK_ULE; /* setae */
1912 break;
1913 case TOK_LT:
1914 op = TOK_ULT;
1915 break;
1916 case TOK_GE:
1917 op = TOK_UGE;
1918 break;
1919 case TOK_GT:
1920 op = TOK_UGT; /* seta */
1921 break;
1922 }
1923 assert(!(vtop[-1].r & VT_LVAL));
1924 if ((ft & VT_BTYPE) == VT_DOUBLE)
1925 o(0x66);
1926 o(0x2e0f); /* ucomisd */
1927 if(fr >= VT_CONST)
1928 gen_modrm(r, fr, vtop->sym, fc);
1929 else
1930 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
1931 vtop--;
1932 vtop->r = VT_CMP;
1933 vtop->c.i = op | 0x100;
1934 } else {
1935 assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
1936 /* no memory reference possible for long double operations */
1937 switch(op) {
1938 default:
1939 case '+':
1940 a = 0;
1941 break;
1942 case '-':
1943 a = 4;
1944 break;
1945 case '*':
1946 a = 1;
1947 break;
1948 case '/':
1949 a = 6;
1950 break;
1951 }
1952 assert((ft & VT_BTYPE) != VT_LDOUBLE);
1953 assert(!(vtop[-1].r & VT_LVAL));
1954 if ((ft & VT_BTYPE) == VT_DOUBLE) {
1955 o(0xf2);
1956 } else {
1957 o(0xf3);
1958 }
1959 o(0x0f);
1960 o(0x58 + a);
1961 if(fr >= VT_CONST)
1962 gen_modrm(r, fr, vtop->sym, fc);
1963 else
1964 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
1965 vtop--;
1966 }
1967 }
1968 }
1969
1970 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1971 and 'long long' cases. */
1972 void gen_cvt_itof(int t)
1973 {
1974 int ft, bt, tbt, r;
1975
1976 ft = vtop->type.t;
1977 bt = ft & VT_BTYPE;
1978 tbt = t & VT_BTYPE;
1979 r = gv(RC_INT);
1980
1981 if (tbt == VT_LDOUBLE) {
1982 save_reg(TREG_ST0);
1983 if ((ft & VT_BTYPE) == VT_LLONG) {
1984 /* signed long long to float/double/long double (unsigned case
1985 is handled generically) */
1986 o(0x50 + REG_VALUE(r)); /* push r */
1987 o(0x242cdf); /* fildll (%rsp) */
1988 o(0x08c48348); /* add $8, %rsp */
1989 } else if ((ft & (VT_BTYPE | VT_UNSIGNED)) == (VT_INT | VT_UNSIGNED)) {
1990 /* unsigned int to float/double/long double */
1991 o(0x6a); /* push $0 */
1992 g(0x00);
1993 o(0x50 + REG_VALUE(r)); /* push r */
1994 o(0x242cdf); /* fildll (%rsp) */
1995 o(0x10c48348); /* add $16, %rsp */
1996 } else {
1997 /* int to float/double/long double */
1998 o(0x50 + REG_VALUE(r)); /* push r */
1999 o(0x2404db); /* fildl (%rsp) */
2000 o(0x08c48348); /* add $8, %rsp */
2001 }
2002 vtop->r = TREG_ST0;
2003 } else {
2004 int r_xmm;
2005 r_xmm = get_reg(RC_FLOAT);
2006 o(0xf2 + (tbt == VT_FLOAT));
2007 if ((ft & (VT_BTYPE | VT_UNSIGNED)) == (VT_INT | VT_UNSIGNED) || bt == VT_LLONG) {
2008 o(0x48); /* REX */
2009 }
2010 o(0x2a0f);
2011 o(0xc0 + REG_VALUE(r) + REG_VALUE(r_xmm)*8); /* cvtsi2sd or cvtsi2ss */
2012 vtop->r = r_xmm;
2013 }
2014 }
2015
2016 /* convert from one floating point type to another */
2017 void gen_cvt_ftof(int t)
2018 {
2019 int ft, bt, tbt, r;
2020
2021 ft = vtop->type.t;
2022 bt = ft & VT_BTYPE;
2023 tbt = t & VT_BTYPE;
2024
2025 if(bt == VT_LDOUBLE)
2026 r = get_reg(RC_FLOAT);
2027 else
2028 r = gv(RC_FLOAT);
2029 if (bt == VT_FLOAT) {
2030 if (tbt == VT_DOUBLE) {
2031 o(0x5a0f); /* cvtps2pd */
2032 o(0xc0 + REG_VALUE(r) + REG_VALUE(r) * 8);
2033 } else if (tbt == VT_LDOUBLE) {
2034 /* movss %xmm0-7,-0x10(%rsp) */
2035 o(0x110ff3);
2036 o(0xf02444 + REG_VALUE(r)*8);
2037 o(0xf02444d9); /* flds -0x10(%rsp) */
2038 vtop->r = TREG_ST0;
2039 }
2040 } else if (bt == VT_DOUBLE) {
2041 if (tbt == VT_FLOAT) {
2042 o(0x5a0f66); /* cvtpd2ps */
2043 o(0xc0 + REG_VALUE(r) + REG_VALUE(r) * 8);
2044 } else if (tbt == VT_LDOUBLE) {
2045 /* movsd %xmm0-7,-0x10(%rsp) */
2046 o(0x110ff2);
2047 o(0xf02444 + REG_VALUE(r)*8);
2048 o(0xf02444dd); /* fldl -0x10(%rsp) */
2049 vtop->r = TREG_ST0;
2050 }
2051 } else {
2052 gv(RC_ST0);
2053 if (tbt == VT_DOUBLE) {
2054 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2055 /* movsd -0x10(%rsp),%xmm0-7 */
2056 o(0x100ff2);
2057 o(0xf02444 + REG_VALUE(r)*8);
2058 vtop->r = r;
2059 } else if (tbt == VT_FLOAT) {
2060 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2061 /* movss -0x10(%rsp),%xmm0-7 */
2062 o(0x100ff3);
2063 o(0xf02444 + REG_VALUE(r)*8);
2064 vtop->r = r;
2065 }
2066 }
2067 }
2068
2069 /* convert fp to int 't' type */
2070 void gen_cvt_ftoi(int t)
2071 {
2072 int ft, bt, ll, r, r_xmm;
2073
2074 ft = vtop->type.t;
2075 bt = ft & VT_BTYPE;
2076
2077 if (bt == VT_LDOUBLE) {
2078 gen_cvt_ftof(VT_DOUBLE);
2079 bt = VT_DOUBLE;
2080 }
2081 r_xmm = gv(RC_FLOAT);
2082 if ((t & VT_BTYPE) == VT_INT)
2083 ll = 0;
2084 else
2085 ll = 1;
2086 r = get_reg(RC_INT);
2087 if (bt == VT_FLOAT) {
2088 o(0xf3);
2089 } else if (bt == VT_DOUBLE) {
2090 o(0xf2);
2091 } else {
2092 assert(0);
2093 }
2094 orex(ll, r, r_xmm, 0x2c0f); /* cvttss2si or cvttsd2si */
2095 o(0xc0 + REG_VALUE(r_xmm) + (REG_VALUE(r) << 3));
2096 vtop->r = r;
2097 }
2098
2099 /* computed goto support */
2100 void ggoto(void)
2101 {
2102 gcall_or_jmp(1);
2103 vtop--;
2104 }
2105
2106 /* Save the stack pointer onto the stack and return the location of its address */
2107 ST_FUNC void gen_vla_sp_save(int addr) {
2108 /* mov %rsp,addr(%rbp)*/
2109 gen_modrm64(0x89, TREG_RSP, VT_LOCAL, NULL, addr);
2110 }
2111
2112 /* Restore the SP from a location on the stack */
2113 ST_FUNC void gen_vla_sp_restore(int addr) {
2114 gen_modrm64(0x8b, TREG_RSP, VT_LOCAL, NULL, addr);
2115 }
2116
2117 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2118 ST_FUNC void gen_vla_alloc(CType *type, int align) {
2119 #ifdef TCC_TARGET_PE
2120 /* alloca does more than just adjust %rsp on Windows */
2121 vpush_global_sym(&func_old_type, TOK_alloca);
2122 vswap(); /* Move alloca ref past allocation size */
2123 gfunc_call(1);
2124 vset(type, REG_IRET, 0);
2125 #else
2126 int r;
2127 r = gv(RC_INT); /* allocation size */
2128 /* sub r,%rsp */
2129 o(0x2b48);
2130 o(0xe0 | REG_VALUE(r));
2131 /* We align to 16 bytes rather than align */
2132 /* and ~15, %rsp */
2133 o(0xf0e48348);
2134 /* mov %rsp, r */
2135 o(0x8948);
2136 o(0xe0 | REG_VALUE(r));
2137 vpop();
2138 vset(type, r, 0);
2139 #endif
2140 }
2141
2142
2143 /* end of x86-64 code generator */
2144 /*************************************************************/
2145 #endif /* ! TARGET_DEFS_ONLY */
2146 /******************************************************/
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