2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
37 #define RC_ST0 0x0080 /* only for long double */
42 #define RC_XMM0 0x1000
43 #define RC_XMM1 0x2000
44 #define RC_XMM2 0x4000
45 #define RC_XMM3 0x8000
46 #define RC_XMM4 0x10000
47 #define RC_XMM5 0x20000
48 #define RC_XMM6 0x40000
49 #define RC_XMM7 0x80000
50 #define RC_IRET RC_RAX /* function return: integer register */
51 #define RC_LRET RC_RDX /* function return: second integer register */
52 #define RC_FRET RC_XMM0 /* function return: float register */
53 #define RC_QRET RC_XMM1 /* function return: second float register */
55 /* pretty names for the registers */
77 TREG_ST0
= 4, // SP slot won't be used
82 #define REX_BASE(reg) (((reg) >> 3) & 1)
83 #define REG_VALUE(reg) ((reg) & 7)
85 /* return registers for function */
86 #define REG_IRET TREG_RAX /* single word int return register */
87 #define REG_LRET TREG_RDX /* second word return register (for long long) */
88 #define REG_FRET TREG_XMM0 /* float return register */
89 #define REG_QRET TREG_XMM1 /* second float return register */
91 /* defined if function parameters must be evaluated in reverse order */
92 #define INVERT_FUNC_PARAMS
94 /* pointer size, in bytes */
97 /* long double size and alignment, in bytes */
98 #define LDOUBLE_SIZE 16
99 #define LDOUBLE_ALIGN 8
100 /* maximum alignment (for aligned attribute support) */
103 /******************************************************/
106 #define EM_TCC_TARGET EM_X86_64
108 /* relocation type for 32 bit data relocation */
109 #define R_DATA_32 R_X86_64_32
110 #define R_DATA_PTR R_X86_64_64
111 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
112 #define R_COPY R_X86_64_COPY
114 #define ELF_START_ADDR 0x08048000
115 #define ELF_PAGE_SIZE 0x1000
117 /******************************************************/
118 #else /* ! TARGET_DEFS_ONLY */
119 /******************************************************/
123 ST_DATA
const int reg_classes
[NB_REGS
] = {
124 /* eax */ RC_INT
| RC_RAX
,
125 /* ecx */ RC_INT
| RC_RCX
,
126 /* edx */ RC_INT
| RC_RDX
,
140 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
141 /* xmm1 */ RC_FLOAT
| RC_XMM1
,
142 /* xmm2 */ RC_FLOAT
| RC_XMM2
,
143 /* xmm3 */ RC_FLOAT
| RC_XMM3
,
144 /* xmm4 */ RC_FLOAT
| RC_XMM4
,
145 /* xmm5 */ RC_FLOAT
| RC_XMM5
,
146 /* xmm6 an xmm7 are included so gv() can be used on them,
147 but they are not tagged with RC_FLOAT because they are
148 callee saved on Windows */
153 static unsigned long func_sub_sp_offset
;
154 static int func_ret_sub
;
156 /* XXX: make it faster ? */
161 if (ind1
> cur_text_section
->data_allocated
)
162 section_realloc(cur_text_section
, ind1
);
163 cur_text_section
->data
[ind
] = c
;
167 void o(unsigned int c
)
189 void gen_le64(int64_t c
)
201 void orex(int ll
, int r
, int r2
, int b
)
203 if ((r
& VT_VALMASK
) >= VT_CONST
)
205 if ((r2
& VT_VALMASK
) >= VT_CONST
)
207 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
208 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
212 /* output a symbol and patch all calls to it */
213 void gsym_addr(int t
, int a
)
217 ptr
= (int *)(cur_text_section
->data
+ t
);
218 n
= *ptr
; /* next value */
229 /* psym is used to put an instruction with a data field which is a
230 reference to a symbol. It is in fact the same as oad ! */
233 static int is64_type(int t
)
235 return ((t
& VT_BTYPE
) == VT_PTR
||
236 (t
& VT_BTYPE
) == VT_FUNC
||
237 (t
& VT_BTYPE
) == VT_LLONG
);
240 static int is_sse_float(int t
) {
243 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
247 /* instruction + 4 bytes data. Return the address of the data */
248 ST_FUNC
int oad(int c
, int s
)
254 if (ind1
> cur_text_section
->data_allocated
)
255 section_realloc(cur_text_section
, ind1
);
256 *(int *)(cur_text_section
->data
+ ind
) = s
;
262 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
265 greloc(cur_text_section
, sym
, ind
, R_X86_64_32
);
269 /* output constant with relocation if 'r & VT_SYM' is true */
270 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
273 greloc(cur_text_section
, sym
, ind
, R_X86_64_64
);
277 /* output constant with relocation if 'r & VT_SYM' is true */
278 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
281 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
285 /* output got address with relocation */
286 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
288 #ifndef TCC_TARGET_PE
291 greloc(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
);
292 sr
= cur_text_section
->reloc
;
293 rel
= (ElfW(Rela
) *)(sr
->data
+ sr
->data_offset
- sizeof(ElfW(Rela
)));
296 printf("picpic: %s %x %x | %02x %02x %02x\n", get_tok_str(sym
->v
, NULL
), c
, r
,
297 cur_text_section
->data
[ind
-3],
298 cur_text_section
->data
[ind
-2],
299 cur_text_section
->data
[ind
-1]
301 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
305 /* we use add c, %xxx for displacement */
307 o(0xc0 + REG_VALUE(r
));
312 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
314 op_reg
= REG_VALUE(op_reg
) << 3;
315 if ((r
& VT_VALMASK
) == VT_CONST
) {
316 /* constant memory reference */
319 gen_gotpcrel(r
, sym
, c
);
321 gen_addrpc32(r
, sym
, c
);
323 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
324 /* currently, we use only ebp as base */
326 /* short reference */
330 oad(0x85 | op_reg
, c
);
332 } else if ((r
& VT_VALMASK
) >= TREG_MEM
) {
334 g(0x80 | op_reg
| REG_VALUE(r
));
337 g(0x00 | op_reg
| REG_VALUE(r
));
340 g(0x00 | op_reg
| REG_VALUE(r
));
344 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
346 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
348 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
351 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
353 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
356 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
357 orex(1, r
, op_reg
, opcode
);
358 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
362 /* load 'r' from value 'sv' */
363 void load(int r
, SValue
*sv
)
365 int v
, t
, ft
, fc
, fr
;
370 sv
= pe_getimport(sv
, &v2
);
377 #ifndef TCC_TARGET_PE
378 /* we use indirect access via got */
379 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
380 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
381 /* use the result register as a temporal register */
382 int tr
= r
| TREG_MEM
;
384 /* we cannot use float registers as a temporal register */
385 tr
= get_reg(RC_INT
) | TREG_MEM
;
387 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
389 /* load from the temporal register */
397 if (v
== VT_LLOCAL
) {
399 v1
.r
= VT_LOCAL
| VT_LVAL
;
402 if (!(reg_classes
[fr
] & RC_INT
))
403 fr
= get_reg(RC_INT
);
407 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
409 r
= REG_VALUE(r
); /* movd */
410 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
411 b
= 0x7e0ff3; /* movq */
413 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
414 b
= 0xdb, r
= 5; /* fldt */
415 } else if ((ft
& VT_TYPE
) == VT_BYTE
) {
416 b
= 0xbe0f; /* movsbl */
417 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
418 b
= 0xb60f; /* movzbl */
419 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
420 b
= 0xbf0f; /* movswl */
421 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
422 b
= 0xb70f; /* movzwl */
424 assert(((ft
& VT_BTYPE
) == VT_INT
) || ((ft
& VT_BTYPE
) == VT_LLONG
)
425 || ((ft
& VT_BTYPE
) == VT_PTR
) || ((ft
& VT_BTYPE
) == VT_ENUM
)
426 || ((ft
& VT_BTYPE
) == VT_FUNC
));
431 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
434 gen_modrm(r
, fr
, sv
->sym
, fc
);
441 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
442 gen_addrpc32(fr
, sv
->sym
, fc
);
444 if (sv
->sym
->type
.t
& VT_STATIC
) {
446 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
447 gen_addrpc32(fr
, sv
->sym
, fc
);
450 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
451 gen_gotpcrel(r
, sv
->sym
, fc
);
454 } else if (is64_type(ft
)) {
455 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
458 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
461 } else if (v
== VT_LOCAL
) {
462 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
463 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
464 } else if (v
== VT_CMP
) {
466 if ((fc
& ~0x100) != TOK_NE
)
467 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
469 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
472 /* This was a float compare. If the parity bit is
473 set the result was unordered, meaning false for everything
474 except TOK_NE, and true for TOK_NE. */
476 o(0x037a + (REX_BASE(r
) << 8));
478 orex(0,r
,0, 0x0f); /* setxx %br */
480 o(0xc0 + REG_VALUE(r
));
481 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
484 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
485 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
488 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
490 if ((r
>= TREG_XMM0
) && (r
<= TREG_XMM7
)) {
492 /* gen_cvt_ftof(VT_DOUBLE); */
493 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
494 /* movsd -0x10(%rsp),%xmmN */
496 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
499 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
500 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
503 assert((ft
& VT_BTYPE
) == VT_DOUBLE
);
506 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
508 } else if (r
== TREG_ST0
) {
509 assert((v
>= TREG_XMM0
) || (v
<= TREG_XMM7
));
510 /* gen_cvt_ftof(VT_LDOUBLE); */
511 /* movsd %xmmN,-0x10(%rsp) */
513 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
515 o(0xf02444dd); /* fldl -0x10(%rsp) */
518 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
524 /* store register 'r' in lvalue 'v' */
525 void store(int r
, SValue
*v
)
529 /* store the REX prefix in this variable when PIC is enabled */
534 v
= pe_getimport(v
, &v2
);
539 fr
= v
->r
& VT_VALMASK
;
542 #ifndef TCC_TARGET_PE
543 /* we need to access the variable via got */
544 if (fr
== VT_CONST
&& (v
->r
& VT_SYM
)) {
545 /* mov xx(%rip), %r11 */
547 gen_gotpcrel(TREG_R11
, v
->sym
, v
->c
.ul
);
548 pic
= is64_type(bt
) ? 0x49 : 0x41;
552 /* XXX: incorrect if float reg to reg */
553 if (bt
== VT_FLOAT
) {
556 o(0x7e0f); /* movd */
558 } else if (bt
== VT_DOUBLE
) {
561 o(0xd60f); /* movq */
563 } else if (bt
== VT_LDOUBLE
) {
564 o(0xc0d9); /* fld %st(0) */
572 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
574 else if (is64_type(bt
))
580 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
585 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
586 gen_modrm64(op64
, r
, v
->r
, v
->sym
, fc
);
587 } else if (fr
!= r
) {
588 /* XXX: don't we really come here? */
590 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
593 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
594 gen_modrm(r
, v
->r
, v
->sym
, fc
);
595 } else if (fr
!= r
) {
596 /* XXX: don't we really come here? */
598 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
603 /* 'is_jmp' is '1' if it is a jump */
604 static void gcall_or_jmp(int is_jmp
)
607 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
609 if (vtop
->r
& VT_SYM
) {
610 /* relocation case */
611 greloc(cur_text_section
, vtop
->sym
,
612 ind
+ 1, R_X86_64_PC32
);
614 /* put an empty PC32 relocation */
615 put_elf_reloc(symtab_section
, cur_text_section
,
616 ind
+ 1, R_X86_64_PC32
, 0);
618 oad(0xe8 + is_jmp
, vtop
->c
.ul
- 4); /* call/jmp im */
620 /* otherwise, indirect call */
624 o(0xff); /* call/jmp *r */
625 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
632 static const uint8_t arg_regs
[REGN
] = {
633 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
636 /* Prepare arguments in R10 and R11 rather than RCX and RDX
637 because gv() will not ever use these */
638 static int arg_prepare_reg(int idx
) {
639 if (idx
== 0 || idx
== 1)
640 /* idx=0: r10, idx=1: r11 */
643 return arg_regs
[idx
];
646 static int func_scratch
;
648 /* Generate function call. The function address is pushed first, then
649 all the parameters in call order. This functions pops all the
650 parameters and the function address. */
652 void gen_offs_sp(int b
, int r
, int d
)
654 orex(1,0,r
& 0x100 ? 0 : r
, b
);
656 o(0x2444 | (REG_VALUE(r
) << 3));
659 o(0x2484 | (REG_VALUE(r
) << 3));
664 /* Return 1 if this function returns via an sret pointer, 0 otherwise */
665 ST_FUNC
int gfunc_sret(CType
*vt
, CType
*ret
, int *ret_align
) {
666 *ret_align
= 1; // Never have to re-align return values for x86-64
668 size
= type_size(vt
, &align
);
672 } else if (size
> 4) {
675 } else if (size
> 2) {
678 } else if (size
> 1) {
687 int gfunc_arg_size(CType
*type
) {
688 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
691 return type_size(type
, &align
);
694 void gfunc_call(int nb_args
)
696 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
699 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
702 /* for struct arguments, we need to call memcpy and the function
703 call breaks register passing arguments we are preparing.
704 So, we process arguments which will be passed by stack first. */
705 struct_size
= args_size
;
706 for(i
= 0; i
< nb_args
; i
++) {
709 SValue
*sv
= &vtop
[-i
];
710 bt
= (sv
->type
.t
& VT_BTYPE
);
711 size
= gfunc_arg_size(&sv
->type
);
714 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
716 if (bt
== VT_STRUCT
) {
717 /* align to stack align size */
718 size
= (size
+ 15) & ~15;
719 /* generate structure store */
721 gen_offs_sp(0x8d, r
, struct_size
);
724 /* generate memcpy call */
725 vset(&sv
->type
, r
| VT_LVAL
, 0);
729 } else if (bt
== VT_LDOUBLE
) {
731 gen_offs_sp(0xdb, 0x107, struct_size
);
736 if (func_scratch
< struct_size
)
737 func_scratch
= struct_size
;
740 struct_size
= args_size
;
742 for(i
= 0; i
< nb_args
; i
++) {
744 bt
= (vtop
->type
.t
& VT_BTYPE
);
746 size
= gfunc_arg_size(&vtop
->type
);
748 /* align to stack align size */
749 size
= (size
+ 15) & ~15;
752 gen_offs_sp(0x8d, d
, struct_size
);
753 gen_offs_sp(0x89, d
, arg
*8);
755 d
= arg_prepare_reg(arg
);
756 gen_offs_sp(0x8d, d
, struct_size
);
760 if (is_sse_float(vtop
->type
.t
)) {
761 gv(RC_XMM0
); /* only use one float register */
763 /* movq %xmm0, j*8(%rsp) */
764 gen_offs_sp(0xd60f66, 0x100, arg
*8);
766 /* movaps %xmm0, %xmmN */
768 o(0xc0 + (arg
<< 3));
769 d
= arg_prepare_reg(arg
);
770 /* mov %xmm0, %rxx */
773 o(0xc0 + REG_VALUE(d
));
776 if (bt
== VT_STRUCT
) {
777 vtop
->type
.ref
= NULL
;
778 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
779 : size
> 1 ? VT_SHORT
: VT_BYTE
;
784 gen_offs_sp(0x89, r
, arg
*8);
786 d
= arg_prepare_reg(arg
);
787 orex(1,d
,r
,0x89); /* mov */
788 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
796 /* Copy R10 and R11 into RCX and RDX, respectively */
798 o(0xd1894c); /* mov %r10, %rcx */
800 o(0xda894c); /* mov %r11, %rdx */
809 #define FUNC_PROLOG_SIZE 11
811 /* generate function prolog of type 't' */
812 void gfunc_prolog(CType
*func_type
)
814 int addr
, reg_param_index
, bt
, size
;
823 ind
+= FUNC_PROLOG_SIZE
;
824 func_sub_sp_offset
= ind
;
827 sym
= func_type
->ref
;
829 /* if the function returns a structure, then add an
830 implicit pointer parameter */
832 size
= gfunc_arg_size(&func_vt
);
834 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
840 /* define parameters */
841 while ((sym
= sym
->next
) != NULL
) {
843 bt
= type
->t
& VT_BTYPE
;
844 size
= gfunc_arg_size(type
);
846 if (reg_param_index
< REGN
) {
847 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
849 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
| VT_REF
, addr
);
851 if (reg_param_index
< REGN
) {
852 /* save arguments passed by register */
853 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
854 o(0xd60f66); /* movq */
855 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
857 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
860 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
, addr
);
866 while (reg_param_index
< REGN
) {
867 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
868 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
875 /* generate function epilog */
876 void gfunc_epilog(void)
881 if (func_ret_sub
== 0) {
886 g(func_ret_sub
>> 8);
890 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
891 /* align local size to word & save local variables */
892 v
= (func_scratch
+ -loc
+ 15) & -16;
895 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
896 oad(0xb8, v
); /* mov stacksize, %eax */
897 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
898 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
899 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
901 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
902 o(0xec8148); /* sub rsp, stacksize */
906 cur_text_section
->data_offset
= saved_ind
;
907 pe_add_unwind_data(ind
, saved_ind
, v
);
908 ind
= cur_text_section
->data_offset
;
913 static void gadd_sp(int val
)
915 if (val
== (char)val
) {
919 oad(0xc48148, val
); /* add $xxx, %rsp */
923 typedef enum X86_64_Mode
{
931 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
) {
934 else if (a
== x86_64_mode_none
)
936 else if (b
== x86_64_mode_none
)
938 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
939 return x86_64_mode_memory
;
940 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
941 return x86_64_mode_integer
;
942 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
943 return x86_64_mode_memory
;
945 return x86_64_mode_sse
;
948 static X86_64_Mode
classify_x86_64_inner(CType
*ty
) {
952 switch (ty
->t
& VT_BTYPE
) {
953 case VT_VOID
: return x86_64_mode_none
;
962 case VT_ENUM
: return x86_64_mode_integer
;
965 case VT_DOUBLE
: return x86_64_mode_sse
;
967 case VT_LDOUBLE
: return x86_64_mode_x87
;
973 if (f
->next
&& (f
->c
== f
->next
->c
))
974 return x86_64_mode_memory
;
976 mode
= x86_64_mode_none
;
977 for (; f
; f
= f
->next
)
978 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
986 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *reg_count
) {
988 int size
, align
, ret_t
;
990 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
994 mode
= x86_64_mode_integer
;
996 size
= type_size(ty
, &align
);
997 *psize
= (size
+ 7) & ~7;
1000 mode
= x86_64_mode_memory
;
1002 mode
= classify_x86_64_inner(ty
);
1004 case x86_64_mode_integer
:
1010 ret_t
= (size
> 4) ? VT_LLONG
: VT_INT
;
1014 case x86_64_mode_x87
:
1019 case x86_64_mode_sse
:
1025 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1040 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
) {
1041 /* This definition must be synced with stdarg.h */
1042 enum __va_arg_type
{
1043 __va_gen_reg
, __va_float_reg
, __va_stack
1045 int size
, reg_count
;
1046 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, ®_count
);
1048 default: return __va_stack
;
1049 case x86_64_mode_integer
: return __va_gen_reg
;
1050 case x86_64_mode_sse
: return __va_float_reg
;
1054 /* Return 1 if this function returns via an sret pointer, 0 otherwise */
1055 int gfunc_sret(CType
*vt
, CType
*ret
, int *ret_align
) {
1056 int size
, reg_count
;
1057 *ret_align
= 1; // Never have to re-align return values for x86-64
1058 return (classify_x86_64_arg(vt
, ret
, &size
, ®_count
) == x86_64_mode_memory
);
1062 static const uint8_t arg_regs
[REGN
] = {
1063 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1066 static int arg_prepare_reg(int idx
) {
1067 if (idx
== 2 || idx
== 3)
1068 /* idx=2: r10, idx=3: r11 */
1071 return arg_regs
[idx
];
1074 /* Generate function call. The function address is pushed first, then
1075 all the parameters in call order. This functions pops all the
1076 parameters and the function address. */
1077 void gfunc_call(int nb_args
)
1081 int size
, align
, r
, args_size
, i
, j
, reg_count
;
1082 int nb_reg_args
= 0;
1083 int nb_sse_args
= 0;
1084 int sse_reg
, gen_reg
;
1086 /* calculate the number of integer/float arguments */
1088 for(i
= 0; i
< nb_args
; i
++) {
1089 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, ®_count
);
1091 case x86_64_mode_memory
:
1092 case x86_64_mode_x87
:
1096 case x86_64_mode_sse
:
1097 nb_sse_args
+= reg_count
;
1098 if (nb_sse_args
> 8) args_size
+= size
;
1101 case x86_64_mode_integer
:
1102 nb_reg_args
+= reg_count
;
1103 if (nb_reg_args
> REGN
) args_size
+= size
;
1108 /* for struct arguments, we need to call memcpy and the function
1109 call breaks register passing arguments we are preparing.
1110 So, we process arguments which will be passed by stack first. */
1111 gen_reg
= nb_reg_args
;
1112 sse_reg
= nb_sse_args
;
1114 /* adjust stack to align SSE boundary */
1115 if (args_size
&= 15) {
1116 /* fetch cpu flag before the following sub will change the value */
1117 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1120 args_size
= 16 - args_size
;
1122 oad(0xec81, args_size
); /* sub $xxx, %rsp */
1125 for(i
= 0; i
< nb_args
;) {
1126 /* Swap argument to top, it will possibly be changed here,
1127 and might use more temps. At the end of the loop we keep
1128 in on the stack and swap it back to its original position
1129 if it is a register. */
1130 SValue tmp
= vtop
[0];
1134 mode
= classify_x86_64_arg(&vtop
->type
, NULL
, &size
, ®_count
);
1137 switch (vtop
->type
.t
& VT_BTYPE
) {
1139 if (mode
== x86_64_mode_sse
) {
1141 sse_reg
-= reg_count
;
1144 } else if (mode
== x86_64_mode_integer
) {
1146 gen_reg
-= reg_count
;
1152 /* allocate the necessary size on stack */
1154 oad(0xec81, size
); /* sub $xxx, %rsp */
1155 /* generate structure store */
1156 r
= get_reg(RC_INT
);
1157 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1158 o(0xe0 + REG_VALUE(r
));
1159 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1168 size
= LDOUBLE_SIZE
;
1169 oad(0xec8148, size
); /* sub $xxx, %rsp */
1170 o(0x7cdb); /* fstpt 0(%rsp) */
1178 assert(mode
== x86_64_mode_sse
);
1182 o(0x50); /* push $rax */
1183 /* movq %xmmN, (%rsp) */
1185 o(0x04 + REG_VALUE(r
)*8);
1194 assert(mode
== x86_64_mode_integer
);
1196 /* XXX: implicit cast ? */
1197 if (gen_reg
> REGN
) {
1200 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1208 /* And swap the argument back to it's original position. */
1215 assert(vtop
->type
.t
== tmp
.type
.t
);
1223 /* XXX This should be superfluous. */
1224 save_regs(0); /* save used temporary registers */
1226 /* then, we prepare register passing arguments.
1227 Note that we cannot set RDX and RCX in this loop because gv()
1228 may break these temporary registers. Let's use R10 and R11
1230 assert(gen_reg
<= REGN
);
1231 assert(sse_reg
<= 8);
1232 for(i
= 0; i
< nb_args
; i
++) {
1233 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, ®_count
);
1234 /* Alter stack entry type so that gv() knows how to treat it */
1236 if (mode
== x86_64_mode_sse
) {
1237 if (reg_count
== 2) {
1239 gv(RC_FRET
); /* Use pair load into xmm0 & xmm1 */
1240 if (sse_reg
) { /* avoid redundant movaps %xmm0, %xmm0 */
1241 /* movaps %xmm0, %xmmN */
1243 o(0xc0 + (sse_reg
<< 3));
1244 /* movaps %xmm1, %xmmN */
1246 o(0xc1 + ((sse_reg
+1) << 3));
1249 assert(reg_count
== 1);
1251 /* Load directly to register */
1252 gv(RC_XMM0
<< sse_reg
);
1254 } else if (mode
== x86_64_mode_integer
) {
1256 /* XXX: implicit cast ? */
1257 gen_reg
-= reg_count
;
1259 int d
= arg_prepare_reg(gen_reg
);
1260 orex(1,d
,r
,0x89); /* mov */
1261 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
1262 if (reg_count
== 2) {
1263 d
= arg_prepare_reg(gen_reg
+1);
1264 orex(1,d
,vtop
->r2
,0x89); /* mov */
1265 o(0xc0 + REG_VALUE(vtop
->r2
) * 8 + REG_VALUE(d
));
1270 assert(gen_reg
== 0);
1271 assert(sse_reg
== 0);
1273 /* We shouldn't have many operands on the stack anymore, but the
1274 call address itself is still there, and it might be in %eax
1275 (or edx/ecx) currently, which the below writes would clobber.
1276 So evict all remaining operands here. */
1279 /* Copy R10 and R11 into RDX and RCX, respectively */
1280 if (nb_reg_args
> 2) {
1281 o(0xd2894c); /* mov %r10, %rdx */
1282 if (nb_reg_args
> 3) {
1283 o(0xd9894c); /* mov %r11, %rcx */
1287 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1295 #define FUNC_PROLOG_SIZE 11
1297 static void push_arg_reg(int i
) {
1299 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1302 /* generate function prolog of type 't' */
1303 void gfunc_prolog(CType
*func_type
)
1306 int i
, addr
, align
, size
, reg_count
;
1307 int param_addr
, reg_param_index
, sse_param_index
;
1311 sym
= func_type
->ref
;
1312 addr
= PTR_SIZE
* 2;
1314 ind
+= FUNC_PROLOG_SIZE
;
1315 func_sub_sp_offset
= ind
;
1318 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
1319 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1320 seen_reg_num
= seen_sse_num
= 0;
1321 /* frame pointer and return address */
1322 seen_stack_size
= PTR_SIZE
* 2;
1323 /* count the number of seen parameters */
1324 sym
= func_type
->ref
;
1325 while ((sym
= sym
->next
) != NULL
) {
1327 mode
= classify_x86_64_arg(type
, NULL
, &size
, ®_count
);
1330 seen_stack_size
+= size
;
1333 case x86_64_mode_integer
:
1334 if (seen_reg_num
+ reg_count
<= 8) {
1335 seen_reg_num
+= reg_count
;
1338 seen_stack_size
+= size
;
1342 case x86_64_mode_sse
:
1343 if (seen_sse_num
+ reg_count
<= 8) {
1344 seen_sse_num
+= reg_count
;
1347 seen_stack_size
+= size
;
1354 /* movl $0x????????, -0x10(%rbp) */
1356 gen_le32(seen_reg_num
* 8);
1357 /* movl $0x????????, -0xc(%rbp) */
1359 gen_le32(seen_sse_num
* 16 + 48);
1360 /* movl $0x????????, -0x8(%rbp) */
1362 gen_le32(seen_stack_size
);
1364 /* save all register passing arguments */
1365 for (i
= 0; i
< 8; i
++) {
1367 o(0xd60f66); /* movq */
1368 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1369 /* movq $0, loc+8(%rbp) */
1374 for (i
= 0; i
< REGN
; i
++) {
1375 push_arg_reg(REGN
-1-i
);
1379 sym
= func_type
->ref
;
1380 reg_param_index
= 0;
1381 sse_param_index
= 0;
1383 /* if the function returns a structure, then add an
1384 implicit pointer parameter */
1385 func_vt
= sym
->type
;
1386 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, ®_count
);
1387 if (mode
== x86_64_mode_memory
) {
1388 push_arg_reg(reg_param_index
);
1392 /* define parameters */
1393 while ((sym
= sym
->next
) != NULL
) {
1395 mode
= classify_x86_64_arg(type
, NULL
, &size
, ®_count
);
1397 case x86_64_mode_sse
:
1398 if (sse_param_index
+ reg_count
<= 8) {
1399 /* save arguments passed by register */
1400 loc
-= reg_count
* 8;
1402 for (i
= 0; i
< reg_count
; ++i
) {
1403 o(0xd60f66); /* movq */
1404 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1410 sse_param_index
+= reg_count
;
1414 case x86_64_mode_memory
:
1415 case x86_64_mode_x87
:
1420 case x86_64_mode_integer
: {
1421 if (reg_param_index
+ reg_count
<= REGN
) {
1422 /* save arguments passed by register */
1423 loc
-= reg_count
* 8;
1425 for (i
= 0; i
< reg_count
; ++i
) {
1426 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1432 reg_param_index
+= reg_count
;
1437 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1438 VT_LOCAL
| VT_LVAL
, param_addr
);
1442 /* generate function epilog */
1443 void gfunc_epilog(void)
1447 o(0xc9); /* leave */
1448 if (func_ret_sub
== 0) {
1451 o(0xc2); /* ret n */
1453 g(func_ret_sub
>> 8);
1455 /* align local size to word & save local variables */
1456 v
= (-loc
+ 15) & -16;
1458 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1459 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1460 o(0xec8148); /* sub rsp, stacksize */
1467 /* generate a jump to a label */
1470 return psym(0xe9, t
);
1473 /* generate a jump to a fixed address */
1474 void gjmp_addr(int a
)
1482 oad(0xe9, a
- ind
- 5);
1486 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1487 int gtst(int inv
, int t
)
1491 v
= vtop
->r
& VT_VALMASK
;
1493 /* fast case : can jump directly since flags are set */
1494 if (vtop
->c
.i
& 0x100)
1496 /* This was a float compare. If the parity flag is set
1497 the result was unordered. For anything except != this
1498 means false and we don't jump (anding both conditions).
1499 For != this means true (oring both).
1500 Take care about inverting the test. We need to jump
1501 to our target if the result was unordered and test wasn't NE,
1502 otherwise if unordered we don't want to jump. */
1503 vtop
->c
.i
&= ~0x100;
1504 if (!inv
== (vtop
->c
.i
!= TOK_NE
))
1505 o(0x067a); /* jp +6 */
1509 t
= psym(0x8a, t
); /* jp t */
1513 t
= psym((vtop
->c
.i
- 16) ^ inv
, t
);
1514 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1515 /* && or || optimization */
1516 if ((v
& 1) == inv
) {
1517 /* insert vtop->c jump list in t */
1520 p
= (int *)(cur_text_section
->data
+ *p
);
1528 if (is_float(vtop
->type
.t
) ||
1529 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1533 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1534 /* constant jmp optimization */
1535 if ((vtop
->c
.i
!= 0) != inv
)
1540 o(0xc0 + REG_VALUE(v
) * 9);
1542 t
= psym(0x85 ^ inv
, t
);
1549 /* generate an integer binary operation */
1550 void gen_opi(int op
)
1555 ll
= is64_type(vtop
[-1].type
.t
);
1556 uu
= (vtop
[-1].type
.t
& VT_UNSIGNED
) != 0;
1557 cc
= (vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1561 case TOK_ADDC1
: /* add with carry generation */
1564 if (cc
&& (!ll
|| (int)vtop
->c
.ll
== vtop
->c
.ll
)) {
1571 /* XXX: generate inc and dec for smaller code ? */
1572 orex(ll
, r
, 0, 0x83);
1573 o(0xc0 | (opc
<< 3) | REG_VALUE(r
));
1576 orex(ll
, r
, 0, 0x81);
1577 oad(0xc0 | (opc
<< 3) | REG_VALUE(r
), c
);
1580 gv2(RC_INT
, RC_INT
);
1583 orex(ll
, r
, fr
, (opc
<< 3) | 0x01);
1584 o(0xc0 + REG_VALUE(r
) + REG_VALUE(fr
) * 8);
1587 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1593 case TOK_SUBC1
: /* sub with carry generation */
1596 case TOK_ADDC2
: /* add with carry use */
1599 case TOK_SUBC2
: /* sub with carry use */
1612 gv2(RC_INT
, RC_INT
);
1615 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1616 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
) * 8);
1628 opc
= 0xc0 | (opc
<< 3);
1634 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1635 o(opc
| REG_VALUE(r
));
1636 g(vtop
->c
.i
& (ll
? 63 : 31));
1638 /* we generate the shift in ecx */
1639 gv2(RC_INT
, RC_RCX
);
1641 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1642 o(opc
| REG_VALUE(r
));
1655 /* first operand must be in eax */
1656 /* XXX: need better constraint for second operand */
1657 gv2(RC_RAX
, RC_RCX
);
1662 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1663 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1664 o((uu
? 0xf0 : 0xf8) + REG_VALUE(fr
));
1665 if (op
== '%' || op
== TOK_UMOD
)
1677 void gen_opl(int op
)
1682 /* generate a floating point operation 'v = t1 op t2' instruction. The
1683 two operands are guaranted to have the same floating point type */
1684 /* XXX: need to use ST1 too */
1685 void gen_opf(int op
)
1687 int a
, ft
, fc
, swapped
, r
;
1689 (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1691 /* convert constants to memory references */
1692 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1697 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1700 /* must put at least one value in the floating point register */
1701 if ((vtop
[-1].r
& VT_LVAL
) &&
1702 (vtop
[0].r
& VT_LVAL
)) {
1708 /* swap the stack if needed so that t1 is the register and t2 is
1709 the memory reference */
1710 if (vtop
[-1].r
& VT_LVAL
) {
1714 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1715 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1716 /* load on stack second operand */
1717 load(TREG_ST0
, vtop
);
1718 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1719 if (op
== TOK_GE
|| op
== TOK_GT
)
1721 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1724 o(0xc9d9); /* fxch %st(1) */
1725 o(0xe9da); /* fucompp */
1726 o(0xe0df); /* fnstsw %ax */
1728 o(0x45e480); /* and $0x45, %ah */
1729 o(0x40fC80); /* cmp $0x40, %ah */
1730 } else if (op
== TOK_NE
) {
1731 o(0x45e480); /* and $0x45, %ah */
1732 o(0x40f480); /* xor $0x40, %ah */
1734 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1735 o(0x05c4f6); /* test $0x05, %ah */
1738 o(0x45c4f6); /* test $0x45, %ah */
1745 /* no memory reference possible for long double operations */
1746 load(TREG_ST0
, vtop
);
1770 o(0xde); /* fxxxp %st, %st(1) */
1775 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1776 /* if saved lvalue, then we must reload it */
1779 if ((r
& VT_VALMASK
) == VT_LLOCAL
) {
1781 r
= get_reg(RC_INT
);
1783 v1
.r
= VT_LOCAL
| VT_LVAL
;
1789 if (op
== TOK_EQ
|| op
== TOK_NE
) {
1792 if (op
== TOK_LE
|| op
== TOK_LT
)
1794 if (op
== TOK_LE
|| op
== TOK_GE
) {
1795 op
= 0x93; /* setae */
1797 op
= 0x97; /* seta */
1805 assert(!(vtop
[-1].r
& VT_LVAL
));
1807 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1809 o(0x2e0f); /* ucomisd */
1811 if (vtop
->r
& VT_LVAL
) {
1812 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
1814 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
1819 vtop
->c
.i
= op
| 0x100;
1821 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
1839 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
1842 /* if saved lvalue, then we must reload it */
1843 if ((vtop
->r
& VT_VALMASK
) == VT_LLOCAL
) {
1845 r
= get_reg(RC_INT
);
1847 v1
.r
= VT_LOCAL
| VT_LVAL
;
1853 assert(!(vtop
[-1].r
& VT_LVAL
));
1855 assert(vtop
->r
& VT_LVAL
);
1860 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
1868 if (vtop
->r
& VT_LVAL
) {
1869 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
1871 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
1879 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1880 and 'long long' cases. */
1881 void gen_cvt_itof(int t
)
1883 if ((t
& VT_BTYPE
) == VT_LDOUBLE
) {
1886 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1887 /* signed long long to float/double/long double (unsigned case
1888 is handled generically) */
1889 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
1890 o(0x242cdf); /* fildll (%rsp) */
1891 o(0x08c48348); /* add $8, %rsp */
1892 } else if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
1893 (VT_INT
| VT_UNSIGNED
)) {
1894 /* unsigned int to float/double/long double */
1895 o(0x6a); /* push $0 */
1897 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
1898 o(0x242cdf); /* fildll (%rsp) */
1899 o(0x10c48348); /* add $16, %rsp */
1901 /* int to float/double/long double */
1902 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
1903 o(0x2404db); /* fildl (%rsp) */
1904 o(0x08c48348); /* add $8, %rsp */
1908 int r
= get_reg(RC_FLOAT
);
1910 o(0xf2 + ((t
& VT_BTYPE
) == VT_FLOAT
?1:0));
1911 if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
1912 (VT_INT
| VT_UNSIGNED
) ||
1913 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1917 o(0xc0 + (vtop
->r
& VT_VALMASK
) + REG_VALUE(r
)*8); /* cvtsi2sd */
1922 /* convert from one floating point type to another */
1923 void gen_cvt_ftof(int t
)
1931 if (bt
== VT_FLOAT
) {
1933 if (tbt
== VT_DOUBLE
) {
1934 o(0x140f); /* unpcklps */
1935 o(0xc0 + REG_VALUE(vtop
->r
)*9);
1936 o(0x5a0f); /* cvtps2pd */
1937 o(0xc0 + REG_VALUE(vtop
->r
)*9);
1938 } else if (tbt
== VT_LDOUBLE
) {
1940 /* movss %xmm0,-0x10(%rsp) */
1942 o(0x44 + REG_VALUE(vtop
->r
)*8);
1944 o(0xf02444d9); /* flds -0x10(%rsp) */
1947 } else if (bt
== VT_DOUBLE
) {
1949 if (tbt
== VT_FLOAT
) {
1950 o(0x140f66); /* unpcklpd */
1951 o(0xc0 + REG_VALUE(vtop
->r
)*9);
1952 o(0x5a0f66); /* cvtpd2ps */
1953 o(0xc0 + REG_VALUE(vtop
->r
)*9);
1954 } else if (tbt
== VT_LDOUBLE
) {
1956 /* movsd %xmm0,-0x10(%rsp) */
1958 o(0x44 + REG_VALUE(vtop
->r
)*8);
1960 o(0xf02444dd); /* fldl -0x10(%rsp) */
1965 int r
= get_reg(RC_FLOAT
);
1966 if (tbt
== VT_DOUBLE
) {
1967 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
1968 /* movsd -0x10(%rsp),%xmm0 */
1970 o(0x44 + REG_VALUE(r
)*8);
1973 } else if (tbt
== VT_FLOAT
) {
1974 o(0xf0245cd9); /* fstps -0x10(%rsp) */
1975 /* movss -0x10(%rsp),%xmm0 */
1977 o(0x44 + REG_VALUE(r
)*8);
1984 /* convert fp to int 't' type */
1985 void gen_cvt_ftoi(int t
)
1987 int ft
, bt
, size
, r
;
1990 if (bt
== VT_LDOUBLE
) {
1991 gen_cvt_ftof(VT_DOUBLE
);
2001 r
= get_reg(RC_INT
);
2002 if (bt
== VT_FLOAT
) {
2004 } else if (bt
== VT_DOUBLE
) {
2009 orex(size
== 8, r
, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2010 o(0xc0 + REG_VALUE(vtop
->r
) + REG_VALUE(r
)*8);
2014 /* computed goto support */
2021 /* end of x86-64 code generator */
2022 /*************************************************************/
2023 #endif /* ! TARGET_DEFS_ONLY */
2024 /******************************************************/