i386-gen.c

   1 /*
   2  *  X86 code generator for TCC
   3  *
   4  *  Copyright (c) 2001 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 /* number of available registers */
  22 #define NB_REGS             4
  23
  24 /* a register can belong to several classes */
  25 #define RC_INT     0x0001 /* generic integer register */
  26 #define RC_FLOAT   0x0002 /* generic float register */
  27 #define RC_EAX     0x0004
  28 #define RC_FRET    0x0008 /* function return: float register */
  29 #define RC_ECX     0x0010
  30 #define RC_EDX     0x0020
  31 #define RC_IRET    RC_EAX /* function return: integer register */
  32 #define RC_LRET    RC_EDX /* function return: second integer register */
  33
  34 /* pretty names for the registers */
  35 enum {
  36     REG_EAX = 0,
  37     REG_ECX,
  38     REG_EDX,
  39     REG_ST0,
  40 };
  41
  42 int reg_classes[NB_REGS] = {
  43     /* eax */ RC_INT | RC_IRET,
  44     /* ecx */ RC_INT | RC_ECX,
  45     /* edx */ RC_INT | RC_EDX,
  46     /* st0 */ RC_FLOAT | RC_FRET,
  47 };
  48
  49 /* return registers for function */
  50 #define REG_IRET REG_EAX /* single word int return register */
  51 #define REG_LRET REG_EDX /* second word return register (for long long) */
  52 #define REG_FRET REG_ST0 /* float return register */
  53
  54 /* defined if function parameters must be evaluated in reverse order */
  55 #define INVERT_FUNC_PARAMS
  56
  57 /* defined if structures are passed as pointers. Otherwise structures
  58    are directly pushed on stack. */
  59 //#define FUNC_STRUCT_PARAM_AS_PTR
  60
  61 /* pointer size, in bytes */
  62 #define PTR_SIZE 4
  63
  64 /* long double size and alignment, in bytes */
  65 #define LDOUBLE_SIZE  12
  66 #define LDOUBLE_ALIGN 4
  67
  68 /* function call context */
  69 typedef struct GFuncContext {
  70     int args_size;
  71 } GFuncContext;
  72
  73 /******************************************************/
  74
  75 void g(int c)
  76 {
  77     *(char *)ind++ = c;
  78 }
  79
  80 void o(int c)
  81 {
  82     while (c) {
  83         g(c);
  84         c = c / 256;
  85     }
  86 }
  87
  88 void gen_le32(int c)
  89 {
  90     g(c);
  91     g(c >> 8);
  92     g(c >> 16);
  93     g(c >> 24);
  94 }
  95
  96 /* patch relocation entry with value 'val' */
  97 void greloc_patch1(Reloc *p, int val)
  98 {
  99     switch(p->type) {
 100     case RELOC_ADDR32:
 101         *(int *)p->addr = val;
 102         break;
 103     case RELOC_REL32:
 104         *(int *)p->addr = val - p->addr - 4;
 105         break;
 106     }
 107 }
 108
 109 /* output a symbol and patch all calls to it */
 110 void gsym_addr(t, a)
 111 {
 112     int n;
 113     while (t) {
 114         n = *(int *)t; /* next value */
 115         *(int *)t = a - t - 4;
 116         t = n;
 117     }
 118 }
 119
 120 void gsym(t)
 121 {
 122     gsym_addr(t, ind);
 123 }
 124
 125 /* psym is used to put an instruction with a data field which is a
 126    reference to a symbol. It is in fact the same as oad ! */
 127 #define psym oad
 128
 129 /* instruction + 4 bytes data. Return the address of the data */
 130 int oad(int c, int s)
 131 {
 132     o(c);
 133     *(int *)ind = s;
 134     s = ind;
 135     ind = ind + 4;
 136     return s;
 137 }
 138
 139 /* output constant with relocation if 'r & VT_FORWARD' is true */
 140 void gen_addr32(int r, int c)
 141 {
 142     if (!(r & VT_FORWARD)) {
 143         gen_le32(c);
 144     } else {
 145         greloc((Sym *)c, ind, RELOC_ADDR32);
 146         gen_le32(0);
 147     }
 148 }
 149
 150 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
 151    opcode bits */
 152 void gen_modrm(int op_reg, int r, int c)
 153 {
 154     op_reg = op_reg << 3;
 155     if ((r & VT_VALMASK) == VT_CONST) {
 156         /* constant memory reference */
 157         o(0x05 | op_reg);
 158         gen_addr32(r, c);
 159     } else if ((r & VT_VALMASK) == VT_LOCAL) {
 160         /* currently, we use only ebp as base */
 161         if (c == (char)c) {
 162             /* short reference */
 163             o(0x45 | op_reg);
 164             g(c);
 165         } else {
 166             oad(0x85 | op_reg, c);
 167         }
 168     } else {
 169         g(0x00 | op_reg | (r & VT_VALMASK));
 170     }
 171 }
 172
 173
 174 /* load 'r' from value 'sv' */
 175 void load(int r, SValue *sv)
 176 {
 177     int v, t, ft, fc, fr;
 178     SValue v1;
 179
 180     fr = sv->r;
 181     ft = sv->t;
 182     fc = sv->c.ul;
 183
 184     v = fr & VT_VALMASK;
 185     if (fr & VT_LVAL) {
 186         if (v == VT_LLOCAL) {
 187             v1.t = VT_INT;
 188             v1.r = VT_LOCAL | VT_LVAL;
 189             v1.c.ul = fc;
 190             load(r, &v1);
 191             fr = r;
 192         }
 193         if ((ft & VT_BTYPE) == VT_FLOAT) {
 194             o(0xd9); /* flds */
 195             r = 0;
 196         } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
 197             o(0xdd); /* fldl */
 198             r = 0;
 199         } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
 200             o(0xdb); /* fldt */
 201             r = 5;
 202         } else if ((ft & VT_TYPE) == VT_BYTE)
 203             o(0xbe0f);   /* movsbl */
 204         else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED))
 205             o(0xb60f);   /* movzbl */
 206         else if ((ft & VT_TYPE) == VT_SHORT)
 207             o(0xbf0f);   /* movswl */
 208         else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED))
 209             o(0xb70f);   /* movzwl */
 210         else
 211             o(0x8b);     /* movl */
 212         gen_modrm(r, fr, fc);
 213     } else {
 214         if (v == VT_CONST) {
 215             o(0xb8 + r); /* mov $xx, r */
 216             gen_addr32(fr, fc);
 217         } else if (v == VT_LOCAL) {
 218             o(0x8d); /* lea xxx(%ebp), r */
 219             gen_modrm(r, VT_LOCAL, fc);
 220         } else if (v == VT_CMP) {
 221             oad(0xb8 + r, 0); /* mov $0, r */
 222             o(0x0f); /* setxx %br */
 223             o(fc);
 224             o(0xc0 + r);
 225         } else if (v == VT_JMP || v == VT_JMPI) {
 226             t = v & 1;
 227             oad(0xb8 + r, t); /* mov $1, r */
 228             oad(0xe9, 5); /* jmp after */
 229             gsym(fc);
 230             oad(0xb8 + r, t ^ 1); /* mov $0, r */
 231         } else if (v != r) {
 232             o(0x89);
 233             o(0xc0 + r + v * 8); /* mov v, r */
 234         }
 235     }
 236 }
 237
 238 /* store register 'r' in lvalue 'v' */
 239 void store(int r, SValue *v)
 240 {
 241     int fr, bt, ft, fc;
 242
 243     ft = v->t;
 244     fc = v->c.ul;
 245     fr = v->r & VT_VALMASK;
 246     bt = ft & VT_BTYPE;
 247     /* XXX: incorrect if float reg to reg */
 248     if (bt == VT_FLOAT) {
 249         o(0xd9); /* fsts */
 250         r = 2;
 251     } else if (bt == VT_DOUBLE) {
 252         o(0xdd); /* fstpl */
 253         r = 2;
 254     } else if (bt == VT_LDOUBLE) {
 255         o(0xc0d9); /* fld %st(0) */
 256         o(0xdb); /* fstpt */
 257         r = 7;
 258     } else {
 259         if (bt == VT_SHORT)
 260             o(0x66);
 261         if (bt == VT_BYTE)
 262             o(0x88);
 263         else
 264             o(0x89);
 265     }
 266     if (fr == VT_CONST ||
 267         fr == VT_LOCAL ||
 268         (v->r & VT_LVAL)) {
 269         gen_modrm(r, v->r, fc);
 270     } else if (fr != r) {
 271         o(0xc0 + fr + r * 8); /* mov r, fr */
 272     }
 273 }
 274
 275 /* start function call and return function call context */
 276 void gfunc_start(GFuncContext *c)
 277 {
 278     c->args_size = 0;
 279 }
 280
 281 /* push function parameter which is in (vtop->t, vtop->c). Stack entry
 282    is then popped. */
 283 void gfunc_param(GFuncContext *c)
 284 {
 285     int size, align, r;
 286
 287     if ((vtop->t & VT_BTYPE) == VT_STRUCT) {
 288         size = type_size(vtop->t, &align);
 289         /* align to stack align size */
 290         size = (size + 3) & ~3;
 291         /* allocate the necessary size on stack */
 292         oad(0xec81, size); /* sub $xxx, %esp */
 293         /* generate structure store */
 294         r = get_reg(RC_INT);
 295         o(0x89); /* mov %esp, r */
 296         o(0xe0 + r);
 297         vset(VT_INT, r, 0);
 298         vswap();
 299         vstore();
 300         c->args_size += size;
 301     } else if (is_float(vtop->t)) {
 302         gv(RC_FLOAT); /* only one float register */
 303         if ((vtop->t & VT_BTYPE) == VT_FLOAT)
 304             size = 4;
 305         else if ((vtop->t & VT_BTYPE) == VT_DOUBLE)
 306             size = 8;
 307         else
 308             size = 12;
 309         oad(0xec81, size); /* sub $xxx, %esp */
 310         if (size == 12)
 311             o(0x7cdb);
 312         else
 313             o(0x5cd9 + size - 4); /* fstp[s|l] 0(%esp) */
 314         g(0x24);
 315         g(0x00);
 316         c->args_size += size;
 317     } else {
 318         /* simple type (currently always same size) */
 319         /* XXX: implicit cast ? */
 320         r = gv(RC_INT);
 321         if ((vtop->t & VT_BTYPE) == VT_LLONG) {
 322             size = 8;
 323             o(0x50 + vtop->r2); /* push r */
 324         } else {
 325             size = 4;
 326         }
 327         o(0x50 + r); /* push r */
 328         c->args_size += size;
 329     }
 330     vtop--;
 331 }
 332
 333 /* generate function call with address in (vtop->t, vtop->c) and free function
 334    context. Stack entry is popped */
 335 void gfunc_call(GFuncContext *c)
 336 {
 337     int r;
 338     if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
 339         /* constant case */
 340         /* forward reference */
 341         if (vtop->r & VT_FORWARD) {
 342             greloc(vtop->c.sym, ind + 1, RELOC_REL32);
 343             oad(0xe8, 0);
 344         } else {
 345             oad(0xe8, vtop->c.ul - ind - 5);
 346         }
 347     } else {
 348         /* otherwise, indirect call */
 349         r = gv(RC_INT);
 350         o(0xff); /* call *r */
 351         o(0xd0 + r);
 352     }
 353     if (c->args_size)
 354         oad(0xc481, c->args_size); /* add $xxx, %esp */
 355     vtop--;
 356 }
 357
 358 int gjmp(int t)
 359 {
 360     return psym(0xe9, t);
 361 }
 362
 363 /* generate a test. set 'inv' to invert test. Stack entry is popped */
 364 int gtst(int inv, int t)
 365 {
 366     int v, *p;
 367     v = vtop->r & VT_VALMASK;
 368     if (v == VT_CMP) {
 369         /* fast case : can jump directly since flags are set */
 370         g(0x0f);
 371         t = psym((vtop->c.i - 16) ^ inv, t);
 372     } else if (v == VT_JMP || v == VT_JMPI) {
 373         /* && or || optimization */
 374         if ((v & 1) == inv) {
 375             /* insert vtop->c jump list in t */
 376             p = &vtop->c.i;
 377             while (*p != 0)
 378                 p = (int *)*p;
 379             *p = t;
 380             t = vtop->c.i;
 381         } else {
 382             t = gjmp(t);
 383             gsym(vtop->c.i);
 384         }
 385     } else {
 386         if (is_float(vtop->t)) {
 387             vpushi(0);
 388             gen_op(TOK_NE);
 389         }
 390         if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
 391             /* constant jmp optimization */
 392             if ((vtop->c.i != 0) != inv)
 393                 t = gjmp(t);
 394         } else {
 395             v = gv(RC_INT);
 396             o(0x85);
 397             o(0xc0 + v * 9);
 398             g(0x0f);
 399             t = psym(0x85 ^ inv, t);
 400         }
 401     }
 402     vtop--;
 403     return t;
 404 }
 405
 406 /* generate an integer binary operation */
 407 void gen_opi(int op)
 408 {
 409     int r, fr, opc, c;
 410
 411     switch(op) {
 412     case '+':
 413     case TOK_ADDC1: /* add with carry generation */
 414         opc = 0;
 415     gen_op8:
 416         vswap();
 417         r = gv(RC_INT);
 418         vswap();
 419         if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
 420             /* constant case */
 421             c = vtop->c.i;
 422             if (c == (char)c) {
 423                 /* XXX: generate inc and dec for smaller code ? */
 424                 o(0x83);
 425                 o(0xc0 | (opc << 3) | r);
 426                 g(c);
 427             } else {
 428                 o(0x81);
 429                 oad(0xc0 | (opc << 3) | r, c);
 430             }
 431         } else {
 432             fr = gv(RC_INT);
 433             o((opc << 3) | 0x01);
 434             o(0xc0 + r + fr * 8);
 435         }
 436         vtop--;
 437         if (op >= TOK_ULT && op <= TOK_GT) {
 438             vtop--;
 439             vset(VT_INT, VT_CMP, op);
 440         }
 441         break;
 442     case '-':
 443     case TOK_SUBC1: /* sub with carry generation */
 444         opc = 5;
 445         goto gen_op8;
 446     case TOK_ADDC2: /* add with carry use */
 447         opc = 2;
 448         goto gen_op8;
 449     case TOK_SUBC2: /* sub with carry use */
 450         opc = 3;
 451         goto gen_op8;
 452     case '&':
 453         opc = 4;
 454         goto gen_op8;
 455     case '^':
 456         opc = 6;
 457         goto gen_op8;
 458     case '|':
 459         opc = 1;
 460         goto gen_op8;
 461     case '*':
 462         vswap();
 463         r = gv(RC_INT);
 464         vswap();
 465         fr = gv(RC_INT);
 466         vtop--;
 467         o(0xaf0f); /* imul fr, r */
 468         o(0xc0 + fr + r * 8);
 469         break;
 470     case TOK_SHL:
 471         opc = 4;
 472         goto gen_shift;
 473     case TOK_SHR:
 474         opc = 5;
 475         goto gen_shift;
 476     case TOK_SAR:
 477         opc = 7;
 478     gen_shift:
 479         vswap();
 480         r = gv(RC_INT);
 481         vswap();
 482         opc = 0xc0 | (opc << 3);
 483         if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
 484             /* constant case */
 485             c = vtop->c.i & 0x1f;
 486             o(0xc1); /* shl/shr/sar $xxx, r */
 487             o(opc | r);
 488             g(c);
 489         } else {
 490             /* we generate the shift in ecx */
 491             gv(RC_ECX);
 492             /* the first op may have been spilled, so we reload it if
 493                needed */
 494             vswap();
 495             r = gv(RC_INT);
 496             vswap();
 497             o(0xd3); /* shl/shr/sar %cl, r */
 498             o(opc | r);
 499         }
 500         vtop--;
 501         vtop->r = r;
 502         break;
 503     case '/':
 504     case TOK_UDIV:
 505     case TOK_PDIV:
 506     case '%':
 507     case TOK_UMOD:
 508     case TOK_UMULL:
 509         vswap();
 510         r = gv(RC_EAX); /* first operand must be in eax */
 511         vswap();
 512         /* XXX: need better constraint */
 513         fr = gv(RC_ECX); /* second operand in ecx */
 514         vswap();
 515         r = gv(RC_EAX); /* reload first operand if flushed */
 516         vswap();
 517         vtop--;
 518         save_reg(REG_EDX);
 519         if (op == TOK_UMULL) {
 520             o(0xf7); /* mul fr */
 521             o(0xe0 + fr);
 522             vtop->r2 = REG_EDX;
 523             r = REG_EAX;
 524         } else {
 525             if (op == TOK_UDIV || op == TOK_UMOD) {
 526                 o(0xf7d231); /* xor %edx, %edx, div fr, %eax */
 527                 o(0xf0 + fr);
 528             } else {
 529                 o(0xf799); /* cltd, idiv fr, %eax */
 530                 o(0xf8 + fr);
 531             }
 532             if (op == '%' || op == TOK_UMOD)
 533                 r = REG_EDX;
 534             else
 535                 r = REG_EAX;
 536         }
 537         vtop->r = r;
 538         break;
 539     default:
 540         opc = 7;
 541         goto gen_op8;
 542     }
 543 }
 544
 545 /* generate a floating point operation 'v = t1 op t2' instruction. The
 546    two operands are guaranted to have the same floating point type */
 547 /* NOTE: currently floats can only be lvalues */
 548 void gen_opf(int op)
 549 {
 550     int a, ft, fc, swapped;
 551
 552     /* convert constants to memory references */
 553     if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
 554         vswap();
 555         gv(RC_FLOAT);
 556         vswap();
 557     }
 558     if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
 559         gv(RC_FLOAT);
 560
 561     /* must put at least one value in the floating point register */
 562     if ((vtop[-1].r & VT_LVAL) &&
 563         (vtop[0].r & VT_LVAL)) {
 564         vswap();
 565         gv(RC_FLOAT);
 566         vswap();
 567     }
 568     if (op >= TOK_ULT && op <= TOK_GT) {
 569         /* load on stack second operand */
 570         load(REG_ST0, vtop);
 571         if (op == TOK_GE || op == TOK_GT)
 572             o(0xc9d9); /* fxch %st(1) */
 573         o(0xe9da); /* fucompp */
 574         o(0xe0df); /* fnstsw %ax */
 575         if (op == TOK_EQ) {
 576             o(0x45e480); /* and $0x45, %ah */
 577             o(0x40fC80); /* cmp $0x40, %ah */
 578         } else if (op == TOK_NE) {
 579             o(0x45e480); /* and $0x45, %ah */
 580             o(0x40f480); /* xor $0x40, %ah */
 581             op = TOK_NE;
 582         } else if (op == TOK_GE || op == TOK_LE) {
 583             o(0x05c4f6); /* test $0x05, %ah */
 584             op = TOK_EQ;
 585         } else {
 586             o(0x45c4f6); /* test $0x45, %ah */
 587             op = TOK_EQ;
 588         }
 589         vtop--;
 590         vtop->r = VT_CMP;
 591         vtop->c.i = op;
 592     } else {
 593         swapped = 0;
 594         /* swap the stack if needed so that t1 is the register and t2 is
 595            the memory reference */
 596         if (vtop[-1].r & VT_LVAL) {
 597             vswap();
 598             swapped = 1;
 599         }
 600         /* no memory reference possible for long double operations */
 601         if ((vtop->t & VT_BTYPE) == VT_LDOUBLE) {
 602             load(REG_ST0, vtop);
 603             swapped = !swapped;
 604         }
 605
 606         switch(op) {
 607         default:
 608         case '+':
 609             a = 0;
 610             break;
 611         case '-':
 612             a = 4;
 613             if (swapped)
 614                 a++;
 615             break;
 616         case '*':
 617             a = 1;
 618             break;
 619         case '/':
 620             a = 6;
 621             if (swapped)
 622                 a++;
 623             break;
 624         }
 625         ft = vtop->t;
 626         fc = vtop->c.ul;
 627         if ((ft & VT_BTYPE) == VT_LDOUBLE) {
 628             o(0xde); /* fxxxp %st, %st(1) */
 629             o(0xc1 + (a << 3));
 630         } else {
 631             if ((ft & VT_BTYPE) == VT_DOUBLE)
 632                 o(0xdc);
 633             else
 634                 o(0xd8);
 635             gen_modrm(a, vtop->r, fc);
 636         }
 637         vtop--;
 638     }
 639 }
 640
 641 /* FPU control word for rounding to nearest mode */
 642 /* XXX: should move that into tcc lib support code ! */
 643 static unsigned short __tcc_fpu_control = 0x137f;
 644 /* FPU control word for round to zero mode for int convertion */
 645 static unsigned short __tcc_int_fpu_control = 0x137f | 0x0c00;
 646
 647 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
 648    and 'long long' cases. */
 649 void gen_cvt_itof(int t)
 650 {
 651     gv(RC_INT);
 652     if ((vtop->t & VT_BTYPE) == VT_LLONG) {
 653         /* signed long long to float/double/long double (unsigned case
 654            is handled generically) */
 655         o(0x50 + vtop->r2); /* push r2 */
 656         o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
 657         o(0x242cdf); /* fildll (%esp) */
 658         o(0x08c483); /* add $8, %esp */
 659     } else if ((vtop->t & (VT_BTYPE | VT_UNSIGNED)) ==
 660                (VT_INT | VT_UNSIGNED)) {
 661         /* unsigned int to float/double/long double */
 662         o(0x6a); /* push $0 */
 663         g(0x00);
 664         o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
 665         o(0x242cdf); /* fildll (%esp) */
 666         o(0x08c483); /* add $8, %esp */
 667     } else {
 668         /* int to float/double/long double */
 669         o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
 670         o(0x2404db); /* fildl (%esp) */
 671         o(0x04c483); /* add $4, %esp */
 672     }
 673     vtop->r = REG_ST0;
 674 }
 675
 676 /* convert fp to int 't' type */
 677 /* XXX: handle long long case */
 678 void gen_cvt_ftoi(int t)
 679 {
 680     int r, r2, size;
 681
 682     gv(RC_FLOAT);
 683     if (t != VT_INT)
 684         size = 8;
 685     else
 686         size = 4;
 687
 688     oad(0x2dd9, (int)&__tcc_int_fpu_control); /* ldcw xxx */
 689     oad(0xec81, size); /* sub $xxx, %esp */
 690     if (size == 4)
 691         o(0x1cdb); /* fistpl */
 692     else
 693         o(0x3cdf); /* fistpll */
 694     o(0x24);
 695     oad(0x2dd9, (int)&__tcc_fpu_control); /* ldcw xxx */
 696     r = get_reg(RC_INT);
 697     o(0x58 + r); /* pop r */
 698     if (size == 8) {
 699         if (t == VT_LLONG) {
 700             vtop->r = r; /* mark reg as used */
 701             r2 = get_reg(RC_INT);
 702             o(0x58 + r2); /* pop r2 */
 703             vtop->r2 = r2;
 704         } else {
 705             o(0x04c483); /* add $4, %esp */
 706         }
 707     }
 708     vtop->r = r;
 709 }
 710
 711 /* convert from one floating point type to another */
 712 void gen_cvt_ftof(int t)
 713 {
 714     /* all we have to do on i386 is to put the float in a register */
 715     gv(RC_FLOAT);
 716 }
 717
 718 /* end of X86 code generator */
 719 /*************************************************************/
 720