6717ebcbb85220f3f8faec1ddf9cfd8cb9b253bf
[sb-simd.git] / generate-sse-instructions.lisp
blob6717ebcbb85220f3f8faec1ddf9cfd8cb9b253bf
1 #|
3 instruction reference:
5 http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26568.pdf
7 |#
9 (declaim (optimize (debug 3)))
11 (defun emit-ops (ops)
12 (loop for op in ops
13 collect `(emit-byte segment ,op) into result
14 finally (return result)))
17 (defun gen-ops (&optional (stream t))
19 ;; single prec packed sse
20 ;;; like :
21 ;;; ADDPS xmm1, xmm2/mem128 0F 58 /r
22 (loop for (inst . ops) in
24 ;; single precision float
25 (addps #x0F #x58)
26 (addsubps #xF2 #x0F #xD0)
27 (andnps #x0F #x55)
28 (andps #x0F #x54)
29 (divps #x0F #x5E)
30 (maxps #x0F #x5F)
31 (minps #x0F #x5D)
32 (mulps #x0F #x59)
33 (orps #x0F #x56)
34 (rcpps #x0F #x53)
35 (rsqrtps #x0F #x52)
36 (sqrtps #x0F #x51)
37 (subps #x0F #x5C)
38 (xorps #x0F #x57)
39 ;; double precision float
40 (addpd #x66 #x0F #x58)
41 (addsubpd #x66 #x0F #xD0)
42 (andnpd #x66 #x0F #x55)
43 (andpd #x66 #x0F #x54)
44 (divpd #x66 #x0F #x5E)
45 (maxpd #x66 #x0F #x5F)
46 (minpd #x66 #x0F #x5D)
47 (mulpd #x66 #x0F #x59)
48 (orps #x66 #x0F #x56)
49 (rcppd #x66 #x0F #x53)
50 (rsqrtpd #x66 #x0F #x52)
51 (sqrtpd #x66 #x0F #x51)
52 (subpd #x66 #x0F #x5C)
53 (xorpd #x66 #x0F #x57)
56 (format stream "~S~%~%"
57 `(define-instruction ,(intern (symbol-name inst)) (segment dst src)
58 (:emitter
59 ,@(emit-ops ops)
60 (emit-ea segment src (reg-tn-encoding dst))))))
62 ;; MOVUPS
63 (loop for (inst ops-m2r ops-r2m) in
65 (movups (#x0F #x10) (#x0F #x11))
66 (movupd (#x66 #x0F #x10) (#x66 #x0F #x11)))
68 (format stream "~S~%~%"
69 `(define-instruction ,(intern (symbol-name inst)) (segment dst src)
70 (:emitter
71 (cond ((sse-register-p dst)
72 ,@(emit-ops ops-m2r)
73 (emit-ea segment src (reg-tn-encoding dst)))
74 (t ,@(emit-ops ops-r2m)
75 (emit-ea segment dst (reg-tn-encoding src)))))))))
77 (defun gen-ops-to-file (filename)
78 (with-open-file (stream filename :direction :output :if-exists :supersede)
79 (gen-ops stream)))