Do not use ShortGI and STBC with management frames; Atheros cards have problems with...
[ralink_drivers/rt2870_fbsd72.git] / rt2870_reg.h
blobd9cad4eb57a427bd23d7f5aa7a4e99c9ca528e82
2 /*-
3 * Copyright (c) 2009-2010 Alexander Egorenkov <egorenar@gmail.com>
4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #ifndef _RT2870_REG_H_
20 #define _RT2870_REG_H_
22 #define RT2870_REG_SCHDMA_WPDMA_GLO_CFG 0x0208
23 #define RT2870_REG_SCHDMA_WMM_AIFSN_CFG 0x0214
24 #define RT2870_REG_SCHDMA_WMM_CWMIN_CFG 0x0218
25 #define RT2870_REG_SCHDMA_WMM_CWMAX_CFG 0x021c
26 #define RT2870_REG_SCHDMA_WMM_TXOP0_CFG 0x0220
27 #define RT2870_REG_SCHDMA_WMM_TXOP1_CFG 0x0224
28 #define RT2870_REG_SCHDMA_USB_DMA_CFG 0x02a0
29 #define RT2870_REG_SCHDMA_USB_CYC_CFG 0x02a4
31 #define RT2870_REG_PBF_SYS_CTRL 0x0400
32 #define RT2870_REG_PBF_CFG 0x0408
33 #define RT2870_REG_PBF_MAX_PCNT 0x040c
34 #define RT2870_REG_PBF_BCN_OFFSET0 0x042c
35 #define RT2870_REG_PBF_BCN_OFFSET1 0x0430
36 #define RT2870_REG_PBF_TXRXQ_PCNT 0x0438
38 #define RT2870_REG_MAC_CSR0 0x1000
39 #define RT2870_REG_SYS_CTRL 0x1004
40 #define RT2870_REG_ADDR_DW0 0x1008
41 #define RT2870_REG_ADDR_DW1 0x100c
42 #define RT2870_REG_BSSID_DW0 0x1010
43 #define RT2870_REG_BSSID_DW1 0x1014
44 #define RT2870_REG_MAX_LEN_CFG 0x1018
45 #define RT2870_REG_BBP_CSR_CFG 0x101c
46 #define RT2870_REG_RF_CSR_CFG0 0x1020
47 #define RT2870_REG_LED_CFG 0x102c
49 #define RT2870_REG_XIFS_TIME_CFG 0x1100
50 #define RT2870_REG_BKOFF_SLOT_CFG 0x1104
51 #define RT2870_REG_BCN_TIME_CFG 0x1114
53 #define RT2870_REG_STATUS_CFG 0x1200
54 #define RT2870_REG_PWR_PIN_CFG 0x1204
56 #define RT2870_REG_TX_EDCA_AC_CFG(aci) (0x1300 + (aci) * 4)
57 #define RT2870_REG_TX_PWR_CFG(ridx) (0x1314 + (ridx) * 4)
58 #define RT2870_REG_TX_PIN_CFG 0x1328
59 #define RT2870_REG_TX_BAND_CFG 0x132c
60 #define RT2870_REG_TX_SW_CFG0 0x1330
61 #define RT2870_REG_TX_SW_CFG1 0x1334
62 #define RT2870_REG_TX_TXOP_CTRL_CFG 0x1340
63 #define RT2870_REG_TX_RTS_CFG 0x1344
64 #define RT2870_REG_TX_TIMEOUT_CFG 0x1348
65 #define RT2870_REG_TX_RTY_CFG 0x134c
66 #define RT2870_REG_TX_LINK_CFG 0x1350
67 #define RT2870_REG_TX_HT_FBK_CFG0 0x1354
68 #define RT2870_REG_TX_HT_FBK_CFG1 0x1358
69 #define RT2870_REG_TX_LG_FBK_CFG0 0x135c
70 #define RT2870_REG_TX_LG_FBK_CFG1 0x1360
71 #define RT2870_REG_TX_CCK_PROT_CFG 0x1364
72 #define RT2870_REG_TX_OFDM_PROT_CFG 0x1368
73 #define RT2870_REG_TX_MM20_PROT_CFG 0x136c
74 #define RT2870_REG_TX_MM40_PROT_CFG 0x1370
75 #define RT2870_REG_TX_GF20_PROT_CFG 0x1374
76 #define RT2870_REG_TX_GF40_PROT_CFG 0x1378
77 #define RT2870_REG_TX_EXP_ACK_TIME 0x1380
79 #define RT2870_REG_RX_FILTER_CFG 0x1400
80 #define RT2870_REG_AUTO_RSP_CFG 0x1404
81 #define RT2870_REG_LEGACY_BASIC_RATE 0x1408
82 #define RT2870_REG_HT_BASIC_RATE 0x140c
84 #define RT2870_REG_HCCAPSMP_TXOP_HLDR_ET 0x1608
86 #define RT2870_REG_RX_STA_CNT0 0x1700
87 #define RT2870_REG_RX_STA_CNT1 0x1704
88 #define RT2870_REG_RX_STA_CNT2 0x1708
89 #define RT2870_REG_TX_STA_CNT0 0x170c
90 #define RT2870_REG_TX_STA_CNT1 0x1710
91 #define RT2870_REG_TX_STA_CNT2 0x1714
92 #define RT2870_REG_TX_STA_FIFO 0x1718
93 #define RT2870_REG_TX_AGG_CNT 0x171c
94 #define RT2870_REG_TX_AGG_CNT0 0x1720
95 #define RT2870_REG_TX_AGG_CNT1 0x1724
96 #define RT2870_REG_TX_AGG_CNT2 0x1728
97 #define RT2870_REG_TX_AGG_CNT3 0x172c
98 #define RT2870_REG_TX_AGG_CNT4 0x1730
99 #define RT2870_REG_TX_AGG_CNT5 0x1734
100 #define RT2870_REG_TX_AGG_CNT6 0x1738
101 #define RT2870_REG_TX_AGG_CNT7 0x173c
102 #define RT2870_REG_TXRX_MPDU_DEN_CNT 0x1740
104 #define RT2870_REG_WCID(wcid) (0x1800 + (wcid) * 8)
105 #define RT2870_REG_PKEY(wcid) (0x4000 + (wcid) * 32)
106 #define RT2870_REG_IVEIV(wcid) (0x6000 + (wcid) * 8)
107 #define RT2870_REG_WCID_ATTR(wcid) (0x6800 + (wcid) * 4)
108 #define RT2870_REG_SKEY(vap, kidx) (0x6c00 + ((vap) * 4 + (kidx)) * 32)
109 #define RT2870_REG_SKEY_MODE(vap) (0x7000 + ((vap) / 2) * 4)
111 #define RT2870_REG_MCU_UCODE_BASE 0x3000
113 #define RT2870_REG_H2M_HOST_CMD 0x0404
114 #define RT2870_REG_H2M_MAILBOX 0x7010
115 #define RT2870_REG_H2M_MAILBOX_CID 0x7014
116 #define RT2870_REG_H2M_MAILBOX_STATUS 0x701c
117 #define RT2870_REG_H2M_MAILBOX_BBP_AGENT 0x7028
119 #define RT2870_REG_BEACON_BASE(vap) (0x7800 + (vap) * 512)
121 #define RT2870_REG_RF_R1 0
122 #define RT2870_REG_RF_R2 1
123 #define RT2870_REG_RF_R3 2
124 #define RT2870_REG_RF_R4 3
127 * RT2870_REG_SCHDMA_WPDMA_GLO_CFG flags
129 #define RT2870_REG_TX_WB_DDONE (1 << 6)
130 #define RT2870_REG_RX_DMA_BUSY (1 << 3)
131 #define RT2870_REG_RX_DMA_ENABLE (1 << 2)
132 #define RT2870_REG_TX_DMA_BUSY (1 << 1)
133 #define RT2870_REG_TX_DMA_ENABLE (1 << 0)
136 * RT2870_REG_SCHDMA_USB_DMA_CFG flags
138 #define RT2870_REG_USB_DMA_TX_ENABLE (1 << 23)
139 #define RT2870_REG_USB_DMA_RX_ENABLE (1 << 22)
140 #define RT2870_REG_USB_DMA_RX_AGG_ENABLE (1 << 21)
141 #define RT2870_REG_USB_DMA_RX_AGG_LIMIT_SHIFT 8
144 * RT2870_REG_PBF_SYS_CTRL flags
146 #define RT2870_REG_MCU_READY (1 << 7)
149 * RT2870_REG_PBF_TXRXQ_PCNT flags
151 #define RT2870_REG_RXQ_PCNT_SHIFT 24
152 #define RT2870_REG_RXQ_PCNT_MASK 0xff
153 #define RT2870_REG_TX2Q_PCNT_SHIFT 16
154 #define RT2870_REG_TX2Q_PCNT_MASK 0xff
155 #define RT2870_REG_TX1Q_PCNT_SHIFT 8
156 #define RT2870_REG_TX1Q_PCNT_MASK 0xff
157 #define RT2870_REG_TX0Q_PCNT_SHIFT 0
158 #define RT2870_REG_TX0Q_PCNT_MASK 0xff
161 * RT2870_REG_SYS_CTRL flags
163 #define RT2870_REG_RX_ENABLE (1 << 3)
164 #define RT2870_REG_TX_ENABLE (1 << 2)
165 #define RT2870_REG_BBP_HRST (1 << 1)
166 #define RT2870_REG_MAC_SRST (1 << 0)
169 * RT2870_REG_BBP_CSR_CFG flags
171 #define RT2870_REG_BBP_RW_MODE_PARALLEL (1 << 19)
172 #define RT2870_REG_BBP_CSR_BUSY (1 << 17)
173 #define RT2870_REG_BBP_CSR_READ (1 << 16)
174 #define RT2870_REG_BBP_REG_SHIFT 8
175 #define RT2870_REG_BBP_REG_MASK 0xff
176 #define RT2870_REG_BBP_VAL_SHIFT 0
177 #define RT2870_REG_BBP_VAL_MASK 0xff
180 * RT2870_REG_RF_CSR_CFG0 flags
182 #define RT2870_REG_RF_BUSY (1 << 31)
185 * RT2870_REG_BCN_TIME_CFG flags
187 #define RT2870_REG_BCN_TX_ENABLE (1 << 20)
188 #define RT2870_REG_TBTT_TIMER_ENABLE (1 << 19)
189 #define RT2870_REG_TSF_TIMER_ENABLE (1 << 16)
190 #define RT2870_REG_TSF_SYNC_MODE_SHIFT 17
191 #define RT2870_REG_TSF_SYNC_MODE_MASK 0x3
192 #define RT2870_REG_TSF_SYNC_MODE_DISABLE 0
193 #define RT2870_REG_TSF_SYNC_MODE_STA 1
194 #define RT2870_REG_TSF_SYNC_MODE_IBSS 2
195 #define RT2870_REG_TSF_SYNC_MODE_HOSTAP 3
198 * RT2870_REG_STATUS_CFG flags
200 #define RT2870_REG_STATUS_RX_BUSY (1 << 1)
201 #define RT2870_REG_STATUS_TX_BUSY (1 << 0)
204 * RT2870_REG_TX_PIN_CFG flags
206 #define RT2870_REG_TRSW_ENABLE (1 << 18)
207 #define RT2870_REG_RFTR_ENABLE (1 << 16)
208 #define RT2870_REG_LNA_PE_G1_ENABLE (1 << 11)
209 #define RT2870_REG_LNA_PE_A1_ENABLE (1 << 10)
210 #define RT2870_REG_LNA_PE_G0_ENABLE (1 << 9)
211 #define RT2870_REG_LNA_PE_A0_ENABLE (1 << 8)
212 #define RT2870_REG_PA_PE_G1_ENABLE (1 << 3)
213 #define RT2870_REG_PA_PE_A1_ENABLE (1 << 2)
214 #define RT2870_REG_PA_PE_G0_ENABLE (1 << 1)
215 #define RT2870_REG_PA_PE_A0_ENABLE (1 << 0)
218 * RT2870_REG_TX_BAND_CFG flags
220 #define RT2870_REG_TX_BAND_BG (1 << 2)
221 #define RT2870_REG_TX_BAND_A (1 << 1)
222 #define RT2870_REG_TX_BAND_HT40_ABOVE (1 << 0)
223 #define RT2870_REG_TX_BAND_HT40_BELOW (0 << 0)
226 * RT2870_REG_TX_RTS_CFG flags
228 #define RT2870_REG_TX_RTS_THRESHOLD_SHIFT 8
229 #define RT2870_REG_TX_RTS_THRESHOLD_MASK 0xffff
232 * RT2870_REG_TX_CCK_PROT_CFG
233 * RT2870_REG_TX_OFDM_PROT_CFG
234 * RT2870_REG_TX_MM20_PROT_CFG
235 * RT2870_REG_TX_MM40_PROT_CFG
236 * RT2870_REG_TX_GF20_PROT_CFG
237 * RT2870_REG_TX_GF40_PROT_CFG flags
239 #define RT2870_REG_RTSTH_ENABLE (1 << 26)
240 #define RT2870_REG_TXOP_ALLOW_GF40 (1 << 25)
241 #define RT2870_REG_TXOP_ALLOW_GF20 (1 << 24)
242 #define RT2870_REG_TXOP_ALLOW_MM40 (1 << 23)
243 #define RT2870_REG_TXOP_ALLOW_MM20 (1 << 22)
244 #define RT2870_REG_TXOP_ALLOW_OFDM (1 << 21)
245 #define RT2870_REG_TXOP_ALLOW_CCK (1 << 20)
246 #define RT2870_REG_TXOP_ALLOW_ALL (0x3f << 20)
247 #define RT2870_REG_PROT_NAV_NONE (0 << 18)
248 #define RT2870_REG_PROT_NAV_SHORT (1 << 18)
249 #define RT2870_REG_PROT_NAV_LONG (2 << 18)
250 #define RT2870_REG_PROT_CTRL_NONE (0 << 16)
251 #define RT2870_REG_PROT_CTRL_RTS_CTS (1 << 16)
252 #define RT2870_REG_PROT_CTRL_CTS (2 << 16)
253 #define RT2870_REG_PROT_PHYMODE_SHIFT 14
254 #define RT2870_REG_PROT_PHYMODE_MASK 0x3
255 #define RT2870_REG_PROT_PHYMODE_CCK 0
256 #define RT2870_REG_PROT_PHYMODE_OFDM 1
257 #define RT2870_REG_PROT_MCS_SHIFT 0
258 #define RT2870_REG_PROT_MCS_MASK 0x7f
261 * RT2870_REG_RX_FILTER_CFG flags
263 #define RT2870_REG_RX_FILTER_DROP_CTRL_RSV (1 << 16)
264 #define RT2870_REG_RX_FILTER_DROP_BAR (1 << 15)
265 #define RT2870_REG_RX_FILTER_DROP_BA (1 << 14)
266 #define RT2870_REG_RX_FILTER_DROP_PSPOLL (1 << 13)
267 #define RT2870_REG_RX_FILTER_DROP_RTS (1 << 12)
268 #define RT2870_REG_RX_FILTER_DROP_CTS (1 << 11)
269 #define RT2870_REG_RX_FILTER_DROP_ACK (1 << 10)
270 #define RT2870_REG_RX_FILTER_DROP_CFEND (1 << 9)
271 #define RT2870_REG_RX_FILTER_DROP_CFACK (1 << 8)
272 #define RT2870_REG_RX_FILTER_DROP_DUPL (1 << 7)
273 #define RT2870_REG_RX_FILTER_DROP_BCAST (1 << 6)
274 #define RT2870_REG_RX_FILTER_DROP_MCAST (1 << 5)
275 #define RT2870_REG_RX_FILTER_DROP_VER_ERR (1 << 4)
276 #define RT2870_REG_RX_FILTER_DROP_NOT_MYBSS (1 << 3)
277 #define RT2870_REG_RX_FILTER_DROP_UC_NOME (1 << 2)
278 #define RT2870_REG_RX_FILTER_DROP_PHY_ERR (1 << 1)
279 #define RT2870_REG_RX_FILTER_DROP_CRC_ERR (1 << 0)
282 * RT2870_REG_AUTO_RSP_CFG flags
284 #define RT2870_REG_CCK_SHORT_ENABLE (1 << 4)
287 * RT2870_REG_TX_STA_FIFO flags
289 #define RT2870_REG_TX_STA_FIFO_MCS_SHIFT 16
290 #define RT2870_REG_TX_STA_FIFO_MCS_MASK 0x7f
291 #define RT2870_REG_TX_STA_FIFO_WCID_SHIFT 8
292 #define RT2870_REG_TX_STA_FIFO_WCID_MASK 0xff
293 #define RT2870_REG_TX_STA_FIFO_PID_SHIFT 1
294 #define RT2870_REG_TX_STA_FIFO_PID_MASK 0xf
295 #define RT2870_REG_TX_STA_FIFO_ACK_REQ (1 << 7)
296 #define RT2870_REG_TX_STA_FIFO_AGG (1 << 6)
297 #define RT2870_REG_TX_STA_FIFO_TX_OK (1 << 5)
298 #define RT2870_REG_TX_STA_FIFO_VALID (1 << 0)
301 * RT2870_REG_WCID_ATTR flags
303 #define RT2870_REG_VAP_SHIFT 4
304 #define RT2870_REG_VAP_MASK 0x7
305 #define RT2870_REG_CIPHER_MODE_SHIFT 1
306 #define RT2870_REG_CIPHER_MODE_MASK 0x7
307 #define RT2870_REG_CIPHER_MODE_NONE 0
308 #define RT2870_REG_CIPHER_MODE_WEP40 1
309 #define RT2870_REG_CIPHER_MODE_WEP104 2
310 #define RT2870_REG_CIPHER_MODE_TKIP 3
311 #define RT2870_REG_CIPHER_MODE_AES_CCMP 4
312 #define RT2870_REG_CIPHER_MODE_CKIP40 5
313 #define RT2870_REG_CIPHER_MODE_CKIP104 6
314 #define RT2870_REG_CIPHER_MODE_CKIP128 7
315 #define RT2870_REG_PKEY_ENABLE (1 << 0)
318 * RT2870_REG_H2M_MAILBOX flags
320 #define RT2870_REG_H2M_BUSY (1 << 24)
321 #define RT2870_REG_H2M_TOKEN_NO_INTR 0xff
323 #endif /* #ifndef _RT2870_REG_H_ */