hw/mips_int.c

   1 #include "hw.h"
   2 #include "mips.h"
   3 #include "cpu.h"
   4
   5 /* Raise IRQ to CPU if necessary. It must be called every time the active
   6    IRQ may change */
   7 void cpu_mips_update_irq(CPUState *env)
   8 {
   9 //      if (interrupt_request & CPU_INTERRUPT_HARD)
  10 //{
  11 //if (env->CP0_Cause&0x400)
  12 //{
  13 //      printf("cpu_mips_update_irq \n");
  14 //      printf("env->CP0_Status %x env->CP0_Cause %x CP0Ca_IP_mask %x \n",env->CP0_Status,env->CP0_Cause,CP0Ca_IP_mask);
  15 //      printf("CP0St_IE %x CP0St_EXL %x CP0St_ERL %x \n",CP0St_IE,CP0St_EXL,CP0St_ERL);
  16 //      printf("env->hflags %x MIPS_HFLAG_DM %x \n",env->hflags ,MIPS_HFLAG_DM);
  17 //}
  18 //}
  19     if ((env->CP0_Status & (1 << CP0St_IE)) &&
  20         !(env->CP0_Status & (1 << CP0St_EXL)) &&
  21         !(env->CP0_Status & (1 << CP0St_ERL)) &&
  22         !(env->hflags & MIPS_HFLAG_DM)) {
  23         if ((env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
  24             !(env->interrupt_request & CPU_INTERRUPT_HARD)) {
  25             printf("cpu_mips_update_irq \n");
  26             cpu_interrupt(env, CPU_INTERRUPT_HARD);
  27         }
  28     } else
  29         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
  30 }
  31
  32 static void cpu_mips_irq_request(void *opaque, int irq, int level)
  33 {
  34     CPUState *env = (CPUState *)opaque;
  35
  36     if (irq < 0 || irq > 7)
  37         return;
  38
  39     if (level) {
  40          env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
  41          if (env->CP0_Status & 0x1)
  42                 {
  43          printf("irq %d env->CP0_Cause %x \n",irq,env->CP0_Cause);
  44          printf("status %x\n",env->CP0_Status);
  45                 }
  46     } else {
  47         env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
  48         //printf("clear irq %d env->CP0_Cause %x \n",irq,env->CP0_Cause);
  49     }
  50     cpu_mips_update_irq(env);
  51 }
  52
  53 void cpu_mips_irq_init_cpu(CPUState *env)
  54 {
  55     qemu_irq *qi;
  56     int i;
  57
  58     qi = qemu_allocate_irqs(cpu_mips_irq_request, env, 8);
  59     for (i = 0; i < 8; i++) {
  60         env->irq[i] = qi[i];
  61     }
  62 }