1 From: Izik Eidus <izike@qumranet.com>
3 add support to memory above the pci hole
5 the new memory region is mapped after address 0x100000000,
6 the bios take the size of the memory after the 0x100000000 from
9 diff --git a/bios/rombios.c b/bios/rombios.c
10 index 1be0816..b70f249 100644
13 @@ -4442,22 +4442,25 @@ BX_DEBUG_INT15("case default:\n");
14 #endif // BX_USE_PS2_MOUSE
17 -void set_e820_range(ES, DI, start, end, type)
18 +void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
27 write_word(ES, DI, start);
28 write_word(ES, DI+2, start >> 16);
29 - write_word(ES, DI+4, 0x00);
30 + write_word(ES, DI+4, extra_start);
31 write_word(ES, DI+6, 0x00);
34 + extra_end -= extra_start;
35 write_word(ES, DI+8, end);
36 write_word(ES, DI+10, end >> 16);
37 - write_word(ES, DI+12, 0x0000);
38 + write_word(ES, DI+12, extra_end);
39 write_word(ES, DI+14, 0x0000);
41 write_word(ES, DI+16, type);
42 @@ -4470,7 +4473,9 @@ int15_function32(regs, ES, DS, FLAGS)
45 Bit32u extended_memory_size=0; // 64bits long
46 + Bit32u extra_lowbits_memory_size=0;
48 + Bit8u extra_highbits_memory_size=0;
50 BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
52 @@ -4544,11 +4549,18 @@ ASM_END
53 extended_memory_size += (1L * 1024 * 1024);
56 + extra_lowbits_memory_size = inb_cmos(0x5c);
57 + extra_lowbits_memory_size <<= 8;
58 + extra_lowbits_memory_size |= inb_cmos(0x5b);
59 + extra_lowbits_memory_size *= 64;
60 + extra_lowbits_memory_size *= 1024;
61 + extra_highbits_memory_size = inb_cmos(0x5d);
66 set_e820_range(ES, regs.u.r16.di,
67 - 0x0000000L, 0x0009f000L, 1);
68 + 0x0000000L, 0x0009f000L, 0, 0, 1);
70 regs.u.r32.eax = 0x534D4150;
71 regs.u.r32.ecx = 0x14;
72 @@ -4557,7 +4569,7 @@ ASM_END
75 set_e820_range(ES, regs.u.r16.di,
76 - 0x0009f000L, 0x000a0000L, 2);
77 + 0x0009f000L, 0x000a0000L, 0, 0, 2);
79 regs.u.r32.eax = 0x534D4150;
80 regs.u.r32.ecx = 0x14;
81 @@ -4566,7 +4578,7 @@ ASM_END
84 set_e820_range(ES, regs.u.r16.di,
85 - 0x000e8000L, 0x00100000L, 2);
86 + 0x000e8000L, 0x00100000L, 0, 0, 2);
88 regs.u.r32.eax = 0x534D4150;
89 regs.u.r32.ecx = 0x14;
90 @@ -4577,7 +4589,7 @@ ASM_END
92 set_e820_range(ES, regs.u.r16.di,
94 - extended_memory_size - ACPI_DATA_SIZE, 1);
95 + extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
98 set_e820_range(ES, regs.u.r16.di,
99 @@ -4593,7 +4605,7 @@ ASM_END
101 set_e820_range(ES, regs.u.r16.di,
102 extended_memory_size - ACPI_DATA_SIZE,
103 - extended_memory_size, 3); // ACPI RAM
104 + extended_memory_size ,0, 0, 3); // ACPI RAM
106 regs.u.r32.eax = 0x534D4150;
107 regs.u.r32.ecx = 0x14;
108 @@ -4603,7 +4615,20 @@ ASM_END
110 /* 256KB BIOS area at the end of 4 GB */
111 set_e820_range(ES, regs.u.r16.di,
112 - 0xfffc0000L, 0x00000000L, 2);
113 + 0xfffc0000L, 0x00000000L ,0, 0, 2);
114 + if (extra_highbits_memory_size || extra_lowbits_memory_size)
115 + regs.u.r32.ebx = 6;
117 + regs.u.r32.ebx = 0;
118 + regs.u.r32.eax = 0x534D4150;
119 + regs.u.r32.ecx = 0x14;
123 + /* Maping of memory above 4 GB */
124 + set_e820_range(ES, regs.u.r16.di, 0x00000000L,
125 + extra_lowbits_memory_size, 1, extra_highbits_memory_size
128 regs.u.r32.eax = 0x534D4150;
129 regs.u.r32.ecx = 0x14;