hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "pc.h"
  13 #include "isa.h"
  14 #include "net.h"
  15 #include "sysemu.h"
  16 #include "boards.h"
  17 #include "flash.h"
  18 #include "qemu-log.h"
  19 #include "mips-bios.h"
  20
  21 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
  22
  23 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
  24
  25 #define MAX_IDE_BUS 2
  26
  27 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  28 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  29 static const int ide_irq[2] = { 14, 15 };
  30
  31 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  32 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
  33
  34 static PITState *pit; /* PIT i8254 */
  35
  36 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  37
  38 static struct _loaderparams {
  39     int ram_size;
  40     const char *kernel_filename;
  41     const char *kernel_cmdline;
  42     const char *initrd_filename;
  43 } loaderparams;
  44
  45 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  46                               uint32_t val)
  47 {
  48     if ((addr & 0xffff) == 0 && val == 42)
  49         qemu_system_reset_request ();
  50     else if ((addr & 0xffff) == 4 && val == 42)
  51         qemu_system_shutdown_request ();
  52 }
  53
  54 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  55 {
  56     return 0;
  57 }
  58
  59 static CPUWriteMemoryFunc *mips_qemu_write[] = {
  60     &mips_qemu_writel,
  61     &mips_qemu_writel,
  62     &mips_qemu_writel,
  63 };
  64
  65 static CPUReadMemoryFunc *mips_qemu_read[] = {
  66     &mips_qemu_readl,
  67     &mips_qemu_readl,
  68     &mips_qemu_readl,
  69 };
  70
  71 static int mips_qemu_iomemtype = 0;
  72
  73 static void load_kernel (CPUState *env)
  74 {
  75     int64_t entry, kernel_low, kernel_high;
  76     long kernel_size, initrd_size;
  77     ram_addr_t initrd_offset;
  78     int ret;
  79
  80     kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
  81                            (uint64_t *)&entry, (uint64_t *)&kernel_low,
  82                            (uint64_t *)&kernel_high);
  83     if (kernel_size >= 0) {
  84         if ((entry & ~0x7fffffffULL) == 0x80000000)
  85             entry = (int32_t)entry;
  86         env->active_tc.PC = entry;
  87     } else {
  88         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  89                 loaderparams.kernel_filename);
  90         exit(1);
  91     }
  92
  93     /* load initrd */
  94     initrd_size = 0;
  95     initrd_offset = 0;
  96     if (loaderparams.initrd_filename) {
  97         initrd_size = get_image_size (loaderparams.initrd_filename);
  98         if (initrd_size > 0) {
  99             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 100             if (initrd_offset + initrd_size > ram_size) {
 101                 fprintf(stderr,
 102                         "qemu: memory too small for initial ram disk '%s'\n",
 103                         loaderparams.initrd_filename);
 104                 exit(1);
 105             }
 106             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 107                                               initrd_offset,
 108                                               ram_size - initrd_offset);
 109         }
 110         if (initrd_size == (target_ulong) -1) {
 111             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 112                     loaderparams.initrd_filename);
 113             exit(1);
 114         }
 115     }
 116
 117     /* Store command line.  */
 118     if (initrd_size > 0) {
 119         char buf[64];
 120         ret = snprintf(buf, 64, "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
 121                        PHYS_TO_VIRT((uint32_t)initrd_offset),
 122                        initrd_size);
 123         cpu_physical_memory_write((16 << 20) - 256, (void *)buf, 64);
 124     } else {
 125         ret = 0;
 126     }
 127     pstrcpy_targphys((16 << 20) - 256 + ret, 256,
 128                      loaderparams.kernel_cmdline);
 129
 130     stl_phys((16 << 20) - 260, 0x12345678);
 131     stl_phys((16 << 20) - 264, ram_size);
 132 }
 133
 134 static void main_cpu_reset(void *opaque)
 135 {
 136     CPUState *env = opaque;
 137     cpu_reset(env);
 138
 139     if (loaderparams.kernel_filename)
 140         load_kernel (env);
 141 }
 142
 143 static const int sector_len = 32 * 1024;
 144 static
 145 void mips_r4k_init (ram_addr_t ram_size,
 146                     const char *boot_device,
 147                     const char *kernel_filename, const char *kernel_cmdline,
 148                     const char *initrd_filename, const char *cpu_model)
 149 {
 150     char buf[1024];
 151     ram_addr_t ram_offset;
 152     ram_addr_t bios_offset;
 153     int bios_size;
 154     CPUState *env;
 155     RTCState *rtc_state;
 156     int i;
 157     qemu_irq *i8259;
 158     int index;
 159     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 160
 161     /* init CPUs */
 162     if (cpu_model == NULL) {
 163 #ifdef TARGET_MIPS64
 164         cpu_model = "R4000";
 165 #else
 166         cpu_model = "24Kf";
 167 #endif
 168     }
 169     env = cpu_init(cpu_model);
 170     if (!env) {
 171         fprintf(stderr, "Unable to find CPU definition\n");
 172         exit(1);
 173     }
 174     qemu_register_reset(main_cpu_reset, env);
 175
 176     /* allocate RAM */
 177     if (ram_size > (256 << 20)) {
 178         fprintf(stderr,
 179                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 180                 ((unsigned int)ram_size / (1 << 20)));
 181         exit(1);
 182     }
 183     ram_offset = qemu_ram_alloc(ram_size);
 184
 185     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 186
 187     if (!mips_qemu_iomemtype) {
 188         mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
 189                                                      mips_qemu_write, NULL);
 190     }
 191     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 192
 193     /* Try to load a BIOS image. If this fails, we continue regardless,
 194        but initialize the hardware ourselves. When a kernel gets
 195        preloaded we also initialize the hardware, since the BIOS wasn't
 196        run. */
 197     if (bios_name == NULL)
 198         bios_name = BIOS_FILENAME;
 199     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 200     bios_size = get_image_size(buf);
 201     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 202         bios_offset = qemu_ram_alloc(BIOS_SIZE);
 203         cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
 204                                      bios_offset | IO_MEM_ROM);
 205
 206         load_image_targphys(buf, 0x1fc00000, BIOS_SIZE);
 207     } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {
 208         uint32_t mips_rom = 0x00400000;
 209         bios_offset = qemu_ram_alloc(mips_rom);
 210         if (!pflash_cfi01_register(0x1fc00000, bios_offset,
 211             drives_table[index].bdrv, sector_len, mips_rom / sector_len,
 212             4, 0, 0, 0, 0)) {
 213             fprintf(stderr, "qemu: Error registering flash memory.\n");
 214         }
 215     }
 216     else {
 217         /* not fatal */
 218         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 219                 buf);
 220     }
 221
 222     if (kernel_filename) {
 223         loaderparams.ram_size = ram_size;
 224         loaderparams.kernel_filename = kernel_filename;
 225         loaderparams.kernel_cmdline = kernel_cmdline;
 226         loaderparams.initrd_filename = initrd_filename;
 227         load_kernel (env);
 228     }
 229
 230     /* Init CPU internal devices */
 231     cpu_mips_irq_init_cpu(env);
 232     cpu_mips_clock_init(env);
 233
 234     /* The PIC is attached to the MIPS CPU INT0 pin */
 235     i8259 = i8259_init(env->irq[2]);
 236
 237     rtc_state = rtc_init(0x70, i8259[8], 2000);
 238
 239     /* Register 64 KB of ISA IO space at 0x14000000 */
 240     isa_mmio_init(0x14000000, 0x00010000);
 241     isa_mem_base = 0x10000000;
 242
 243     pit = pit_init(0x40, i8259[0]);
 244
 245     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 246         if (serial_hds[i]) {
 247             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 248                         serial_hds[i]);
 249         }
 250     }
 251
 252     isa_vga_init();
 253
 254     if (nd_table[0].vlan)
 255         isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
 256
 257     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 258         fprintf(stderr, "qemu: too many IDE bus\n");
 259         exit(1);
 260     }
 261
 262     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 263         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 264         if (index != -1)
 265             hd[i] = drives_table[index].bdrv;
 266         else
 267             hd[i] = NULL;
 268     }
 269
 270     for(i = 0; i < MAX_IDE_BUS; i++)
 271         isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
 272                      hd[MAX_IDE_DEVS * i],
 273                      hd[MAX_IDE_DEVS * i + 1]);
 274
 275     i8042_init(i8259[1], i8259[12], 0x60);
 276 }
 277
 278 QEMUMachine mips_machine = {
 279     .name = "mips",
 280     .desc = "mips r4k platform",
 281     .init = mips_r4k_init,
 282 };