| commit | 1c70aa6264ea7f3d7be6f3acb65a1e0aac8b3944 | |
| author | Beniamino Galvani <b.galvani@gmail.com> | |
| Tue, 25 Mar 2014 18:22:04 +0000 (25 19:22 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 17 Apr 2014 20:34:06 +0000 (17 21:34 +0100) | ||
| tree | b78ff4ad33b28ef60d80d9f3c34351e8dbd5ff08 | treesnapshot (tar.gz zip) |
| parent | f727d0e6219e6d5a9f91326f01b85aa563e37bb9 | commitdiff |
allwinner-a10-pic: set vector address when an interrupt is pending
This patch implements proper updating of the vector register which
should hold, according to the A10 user manual, the vector address for
the interrupt currently active on the CPU IRQ input.
Interrupt priority is not implemented at the moment and thus the first
pending interrupt is returned.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Li Guang <lig.fnst@cn.fujitsu.com>
Message-id: 1395771730-16882-2-git-send-email-b.galvani@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This patch implements proper updating of the vector register which
should hold, according to the A10 user manual, the vector address for
the interrupt currently active on the CPU IRQ input.
Interrupt priority is not implemented at the moment and thus the first
pending interrupt is returned.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Li Guang <lig.fnst@cn.fujitsu.com>
Message-id: 1395771730-16882-2-git-send-email-b.galvani@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/intc/allwinner-a10-pic.c | diffblobblamehistory |