db52cdd0631e7c9ef0fd519a796c754c8cc6486e
[qemu-kvm/fedora.git] / hw / ppce500_mpc8544ds.c
blobdb52cdd0631e7c9ef0fd519a796c754c8cc6486e
1 /*
2 * Qemu PowerPC MPC8544DS board emualtion
4 * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
6 * Author: Yu Liu, <yu.liu@freescale.com>
8 * This file is derived from hw/ppc440_bamboo.c,
9 * the copyright for that material belongs to the original owners.
11 * This is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
17 #include <dirent.h>
19 #include "config.h"
20 #include "qemu-common.h"
21 #include "net.h"
22 #include "hw.h"
23 #include "pc.h"
24 #include "pci.h"
25 #include "boards.h"
26 #include "sysemu.h"
27 #include "kvm.h"
28 #include "kvm_ppc.h"
29 #include "device_tree.h"
30 #include "openpic.h"
31 #include "ppce500.h"
32 #include "qemu-kvm.h"
34 #define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
35 #define UIMAGE_LOAD_BASE 0
36 #define DTB_LOAD_BASE 0x600000
37 #define INITRD_LOAD_BASE 0x2000000
39 #define RAM_SIZES_ALIGN (64UL << 20)
41 #define MPC8544_CCSRBAR_BASE 0xE0000000
42 #define MPC8544_MPIC_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x40000)
43 #define MPC8544_SERIAL0_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4500)
44 #define MPC8544_SERIAL1_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4600)
45 #define MPC8544_PCI_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x8000)
46 #define MPC8544_PCI_REGS_SIZE 0x1000
47 #define MPC8544_PCI_IO 0xE1000000
48 #define MPC8544_PCI_IOLEN 0x10000
50 #ifdef HAVE_FDT
51 static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
53 uint32_t cell;
54 int ret;
56 ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
57 if (ret < 0) {
58 fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
59 goto out;
62 ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
63 prop, cell);
64 if (ret < 0) {
65 fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
66 goto out;
69 out:
70 return ret;
72 #endif
74 static void *mpc8544_load_device_tree(target_phys_addr_t addr,
75 uint32_t ramsize,
76 target_phys_addr_t initrd_base,
77 target_phys_addr_t initrd_size,
78 const char *kernel_cmdline)
80 void *fdt = NULL;
81 #ifdef HAVE_FDT
82 uint32_t mem_reg_property[] = {0, ramsize};
83 char *filename;
84 int fdt_size;
85 int ret;
87 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
88 if (!filename) {
89 goto out;
91 fdt = load_device_tree(filename, &fdt_size);
92 qemu_free(filename);
93 if (fdt == NULL) {
94 goto out;
97 /* Manipulate device tree in memory. */
98 ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
99 sizeof(mem_reg_property));
100 if (ret < 0)
101 fprintf(stderr, "couldn't set /memory/reg\n");
103 ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
104 initrd_base);
105 if (ret < 0)
106 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
108 ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
109 (initrd_base + initrd_size));
110 if (ret < 0)
111 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
113 ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
114 kernel_cmdline);
115 if (ret < 0)
116 fprintf(stderr, "couldn't set /chosen/bootargs\n");
118 if (kvm_enabled()) {
119 struct dirent *dirp;
120 DIR *dp;
121 char buf[128];
123 if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
124 printf("Can't open directory /proc/device-tree/cpus/\n");
125 goto out;
128 buf[0] = '\0';
129 while ((dirp = readdir(dp)) != NULL) {
130 if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
131 snprintf(buf, 128, "/cpus/%s", dirp->d_name);
132 break;
135 closedir(dp);
136 if (buf[0] == '\0') {
137 printf("Unknow host!\n");
138 goto out;
141 mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
142 mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
145 cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
147 out:
148 #endif
150 return fdt;
153 static void mpc8544ds_init(ram_addr_t ram_size,
154 const char *boot_device,
155 const char *kernel_filename,
156 const char *kernel_cmdline,
157 const char *initrd_filename,
158 const char *cpu_model)
160 PCIBus *pci_bus;
161 PCIDevice *pci_dev;
162 CPUState *env;
163 uint64_t elf_entry;
164 uint64_t elf_lowaddr;
165 target_ulong entry=0;
166 target_ulong loadaddr=UIMAGE_LOAD_BASE;
167 target_long kernel_size=0;
168 target_ulong dt_base=DTB_LOAD_BASE;
169 target_ulong initrd_base=INITRD_LOAD_BASE;
170 target_long initrd_size=0;
171 void *fdt;
172 int i=0;
173 unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
174 qemu_irq *irqs, *mpic, *pci_irqs;
175 SerialState * serial[2];
177 /* Setup CPU */
178 env = cpu_ppc_init("e500v2_v30");
179 if (!env) {
180 fprintf(stderr, "Unable to initialize CPU!\n");
181 exit(1);
184 /* Fixup Memory size on a alignment boundary */
185 ram_size &= ~(RAM_SIZES_ALIGN - 1);
187 /* Register Memory */
188 cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(ram_size));
190 /* MPIC */
191 irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
192 irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
193 irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
194 mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
196 /* Serial */
197 if (serial_hds[0])
198 serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
199 0, mpic[12+26], 399193,
200 serial_hds[0], 1);
202 if (serial_hds[1])
203 serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
204 0, mpic[12+26], 399193,
205 serial_hds[0], 1);
207 /* PCI */
208 pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
209 pci_irqs[0] = mpic[pci_irq_nrs[0]];
210 pci_irqs[1] = mpic[pci_irq_nrs[1]];
211 pci_irqs[2] = mpic[pci_irq_nrs[2]];
212 pci_irqs[3] = mpic[pci_irq_nrs[3]];
213 pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
214 if (!pci_bus)
215 printf("couldn't create PCI controller!\n");
217 isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
219 if (pci_bus) {
220 int unit_id = 0;
222 /* Add virtio block devices. */
223 while ((i = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
224 pci_dev = pci_create("virtio-blk-pci", drives_table[i].devaddr);
225 qdev_init(&pci_dev->qdev);
226 unit_id++;
229 /* Register network interfaces. */
230 for (i = 0; i < nb_nics; i++) {
231 pci_nic_init(&nd_table[i], "virtio", NULL);
235 /* Load kernel. */
236 if (kernel_filename) {
237 kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
238 if (kernel_size < 0) {
239 kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
240 NULL);
241 entry = elf_entry;
242 loadaddr = elf_lowaddr;
244 /* XXX try again as binary */
245 if (kernel_size < 0) {
246 fprintf(stderr, "qemu: could not load kernel '%s'\n",
247 kernel_filename);
248 exit(1);
252 /* Load initrd. */
253 if (initrd_filename) {
254 initrd_size = load_image_targphys(initrd_filename, initrd_base,
255 ram_size - initrd_base);
257 if (initrd_size < 0) {
258 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
259 initrd_filename);
260 exit(1);
264 /* If we're loading a kernel directly, we must load the device tree too. */
265 if (kernel_filename) {
266 fdt = mpc8544_load_device_tree(dt_base, ram_size,
267 initrd_base, initrd_size, kernel_cmdline);
268 if (fdt == NULL) {
269 fprintf(stderr, "couldn't load device tree\n");
270 exit(1);
273 /* Set initial guest state. */
274 env->gpr[1] = (16<<20) - 8;
275 env->gpr[3] = dt_base;
276 env->nip = entry;
277 /* XXX we currently depend on KVM to create some initial TLB entries. */
280 if (kvm_enabled())
281 kvmppc_init();
283 return;
286 static QEMUMachine mpc8544ds_machine = {
287 .name = "mpc8544ds",
288 .desc = "mpc8544ds",
289 .init = mpc8544ds_init,
292 static void mpc8544ds_machine_init(void)
294 qemu_register_machine(&mpc8544ds_machine);
297 machine_init(mpc8544ds_machine_init);