| commit | 94befa454d430655fc863a7a855302b80f7a4812 | |
| author | Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> | |
| Wed, 1 Aug 2012 10:52:36 +0000 (1 20:52 +1000) | ||
| committer | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | |
| Wed, 10 Oct 2012 01:13:32 +0000 (10 11:13 +1000) | ||
| tree | 157af7f3d3951b650bd812ae7c9c1b710272771d | treesnapshot (tar.gz zip) |
| parent | acd3b6be325a66f8f10f0eed19ed5261ced411cf | commitdiff |
xilinx_spips: Xilinx Zynq SPI cntrlr device model
Added device model for the Xilinx Zynq SPI controller (SPIPS).
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Added device model for the Xilinx Zynq SPI controller (SPIPS).
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
| hw/arm/Makefile.objs | diffblobblamehistory | |
| hw/xilinx_spips.c | [new file with mode: 0644] | blob |