| commit | 40d827444b2f02b4bc72e43f9f0500059898c4d3 | |
| author | rodrigo_l_rosa <rodrigorosa.LG@gmail.com> | |
| Tue, 15 Nov 2011 16:14:32 +0000 (15 08:14 -0800) | ||
| committer | rodrigo_l_rosa <rodrigorosa.LG@gmail.com> | |
| Wed, 16 Nov 2011 02:50:39 +0000 (15 18:50 -0800) | ||
| tree | ff3fa29cbed870651c444c172683cd1526dbb9a4 | treesnapshot (tar.gz zip) |
| parent | 9257f827b987ff6099f8a5aa0f5ac791002f86d7 | commitdiff |
fix - flashing algorithm check
now the flash algorithm running on the 568013 checks the buffer_empty bit (instead of the command_finished bit) before trying to write a new word to the flash mem.
this should speed up the flashing procedure. since it is open loop, this change may reduce the risk of failure. flashing will fail if JTAG speed is such that the flash module cannot keep up.
also, the USTAT register is only read once, as suggested in the flow chart provided by freescale (per. ref. manual @ 6-11)
the last step of the flow chart, exiting after commands are complete, is not implemented.
the algorithm will stay waiting for more data. it is up to the PC side to *not* send more data.
now the flash algorithm running on the 568013 checks the buffer_empty bit (instead of the command_finished bit) before trying to write a new word to the flash mem.
this should speed up the flashing procedure. since it is open loop, this change may reduce the risk of failure. flashing will fail if JTAG speed is such that the flash module cannot keep up.
also, the USTAT register is only read once, as suggested in the flow chart provided by freescale (per. ref. manual @ 6-11)
the last step of the flow chart, exiting after commands are complete, is not implemented.
the algorithm will stay waiting for more data. it is up to the PC side to *not* send more data.
| src/target/dsp5680xx.c | diffblobblamehistory |