armv7m: use generic arm::core_mode66/966/6
authorSpencer Oliver <spen@spen-soft.co.uk>
Thu, 10 Jan 2013 12:48:15 +0000 (10 12:48 +0000)
committerAndreas Fritiofson <andreas.fritiofson@gmail.com>
Sat, 2 Feb 2013 16:21:41 +0000 (2 16:21 +0000)
To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.

Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
16 files changed:
src/flash/nor/cfi.c
src/flash/nor/efm32.c
src/flash/nor/em357.c
src/flash/nor/fm3.c
src/flash/nor/lpc2000.c
src/flash/nor/lpcspifi.c
src/flash/nor/stellaris.c
src/flash/nor/stm32f1x.c
src/flash/nor/stm32f2x.c
src/flash/nor/stm32lx.c
src/target/arm.h
src/target/armv4_5.c
src/target/armv7m.c
src/target/armv7m.h
src/target/cortex_m.c
src/target/hla_target.c

index f6b5744..81a58ce 100644 (file)
@@ -1778,7 +1778,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
 
        if (is_armv7m(target_to_armv7m(target))) {      /* armv7m target */
                armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
-               armv7m_algo.core_mode = ARMV7M_MODE_HANDLER;
+               armv7m_algo.core_mode = ARM_MODE_ANY;
                arm_algo = &armv7m_algo;
        } else if (is_arm(target_to_arm(target))) {
                /* All other ARM CPUs have 32 bit instructions */
index 37cb79b..52e732d 100644 (file)
@@ -610,7 +610,7 @@ static int efm32x_write_block(struct flash_bank *bank, uint8_t *buf,
        buf_set_u32(reg_params[4].value, 0, 32, address);
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        ret = target_run_flash_async_algorithm(target, buf, count, 4,
                        0, NULL,
index 5fa0013..e93af2f 100644 (file)
@@ -522,7 +522,7 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer,
        ;
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
index 55a2e22..aa5d58d 100644 (file)
@@ -502,7 +502,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer,
        }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* source start address */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* target start address */
index 06f3ec4..1aa3b91 100644 (file)
@@ -309,7 +309,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo
        switch (lpc2000_info->variant) {
                case lpc1700:
                        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-                       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+                       armv7m_info.core_mode = ARM_MODE_ANY;
                        iap_entry_point = 0x1fff1ff1;
                        break;
                case lpc2000_v1:
index 757d6d1..89e8f03 100644 (file)
@@ -182,7 +182,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
        };
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
 
        LOG_DEBUG("Allocating working area for SPIFI init algorithm");
@@ -519,7 +519,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last)
        };
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
 
        /* Get memory for spifi initialization algorithm */
@@ -726,7 +726,7 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
        };
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT);         /* buffer start, status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);            /* buffer end */
index 83ca585..cd0311a 100644 (file)
@@ -1045,7 +1045,7 @@ static int stellaris_write_block(struct flash_bank *bank,
                        (uint8_t *) stellaris_write_code);
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
index 8e5bf79..6ca814a 100644 (file)
@@ -656,7 +656,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
        buf_set_u32(reg_params[4].value, 0, 32, address);
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        retval = target_run_flash_async_algorithm(target, buffer, count, 2,
                        0, NULL,
index 7201914..22cc9cf 100644 (file)
@@ -558,7 +558,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
        };
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT);         /* buffer start, status (out) */
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);            /* buffer end */
index fc0fb9e..8b09387 100644 (file)
@@ -283,7 +283,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer,
        }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
        init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
index 916b321..e476404 100644 (file)
@@ -63,9 +63,9 @@ enum arm_mode {
        ARM_MODE_UND = 27,
        ARM_MODE_SYS = 31,
 
-       ARM_MODE_THREAD,
-       ARM_MODE_USER_THREAD,
-       ARM_MODE_HANDLER,
+       ARM_MODE_THREAD = 0,
+       ARM_MODE_USER_THREAD = 1,
+       ARM_MODE_HANDLER = 2,
 
        ARM_MODE_ANY = -1
 };
index 7ba2deb..b04404b 100644 (file)
@@ -140,6 +140,21 @@ static const struct {
                .n_indices = ARRAY_SIZE(arm_mon_indices),
                .indices = arm_mon_indices,
        },
+
+       /* These special modes are currently only supported
+        * by ARMv6M and ARMv7M profiles */
+       {
+               .name = "Thread",
+               .psr = ARM_MODE_THREAD,
+       },
+       {
+               .name = "Thread (User)",
+               .psr = ARM_MODE_USER_THREAD,
+       },
+       {
+               .name = "Handler",
+               .psr = ARM_MODE_HANDLER,
+       },
 };
 
 /** Map PSR mode bits to the name of an ARM processor operating mode. */
index 8915711..1975b79 100644 (file)
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-/** Maps from enum armv7m_mode (except ARMV7M_MODE_ANY) to name. */
-char *armv7m_mode_strings[] = {
-       "Thread", "Thread (User)", "Handler",
-};
-
 static char *armv7m_exception_strings[] = {
        "", "Reset", "NMI", "HardFault",
        "MemManage", "BusFault", "UsageFault", "RESERVED",
@@ -332,7 +327,7 @@ int armv7m_start_algorithm(struct target *target,
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
        struct armv7m_algorithm *armv7m_algorithm_info = arch_info;
-       enum armv7m_mode core_mode = armv7m->core_mode;
+       enum arm_mode core_mode = armv7m->arm.core_mode;
        int retval = ERROR_OK;
 
        /* NOTE: armv7m_run_algorithm requires that each algorithm uses a software breakpoint
@@ -388,7 +383,7 @@ int armv7m_start_algorithm(struct target *target,
                armv7m_set_core_reg(reg, reg_params[i].value);
        }
 
-       if (armv7m_algorithm_info->core_mode != ARMV7M_MODE_ANY) {
+       if (armv7m_algorithm_info->core_mode != ARM_MODE_ANY) {
                LOG_DEBUG("setting core_mode: 0x%2.2x", armv7m_algorithm_info->core_mode);
                buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value,
                        0, 1, armv7m_algorithm_info->core_mode);
@@ -490,7 +485,7 @@ int armv7m_wait_algorithm(struct target *target,
                }
        }
 
-       armv7m->core_mode = armv7m_algorithm_info->core_mode;
+       armv7m->arm.core_mode = armv7m_algorithm_info->core_mode;
 
        return retval;
 }
@@ -508,7 +503,7 @@ int armv7m_arch_state(struct target *target)
        LOG_USER("target halted due to %s, current mode: %s %s\n"
                "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32 "%s",
                debug_reason_name(target),
-               armv7m_mode_strings[armv7m->core_mode],
+               arm_mode_name(arm->core_mode),
                armv7m_exception_string(armv7m->exception_number),
                buf_get_u32(arm->cpsr->value, 0, 32),
                buf_get_u32(arm->pc->value, 0, 32),
@@ -518,6 +513,7 @@ int armv7m_arch_state(struct target *target)
 
        return ERROR_OK;
 }
+
 static const struct reg_arch_type armv7m_reg_type = {
        .get = armv7m_get_core_reg,
        .set = armv7m_set_core_reg,
@@ -648,7 +644,7 @@ int armv7m_checksum_memory(struct target *target,
                goto cleanup;
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT);
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
@@ -708,7 +704,7 @@ int armv7m_blank_check_memory(struct target *target,
                return retval;
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+       armv7m_info.core_mode = ARM_MODE_ANY;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
        buf_set_u32(reg_params[0].value, 0, 32, address);
index bcf0ee1..4c2445b 100644 (file)
@@ -40,14 +40,6 @@ extern uint8_t armv7m_gdb_dummy_cpsr_value[];
 extern struct reg armv7m_gdb_dummy_cpsr_reg;
 #endif
 
-enum armv7m_mode {
-       ARMV7M_MODE_THREAD = 0,
-       ARMV7M_MODE_USER_THREAD = 1,
-       ARMV7M_MODE_HANDLER = 2,
-       ARMV7M_MODE_ANY = -1
-};
-
-extern char *armv7m_mode_strings[];
 extern const int armv7m_psp_reg_map[];
 extern const int armv7m_msp_reg_map[];
 
@@ -166,7 +158,6 @@ struct armv7m_common {
 
        int common_magic;
        struct reg_cache *core_cache;
-       enum armv7m_mode core_mode;
        int exception_number;
        struct adiv5_dap dap;
 
@@ -206,7 +197,7 @@ static inline bool is_armv7m(struct armv7m_common *armv7m)
 struct armv7m_algorithm {
        int common_magic;
 
-       enum armv7m_mode core_mode;
+       enum arm_mode core_mode;
 
        uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
 };
index ca2211f..89d70be 100644 (file)
@@ -451,18 +451,16 @@ static int cortex_m3_debug_entry(struct target *target)
 
        /* Are we in an exception handler */
        if (xPSR & 0x1FF) {
-               armv7m->core_mode = ARMV7M_MODE_HANDLER;
                armv7m->exception_number = (xPSR & 0x1FF);
 
                arm->core_mode = ARM_MODE_HANDLER;
                arm->map = armv7m_msp_reg_map;
        } else {
-               unsigned control = buf_get_u32(armv7m->core_cache
+               unsigned control = buf_get_u32(arm->core_cache
                                ->reg_list[ARMV7M_CONTROL].value, 0, 2);
 
                /* is this thread privileged? */
-               armv7m->core_mode = control & 1;
-               arm->core_mode = armv7m->core_mode
+               arm->core_mode = control & 1
                        ? ARM_MODE_USER_THREAD
                        : ARM_MODE_THREAD;
 
@@ -479,7 +477,7 @@ static int cortex_m3_debug_entry(struct target *target)
                cortex_m3_examine_exception_reason(target);
 
        LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
-               armv7m_mode_strings[armv7m->core_mode],
+               arm_mode_name(arm->core_mode),
                *(uint32_t *)(arm->pc->value),
                target_state_name(target));
 
index 1a95d88..11926c7 100644 (file)
@@ -346,18 +346,16 @@ static int adapter_debug_entry(struct target *target)
 
        /* Are we in an exception handler */
        if (xPSR & 0x1FF) {
-               armv7m->core_mode = ARMV7M_MODE_HANDLER;
                armv7m->exception_number = (xPSR & 0x1FF);
 
                arm->core_mode = ARM_MODE_HANDLER;
                arm->map = armv7m_msp_reg_map;
        } else {
-               unsigned control = buf_get_u32(armv7m->core_cache
+               unsigned control = buf_get_u32(arm->core_cache
                                ->reg_list[ARMV7M_CONTROL].value, 0, 2);
 
                /* is this thread privileged? */
-               armv7m->core_mode = control & 1;
-               arm->core_mode = armv7m->core_mode
+               arm->core_mode = control & 1
                                ? ARM_MODE_USER_THREAD
                                : ARM_MODE_THREAD;
 
@@ -371,7 +369,7 @@ static int adapter_debug_entry(struct target *target)
        }
 
        LOG_DEBUG("entered debug state in core mode: %s at PC 0x%08" PRIx32 ", target->state: %s",
-               armv7m_mode_strings[armv7m->core_mode],
+               arm_mode_name(arm->core_mode),
                *(uint32_t *)(arm->pc->value),
                target_state_name(target));