| commit | 178b5d072e2bd2038fc9065b9722da296e6f5e16 | |
| author | Andreas Fritiofson <andreas.fritiofson@gmail.com> | |
| Sun, 29 Dec 2013 20:59:36 +0000 (29 21:59 +0100) | ||
| committer | Spencer Oliver <spen@spen-soft.co.uk> | |
| Sat, 11 Jan 2014 22:22:25 +0000 (11 22:22 +0000) | ||
| tree | d84a7224d552538fc65254b088093badb8712c52 | treesnapshot (tar.gz zip) |
| parent | bd0fbef5c8819c9f58b48f02acd862d9be4d87b9 | commitdiff |
cortex_m: Avoid unnecessary saving and restoring of DCRDR
This is used for the emulated DCC channel which is only maintained as long
as target->dbg_msg_enabled is set. Skip the saving and restoring if not
enabled to save one dap_run() per core register access.
Note that we could've probably queued all core register accesses in the
same transaction if the armv7 register framework hadn't required
synchronous register accesses.
Change-Id: I4fe6d713261ee5db42422203eb63035fdcc48891
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1848
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is used for the emulated DCC channel which is only maintained as long
as target->dbg_msg_enabled is set. Skip the saving and restoring if not
enabled to save one dap_run() per core register access.
Note that we could've probably queued all core register accesses in the
same transaction if the armv7 register framework hadn't required
synchronous register accesses.
Change-Id: I4fe6d713261ee5db42422203eb63035fdcc48891
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1848
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
| src/target/cortex_m.c | diffblobblamehistory |