src/flash/nand/s3c2440.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C2440 OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx.h"
  32
  33 NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
  34 {
  35         struct s3c24xx_nand_controller *info;
  36         CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  37
  38         /* fill in the address fields for the core device */
  39         info->cmd = S3C2440_NFCMD;
  40         info->addr = S3C2440_NFADDR;
  41         info->data = S3C2440_NFDATA;
  42         info->nfstat = S3C2440_NFSTAT;
  43
  44         return ERROR_OK;
  45 }
  46
  47 static int s3c2440_init(struct nand_device *nand)
  48 {
  49         struct target *target = nand->target;
  50
  51         target_write_u32(target, S3C2410_NFCONF,
  52                          S3C2440_NFCONF_TACLS(3) |
  53                          S3C2440_NFCONF_TWRPH0(7) |
  54                          S3C2440_NFCONF_TWRPH1(7));
  55
  56         target_write_u32(target, S3C2440_NFCONT,
  57                          S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
  58
  59         return ERROR_OK;
  60 }
  61
  62 int s3c2440_nand_ready(struct nand_device *nand, int timeout)
  63 {
  64         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  65         struct target *target = nand->target;
  66         uint8_t status;
  67
  68         if (target->state != TARGET_HALTED) {
  69                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  70                 return ERROR_NAND_OPERATION_FAILED;
  71         }
  72
  73         do {
  74                 target_read_u8(target, s3c24xx_info->nfstat, &status);
  75
  76                 if (status & S3C2440_NFSTAT_READY)
  77                         return 1;
  78
  79                 alive_sleep(1);
  80         } while (timeout-- > 0);
  81
  82
  83         return 0;
  84 }
  85
  86 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
  87
  88 int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_size)
  89 {
  90         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  91         struct target *target = nand->target;
  92         uint32_t nfdata = s3c24xx_info->data;
  93         uint32_t tmp;
  94
  95         LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
  96
  97         if (target->state != TARGET_HALTED) {
  98                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  99                 return ERROR_NAND_OPERATION_FAILED;
 100         }
 101
 102         while (data_size >= 4) {
 103                 target_read_u32(target, nfdata, &tmp);
 104
 105                 data[0] = tmp;
 106                 data[1] = tmp >> 8;
 107                 data[2] = tmp >> 16;
 108                 data[3] = tmp >> 24;
 109
 110                 data_size -= 4;
 111                 data += 4;
 112         }
 113
 114         while (data_size > 0) {
 115                 target_read_u8(target, nfdata, data);
 116
 117                 data_size -= 1;
 118                 data += 1;
 119         }
 120
 121         return ERROR_OK;
 122 }
 123
 124 int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_size)
 125 {
 126         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
 127         struct target *target = nand->target;
 128         uint32_t nfdata = s3c24xx_info->data;
 129         uint32_t tmp;
 130
 131         if (target->state != TARGET_HALTED) {
 132                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 133                 return ERROR_NAND_OPERATION_FAILED;
 134         }
 135
 136         while (data_size >= 4) {
 137                 tmp = le_to_h_u32(data);
 138                 target_write_u32(target, nfdata, tmp);
 139
 140                 data_size -= 4;
 141                 data += 4;
 142         }
 143
 144         while (data_size > 0) {
 145                 target_write_u8(target, nfdata, *data);
 146
 147                 data_size -= 1;
 148                 data += 1;
 149         }
 150
 151         return ERROR_OK;
 152 }
 153
 154 struct nand_flash_controller s3c2440_nand_controller = {
 155         .name = "s3c2440",
 156         .nand_device_command = &s3c2440_nand_device_command,
 157         .init = &s3c2440_init,
 158         .reset = &s3c24xx_reset,
 159         .command = &s3c24xx_command,
 160         .address = &s3c24xx_address,
 161         .write_data = &s3c24xx_write_data,
 162         .read_data = &s3c24xx_read_data,
 163         .write_page = s3c24xx_write_page,
 164         .read_page = s3c24xx_read_page,
 165         .write_block_data = &s3c2440_write_block_data,
 166         .read_block_data = &s3c2440_read_block_data,
 167         .nand_ready = &s3c2440_nand_ready,
 168 };