286fa327ec1668d9a5cb0d696db5f2c933a33c8a
1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2008 by David T.L. Wong *
7 * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
9 * This program is free software; you can redistribute it and/or modify *
10 * it under the terms of the GNU General Public License as published by *
11 * the Free Software Foundation; either version 2 of the License, or *
12 * (at your option) any later version. *
14 * This program is distributed in the hope that it will be useful, *
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
17 * GNU General Public License for more details. *
19 * You should have received a copy of the GNU General Public License *
20 * along with this program; if not, write to the *
21 * Free Software Foundation, Inc., *
22 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
23 ***************************************************************************/
30 #include "mips_ejtag.h"
32 void mips_ejtag_set_instr(struct mips_ejtag
*ejtag_info
, int new_instr
)
36 tap
= ejtag_info
->tap
;
39 if (buf_get_u32(tap
->cur_instr
, 0, tap
->ir_length
) != (uint32_t)new_instr
) {
40 struct scan_field field
;
43 field
.num_bits
= tap
->ir_length
;
45 buf_set_u32(t
, 0, field
.num_bits
, new_instr
);
46 field
.in_value
= NULL
;
48 jtag_add_ir_scan(tap
, &field
, TAP_IDLE
);
52 int mips_ejtag_get_idcode(struct mips_ejtag
*ejtag_info
, uint32_t *idcode
)
54 struct scan_field field
;
57 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_IDCODE
);
60 field
.out_value
= NULL
;
63 jtag_add_dr_scan(ejtag_info
->tap
, 1, &field
, TAP_IDLE
);
66 retval
= jtag_execute_queue();
67 if (retval
!= ERROR_OK
) {
68 LOG_ERROR("register read failed");
72 *idcode
= buf_get_u32(field
.in_value
, 0, 32);
77 static int mips_ejtag_get_impcode(struct mips_ejtag
*ejtag_info
, uint32_t *impcode
)
79 struct scan_field field
;
82 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_IMPCODE
);
85 field
.out_value
= NULL
;
88 jtag_add_dr_scan(ejtag_info
->tap
, 1, &field
, TAP_IDLE
);
91 retval
= jtag_execute_queue();
92 if (retval
!= ERROR_OK
) {
93 LOG_ERROR("register read failed");
97 *impcode
= buf_get_u32(field
.in_value
, 0, 32);
102 int mips_ejtag_drscan_32(struct mips_ejtag
*ejtag_info
, uint32_t *data
)
104 struct jtag_tap
*tap
;
105 tap
= ejtag_info
->tap
;
108 struct scan_field field
;
114 buf_set_u32(t
, 0, field
.num_bits
, *data
);
117 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
119 retval
= jtag_execute_queue();
120 if (retval
!= ERROR_OK
) {
121 LOG_ERROR("register read failed");
125 *data
= buf_get_u32(field
.in_value
, 0, 32);
132 void mips_ejtag_drscan_32_out(struct mips_ejtag
*ejtag_info
, uint32_t data
)
135 struct jtag_tap
*tap
;
136 tap
= ejtag_info
->tap
;
139 struct scan_field field
;
143 buf_set_u32(t
, 0, field
.num_bits
, data
);
145 field
.in_value
= NULL
;
147 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
150 int mips_ejtag_drscan_8(struct mips_ejtag
*ejtag_info
, uint32_t *data
)
152 struct jtag_tap
*tap
;
153 tap
= ejtag_info
->tap
;
156 struct scan_field field
;
157 uint8_t t
[4] = {0, 0, 0, 0}, r
[4];
162 buf_set_u32(t
, 0, field
.num_bits
, *data
);
165 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
167 retval
= jtag_execute_queue();
168 if (retval
!= ERROR_OK
) {
169 LOG_ERROR("register read failed");
173 *data
= buf_get_u32(field
.in_value
, 0, 32);
178 void mips_ejtag_drscan_8_out(struct mips_ejtag
*ejtag_info
, uint8_t data
)
180 struct jtag_tap
*tap
;
181 tap
= ejtag_info
->tap
;
184 struct scan_field field
;
187 field
.out_value
= &data
;
188 field
.in_value
= NULL
;
190 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
193 /* Set (to enable) or clear (to disable stepping) the SSt bit (bit 8) in Cp0 Debug reg (reg 23, sel 0) */
194 int mips_ejtag_config_step(struct mips_ejtag
*ejtag_info
, int enable_step
)
196 int code_len
= enable_step
? 6 : 7;
198 uint32_t *code
= malloc(code_len
* sizeof(uint32_t));
200 LOG_ERROR("Out of memory");
203 uint32_t *code_p
= code
;
205 *code_p
++ = MIPS32_MTC0(1, 31, 0); /* move $1 to COP0 DeSave */
206 *code_p
++ = MIPS32_MFC0(1, 23, 0), /* move COP0 Debug to $1 */
207 *code_p
++ = MIPS32_ORI(1, 1, 0x0100); /* set SSt bit in debug reg */
209 *code_p
++ = MIPS32_XORI(1, 1, 0x0100); /* clear SSt bit in debug reg */
211 *code_p
++ = MIPS32_MTC0(1, 23, 0); /* move $1 to COP0 Debug */
212 *code_p
++ = MIPS32_B(NEG16((code_len
- 1))); /* jump to start */
213 *code_p
= MIPS32_MFC0(1, 31, 0); /* move COP0 DeSave to $1 */
215 int retval
= mips32_pracc_exec(ejtag_info
, code_len
, code
, 0, NULL
, 0, NULL
, 1);
221 int mips_ejtag_enter_debug(struct mips_ejtag
*ejtag_info
)
224 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_CONTROL
);
226 /* set debug break bit */
227 ejtag_ctrl
= ejtag_info
->ejtag_ctrl
| EJTAG_CTRL_JTAGBRK
;
228 mips_ejtag_drscan_32(ejtag_info
, &ejtag_ctrl
);
230 /* break bit will be cleared by hardware */
231 ejtag_ctrl
= ejtag_info
->ejtag_ctrl
;
232 mips_ejtag_drscan_32(ejtag_info
, &ejtag_ctrl
);
233 LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32
"", ejtag_ctrl
);
234 if ((ejtag_ctrl
& EJTAG_CTRL_BRKST
) == 0) {
235 LOG_ERROR("Failed to enter Debug Mode!");
242 int mips_ejtag_exit_debug(struct mips_ejtag
*ejtag_info
)
247 /* execute our dret instruction */
248 return mips32_pracc_exec(ejtag_info
, 1, &inst
, 0, NULL
, 0, NULL
, 0);
251 int mips_ejtag_init(struct mips_ejtag
*ejtag_info
)
253 uint32_t ejtag_version
;
256 retval
= mips_ejtag_get_impcode(ejtag_info
, &ejtag_info
->impcode
);
257 if (retval
!= ERROR_OK
)
259 LOG_DEBUG("impcode: 0x%8.8" PRIx32
"", ejtag_info
->impcode
);
261 /* get ejtag version */
262 ejtag_version
= ((ejtag_info
->impcode
>> 29) & 0x07);
264 switch (ejtag_version
) {
266 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
269 LOG_DEBUG("EJTAG: Version 2.5 Detected");
272 LOG_DEBUG("EJTAG: Version 2.6 Detected");
275 LOG_DEBUG("EJTAG: Version 3.1 Detected");
278 LOG_DEBUG("EJTAG: Version 4.1 Detected");
281 LOG_DEBUG("EJTAG: Version 5.1 Detected");
284 LOG_DEBUG("EJTAG: Unknown Version Detected");
287 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
288 ejtag_info
->impcode
& EJTAG_IMP_R3K
? " R3k" : " R4k",
289 ejtag_info
->impcode
& EJTAG_IMP_DINT
? " DINT" : "",
290 ejtag_info
->impcode
& (1 << 22) ? " ASID_8" : "",
291 ejtag_info
->impcode
& (1 << 21) ? " ASID_6" : "",
292 ejtag_info
->impcode
& EJTAG_IMP_MIPS16
? " MIPS16" : "",
293 ejtag_info
->impcode
& EJTAG_IMP_NODMA
? " noDMA" : " DMA",
294 ejtag_info
->impcode
& EJTAG_DCR_MIPS64
? " MIPS64" : " MIPS32");
296 if ((ejtag_info
->impcode
& EJTAG_IMP_NODMA
) == 0)
297 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
299 /* set initial state for ejtag control reg */
300 ejtag_info
->ejtag_ctrl
= EJTAG_CTRL_ROCC
| EJTAG_CTRL_PRACC
| EJTAG_CTRL_PROBEN
| EJTAG_CTRL_SETDEV
;
301 ejtag_info
->fast_access_save
= -1;
306 int mips_ejtag_fastdata_scan(struct mips_ejtag
*ejtag_info
, int write_t
, uint32_t *data
)
308 struct jtag_tap
*tap
;
310 tap
= ejtag_info
->tap
;
313 struct scan_field fields
[2];
315 uint8_t t
[4] = {0, 0, 0, 0};
317 /* fastdata 1-bit register */
318 fields
[0].num_bits
= 1;
319 fields
[0].out_value
= &spracc
;
320 fields
[0].in_value
= NULL
;
322 /* processor access data register 32 bit */
323 fields
[1].num_bits
= 32;
324 fields
[1].out_value
= t
;
327 fields
[1].in_value
= NULL
;
328 buf_set_u32(t
, 0, 32, *data
);
330 fields
[1].in_value
= (void *) data
;
332 jtag_add_dr_scan(tap
, 2, fields
, TAP_IDLE
);
334 if (!write_t
&& data
)
335 jtag_add_callback(mips_le_to_h_u32
,
336 (jtag_callback_data_t
) data
);