f52a92ce8ddaea471576ad1c5d6ef9e127f475f3
[linux-2.6/mini2440.git] / arch / arm / plat-s3c24xx / devs.c
blobf52a92ce8ddaea471576ad1c5d6ef9e127f475f3
1 /* linux/arch/arm/plat-s3c24xx/devs.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Base S3C24XX platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/irq.h>
27 #include <mach/fb.h>
28 #include <mach/hardware.h>
29 #include <mach/dma.h>
30 #include <mach/irqs.h>
31 #include <asm/irq.h>
33 #include <plat/regs-serial.h>
34 #include <plat/udc.h>
36 #include <plat/devs.h>
37 #include <plat/cpu.h>
38 #include <plat/regs-spi.h>
40 /* Serial port registrations */
42 static struct resource s3c2410_uart0_resource[] = {
43 [0] = {
44 .start = S3C2410_PA_UART0,
45 .end = S3C2410_PA_UART0 + 0x3fff,
46 .flags = IORESOURCE_MEM,
48 [1] = {
49 .start = IRQ_S3CUART_RX0,
50 .end = IRQ_S3CUART_ERR0,
51 .flags = IORESOURCE_IRQ,
55 static struct resource s3c2410_uart1_resource[] = {
56 [0] = {
57 .start = S3C2410_PA_UART1,
58 .end = S3C2410_PA_UART1 + 0x3fff,
59 .flags = IORESOURCE_MEM,
61 [1] = {
62 .start = IRQ_S3CUART_RX1,
63 .end = IRQ_S3CUART_ERR1,
64 .flags = IORESOURCE_IRQ,
68 static struct resource s3c2410_uart2_resource[] = {
69 [0] = {
70 .start = S3C2410_PA_UART2,
71 .end = S3C2410_PA_UART2 + 0x3fff,
72 .flags = IORESOURCE_MEM,
74 [1] = {
75 .start = IRQ_S3CUART_RX2,
76 .end = IRQ_S3CUART_ERR2,
77 .flags = IORESOURCE_IRQ,
81 static struct resource s3c2410_uart3_resource[] = {
82 [0] = {
83 .start = S3C2443_PA_UART3,
84 .end = S3C2443_PA_UART3 + 0x3fff,
85 .flags = IORESOURCE_MEM,
87 [1] = {
88 .start = IRQ_S3CUART_RX3,
89 .end = IRQ_S3CUART_ERR3,
90 .flags = IORESOURCE_IRQ,
94 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
95 [0] = {
96 .resources = s3c2410_uart0_resource,
97 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
99 [1] = {
100 .resources = s3c2410_uart1_resource,
101 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
103 [2] = {
104 .resources = s3c2410_uart2_resource,
105 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
107 [3] = {
108 .resources = s3c2410_uart3_resource,
109 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
113 /* yart devices */
115 static struct platform_device s3c24xx_uart_device0 = {
116 .id = 0,
119 static struct platform_device s3c24xx_uart_device1 = {
120 .id = 1,
123 static struct platform_device s3c24xx_uart_device2 = {
124 .id = 2,
127 static struct platform_device s3c24xx_uart_device3 = {
128 .id = 3,
131 struct platform_device *s3c24xx_uart_src[4] = {
132 &s3c24xx_uart_device0,
133 &s3c24xx_uart_device1,
134 &s3c24xx_uart_device2,
135 &s3c24xx_uart_device3,
138 struct platform_device *s3c24xx_uart_devs[4] = {
141 /* LCD Controller */
143 static struct resource s3c_lcd_resource[] = {
144 [0] = {
145 .start = S3C24XX_PA_LCD,
146 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
147 .flags = IORESOURCE_MEM,
149 [1] = {
150 .start = IRQ_LCD,
151 .end = IRQ_LCD,
152 .flags = IORESOURCE_IRQ,
157 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
159 struct platform_device s3c_device_lcd = {
160 .name = "s3c2410-lcd",
161 .id = -1,
162 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
163 .resource = s3c_lcd_resource,
164 .dev = {
165 .dma_mask = &s3c_device_lcd_dmamask,
166 .coherent_dma_mask = 0xffffffffUL
170 EXPORT_SYMBOL(s3c_device_lcd);
172 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
174 struct s3c2410fb_mach_info *npd;
176 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
177 if (npd) {
178 memcpy(npd, pd, sizeof(*npd));
179 s3c_device_lcd.dev.platform_data = npd;
180 } else {
181 printk(KERN_ERR "no memory for LCD platform data\n");
185 /* USB Device (Gadget)*/
187 static struct resource s3c_usbgadget_resource[] = {
188 [0] = {
189 .start = S3C24XX_PA_USBDEV,
190 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
191 .flags = IORESOURCE_MEM,
193 [1] = {
194 .start = IRQ_USBD,
195 .end = IRQ_USBD,
196 .flags = IORESOURCE_IRQ,
201 struct platform_device s3c_device_usbgadget = {
202 .name = "s3c2410-usbgadget",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
205 .resource = s3c_usbgadget_resource,
208 EXPORT_SYMBOL(s3c_device_usbgadget);
210 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
212 struct s3c2410_udc_mach_info *npd;
214 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
215 if (npd) {
216 memcpy(npd, pd, sizeof(*npd));
217 s3c_device_usbgadget.dev.platform_data = npd;
218 } else {
219 printk(KERN_ERR "no memory for udc platform data\n");
224 /* Watchdog */
226 static struct resource s3c_wdt_resource[] = {
227 [0] = {
228 .start = S3C24XX_PA_WATCHDOG,
229 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
230 .flags = IORESOURCE_MEM,
232 [1] = {
233 .start = IRQ_WDT,
234 .end = IRQ_WDT,
235 .flags = IORESOURCE_IRQ,
240 struct platform_device s3c_device_wdt = {
241 .name = "s3c2410-wdt",
242 .id = -1,
243 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
244 .resource = s3c_wdt_resource,
247 EXPORT_SYMBOL(s3c_device_wdt);
249 /* IIS */
251 static struct resource s3c_iis_resource[] = {
252 [0] = {
253 .start = S3C24XX_PA_IIS,
254 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
255 .flags = IORESOURCE_MEM,
259 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
261 struct platform_device s3c_device_iis = {
262 .name = "s3c2410-iis",
263 .id = -1,
264 .num_resources = ARRAY_SIZE(s3c_iis_resource),
265 .resource = s3c_iis_resource,
266 .dev = {
267 .dma_mask = &s3c_device_iis_dmamask,
268 .coherent_dma_mask = 0xffffffffUL
272 EXPORT_SYMBOL(s3c_device_iis);
274 /* RTC */
276 static struct resource s3c_rtc_resource[] = {
277 [0] = {
278 .start = S3C24XX_PA_RTC,
279 .end = S3C24XX_PA_RTC + 0xff,
280 .flags = IORESOURCE_MEM,
282 [1] = {
283 .start = IRQ_RTC,
284 .end = IRQ_RTC,
285 .flags = IORESOURCE_IRQ,
287 [2] = {
288 .start = IRQ_TICK,
289 .end = IRQ_TICK,
290 .flags = IORESOURCE_IRQ
294 struct platform_device s3c_device_rtc = {
295 .name = "s3c2410-rtc",
296 .id = -1,
297 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
298 .resource = s3c_rtc_resource,
301 EXPORT_SYMBOL(s3c_device_rtc);
303 /* ADC */
305 static struct resource s3c_adc_resource[] = {
306 [0] = {
307 .start = S3C24XX_PA_ADC,
308 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
309 .flags = IORESOURCE_MEM,
311 [1] = {
312 .start = IRQ_TC,
313 .end = IRQ_TC,
314 .flags = IORESOURCE_IRQ,
316 [2] = {
317 .start = IRQ_ADC,
318 .end = IRQ_ADC,
319 .flags = IORESOURCE_IRQ,
324 struct platform_device s3c_device_adc = {
325 .name = "s3c24xx-adc",
326 .id = -1,
327 .num_resources = ARRAY_SIZE(s3c_adc_resource),
328 .resource = s3c_adc_resource,
331 /* HWMON */
333 struct platform_device s3c_device_hwmon = {
334 .name = "s3c-hwmon",
335 .id = -1,
336 .dev.parent = &s3c_device_adc.dev,
339 /* SDI */
341 static struct resource s3c_sdi_resource[] = {
342 [0] = {
343 .start = S3C24XX_PA_SDI,
344 .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
345 .flags = IORESOURCE_MEM,
347 [1] = {
348 .start = IRQ_SDI,
349 .end = IRQ_SDI,
350 .flags = IORESOURCE_IRQ,
355 struct platform_device s3c_device_sdi = {
356 .name = "s3c2410-sdi",
357 .id = -1,
358 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
359 .resource = s3c_sdi_resource,
362 EXPORT_SYMBOL(s3c_device_sdi);
364 /* SPI (0) */
366 static struct resource s3c_spi0_resource[] = {
367 [0] = {
368 .start = S3C24XX_PA_SPI,
369 .end = S3C24XX_PA_SPI + 0x1f,
370 .flags = IORESOURCE_MEM,
372 [1] = {
373 .start = IRQ_SPI0,
374 .end = IRQ_SPI0,
375 .flags = IORESOURCE_IRQ,
380 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
382 struct platform_device s3c_device_spi0 = {
383 .name = "s3c2410-spi",
384 .id = 0,
385 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
386 .resource = s3c_spi0_resource,
387 .dev = {
388 .dma_mask = &s3c_device_spi0_dmamask,
389 .coherent_dma_mask = 0xffffffffUL
393 EXPORT_SYMBOL(s3c_device_spi0);
395 /* SPI (1) */
397 static struct resource s3c_spi1_resource[] = {
398 [0] = {
399 .start = S3C24XX_PA_SPI + S3C2410_SPI1,
400 .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
401 .flags = IORESOURCE_MEM,
403 [1] = {
404 .start = IRQ_SPI1,
405 .end = IRQ_SPI1,
406 .flags = IORESOURCE_IRQ,
411 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
413 struct platform_device s3c_device_spi1 = {
414 .name = "s3c2410-spi",
415 .id = 1,
416 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
417 .resource = s3c_spi1_resource,
418 .dev = {
419 .dma_mask = &s3c_device_spi1_dmamask,
420 .coherent_dma_mask = 0xffffffffUL
424 EXPORT_SYMBOL(s3c_device_spi1);
426 #ifdef CONFIG_CPU_S3C2440
428 /* Camif Controller */
430 static struct resource s3c_camif_resource[] = {
431 [0] = {
432 .start = S3C2440_PA_CAMIF,
433 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
434 .flags = IORESOURCE_MEM,
436 [1] = {
437 .start = IRQ_CAM,
438 .end = IRQ_CAM,
439 .flags = IORESOURCE_IRQ,
444 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
446 struct platform_device s3c_device_camif = {
447 .name = "s3c2440-camif",
448 .id = -1,
449 .num_resources = ARRAY_SIZE(s3c_camif_resource),
450 .resource = s3c_camif_resource,
451 .dev = {
452 .dma_mask = &s3c_device_camif_dmamask,
453 .coherent_dma_mask = 0xffffffffUL
457 EXPORT_SYMBOL(s3c_device_camif);
459 /* AC97 */
461 static struct resource s3c_ac97_resource[] = {
462 [0] = {
463 .start = S3C2440_PA_AC97,
464 .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1,
465 .flags = IORESOURCE_MEM,
467 [1] = {
468 .start = IRQ_S3C244x_AC97,
469 .end = IRQ_S3C244x_AC97,
470 .flags = IORESOURCE_IRQ,
472 [2] = {
473 .name = "PCM out",
474 .start = DMACH_PCM_OUT,
475 .end = DMACH_PCM_OUT,
476 .flags = IORESOURCE_DMA,
478 [3] = {
479 .name = "PCM in",
480 .start = DMACH_PCM_IN,
481 .end = DMACH_PCM_IN,
482 .flags = IORESOURCE_DMA,
484 [4] = {
485 .name = "Mic in",
486 .start = DMACH_MIC_IN,
487 .end = DMACH_MIC_IN,
488 .flags = IORESOURCE_DMA,
492 static u64 s3c_device_ac97_dmamask = 0xffffffffUL;
494 struct platform_device s3c_device_ac97 = {
495 .name = "s3c-ac97",
496 .id = -1,
497 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
498 .resource = s3c_ac97_resource,
499 .dev = {
500 .dma_mask = &s3c_device_ac97_dmamask,
501 .coherent_dma_mask = 0xffffffffUL
505 EXPORT_SYMBOL(s3c_device_ac97);
507 #endif // CONFIG_CPU_S32440