include/asm-arm/arch-moxacpu/uncompress.h

   1
   2 #ifndef _UNCOMPRESS_H
   3 #define _UNCOMPRESS_H
   4 #include <asm/arch/cpe/cpe.h>
   5
   6 static void delayputs(void)
   7 {
   8         volatile unsigned int i=100;
   9         while(i--)
  10            ;
  11 }
  12 /*
  13  * If we need to do some setup prior to decompression (like initializing the
  14  * UART if we want to use puts() above) then we define it here. Punt.
  15  */
  16
  17 #define SERIAL_THR                      0x00    /*  Transmitter Holding Register(Write).*/
  18 #define SERIAL_RBR                      0x00    /*  Receive Buffer register (Read).*/
  19 #define SERIAL_IER                      0x04    /*  Interrupt Enable register.*/
  20 #define SERIAL_IIR                      0x08    /*  Interrupt Identification register(Read).*/
  21 #define SERIAL_FCR                      0x08    /*  FIFO control register(Write).*/
  22 #define SERIAL_EFR                      0x08    //  ?????????????????????
  23 #define SERIAL_LCR                      0x0C    /*  Line Control register.*/
  24 #define SERIAL_MCR                      0x10    /*  Modem Control Register.*/
  25 #define SERIAL_LSR                      0x14    /*  Line status register(Read) .*/
  26 #define SERIAL_MSR                      0x18    /*  Modem Status register (Read).*/
  27 #define SERIAL_SPR                      0x1C    /*  Scratch pad register */
  28 #define SERIAL_DLL                      0x0     /*  Divisor Register LSB */
  29 #define SERIAL_DLM                      0x4     /*  Divisor Register MSB */
  30 #define SERIAL_PSR                      0x8     /* Prescale Divison Factor */
  31
  32 /* LSR Register */
  33 #define SERIAL_LSR_DR                  0x1      /* Data Ready */
  34 #define SERIAL_LSR_OE                  0x2      /* Overrun Error */
  35 #define SERIAL_LSR_PE                  0x4      /* Parity Error */
  36 #define SERIAL_LSR_FE                  0x8      /* Framing Error */
  37 #define SERIAL_LSR_BI                  0x10     /* Break Interrupt */
  38 #define SERIAL_LSR_THRE                0x20     /* THR Empty */
  39 #define SERIAL_LSR_TE                  0x40     /* Transmitte Empty */
  40 #define SERIAL_LSR_DE                  0x80     /* FIFO Data Error */
  41
  42 #define PUTS_UART_BASE CPE_UART1_BASE
  43
  44 static void putstr(const char *s)
  45 {
  46         while (*s)
  47         {
  48             volatile unsigned int status=0;
  49             do
  50             {
  51                 status = *(unsigned char *)(PUTS_UART_BASE+SERIAL_LSR);
  52             }
  53                 while (!((status & SERIAL_LSR_THRE)==SERIAL_LSR_THRE) );
  54
  55                 *(unsigned char *)(PUTS_UART_BASE+SERIAL_THR) = *s;
  56
  57                 if (*s == '\n')
  58                 {
  59
  60             do
  61             {
  62                 status = *(unsigned char *)(PUTS_UART_BASE+SERIAL_LSR);
  63             }
  64                 while (!((status & SERIAL_LSR_THRE)==SERIAL_LSR_THRE) );
  65
  66                         *(unsigned char *)(PUTS_UART_BASE+SERIAL_THR) = '\r';
  67                 }
  68                 s++;
  69         }
  70 }
  71
  72 #define arch_decomp_setup()
  73 #define arch_decomp_wdog()
  74
  75 #endif  // _UNCOMPRESS_H