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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / usb / net / Zydas / zddebug.c
blobadc505bcfb21de007839ac52115139eb4cb8fed9
1 #ifndef _ZD_DEBUG_C_
2 #define _ZD_DEBUG_C_
3
4 #include "zddebug.h"
5 #include "zdhw.h"
6 #include "zdutils.h"
7 #ifdef HOST_IF_USB
8 #include "zd1211.h"
9 #endif
10 //prince add for CFCC
11 #include "zdglobal.h"
12 //prince add for CFCC
13
14 extern zd_80211Obj_t dot11Obj;
15
16 //for debug message show
17 extern u32 freeSignalCount;
18 extern u32 freeFdescCount;
19 extern void zd_ShowQInfo(void);
20 extern void zd_ShowState(void);
21 extern BOOLEAN mPrivacyInvoked;
22 extern U16 mCap;
23 extern U8 mWpaBcKeyLen;
24 extern U8 mGkInstalled;
25 extern U8 mDynKeyMode;
26 extern U8 mKeyFormat;
27 int zd1205_cont_tx(struct zd1205_private *macp, u8 rate);
28 extern int zd_SetKeyContext(U8 *addr, U8 encryMode, U8 keyLength, U8 KeyId, U8 *pKeyContent);
29 extern void ConfigBcnFIFO(void);
30 extern BOOLEAN zd_CmdDeauth(MacAddr_t *sta, U8 rCode);
31 extern BOOLEAN zd_CmdDisasoc(MacAddr_t *sta, U8 rCode);
32 extern void update_beacon_interval(struct zd1205_private *macp, int val);
33 extern void PHY_UWTxPower(zd_80211Obj_t *pObj, U8 TxLevel);
34 void zd1205_set_sniffer_mode(struct zd1205_private *macp)
35 {
36 struct net_device *dev = macp->device;
37
38 dev->type = ARPHRD_IEEE80211;
39 dev->hard_header_len = ETH_HLEN;
40 dev->addr_len = ETH_ALEN;
41
42 if (netif_running(dev))
43 netif_stop_queue(dev);
44
45 zd_writel(0x01, SnifferOn);
46 zd_writel(0xffffff, Rx_Filter);
47 zd_writel(0x08, EncryptionType);
48 macp->intrMask = RX_COMPLETE_EN;
49 }
50
51 void zd1205_dump_regs(struct zd1205_private *macp)
52 {
53 #ifndef HOST_IF_USB
54 spin_lock_irqsave(&macp->q_lock, flags);
55 #endif
56
57 printk(KERN_DEBUG "*******************************************************\n");
58 printk(KERN_DEBUG "MACAddr_P1 = %08x MACAddr_P2 = %08x\n",
59 zd_readl(MACAddr_P1), zd_readl(MACAddr_P2));
60 printk(KERN_DEBUG "BCNInterval = %08x. BCNPLCPCfg = %08x\n",
61 zd_readl(BCNInterval), zd_readl(BCNPLCPCfg));
62 printk(KERN_DEBUG "TSF_LowPart = %08x, TSF_HighPart = %08x\n",
63 zd_readl(TSF_LowPart), zd_readl(TSF_HighPart));
64 printk(KERN_DEBUG "DeviceState = %08x, NAV_CCA = %08x\n",
65 zd_readl(DeviceState), zd_readl(NAV_CCA));
66 printk(KERN_DEBUG "CRC32Cnt = %08x, CRC16Cnt = %08x\n",
67 zd_readl(CRC32Cnt), zd_readl(CRC16Cnt));
68 printk(KERN_DEBUG "TotalRxFrm = %08x, TotalTxFrm = %08x\n",
69 zd_readl(TotalRxFrm), zd_readl(TotalTxFrm));
70 printk(KERN_DEBUG "RxFIFOOverrun = %08x, UnderrunCnt = %08x\n",
71 zd_readl(RxFIFOOverrun), zd_readl(UnderrunCnt));
72 printk(KERN_DEBUG "BSSID_P1 = %08x, BSSID_P2 = %08x\n",
73 zd_readl(BSSID_P1), zd_readl(BSSID_P2));
74 printk(KERN_DEBUG "Pre_TBTT = %08x, ATIMWndPeriod = %08x\n",
75 zd_readl(Pre_TBTT), zd_readl(ATIMWndPeriod));
76 printk(KERN_DEBUG "RetryCnt = %08x, IFS_Value = %08x\n",
77 zd_readl(RetryCnt), zd_readl(IFS_Value));
78 printk(KERN_DEBUG "NAV_CNT = %08x, CWmin_CWmax = %08x\n",
79 zd_readl(NAV_CNT), zd_readl(CWmin_CWmax));
80 //printk(KERN_DEBUG "GroupHash_P1 = %08x, GroupHash_P2 = %08x\n",
81 // zd_readl(GroupHash_P1), zd_readl(GroupHash_P2));
82 printk(KERN_DEBUG "DecrypErr_UNI = %08x, DecrypErr_Mul = %08x\n",
83 zd_readl(DecrypErr_UNI), zd_readl(DecrypErr_Mul));
84 printk(KERN_DEBUG "intrMask = %08x\n", macp->intrMask);
85
86 #ifndef HOST_IF_USB
87 printk(KERN_DEBUG "InterruptCtrl = %08x, Rx_Filter = %08x\n",
88 zd_readl(InterruptCtrl), zd_readl(Rx_Filter));
89 printk(KERN_DEBUG "ReadTcbAddress = %08x, ReadRfdAddress= %08x\n",
90 zd_readl(ReadTcbAddress), zd_readl(ReadRfdAddress));
91 printk(KERN_DEBUG "BCN_FIFO_Semaphore = %08x, CtlReg1 = %08x\n",
92 zd_readl(BCN_FIFO_Semaphore), zd_readl(CtlReg1));
93 printk(KERN_DEBUG "RX_OFFSET_BYTE = %08x, RX_TIME_OUT = %08x\n",
94 zd_readl(RX_OFFSET_BYTE), zd_readl(RX_TIME_OUT));
95 printk(KERN_DEBUG "CAM_DEBUG = %08x, CAM_STATUS = %08x\n",
96 zd_readl(CAM_DEBUG), zd_readl(CAM_STATUS));
97 printk(KERN_DEBUG "CAM_ROLL_TB_LOW = %08x, CAM_ROLL_TB_HIGH = %08x\n",
98 zd_readl(CAM_ROLL_TB_LOW), zd_readl(CAM_ROLL_TB_HIGH));
99 printk(KERN_DEBUG "CAM_MODE = %08x, intrMask = %08x\n", zd_readl(CAM_MODE), macp->intrMask);
100 #endif
101
102 #ifndef HOST_IF_USB
103 spin_unlock_irqrestore(&macp->q_lock, flags);
104 #endif
105 }
106
107 void zd1205_dump_cnters(struct zd1205_private *macp)
108 {
109 zd1205_lock(macp);
110 printk(KERN_DEBUG "*************************************************\n");
111 printk(KERN_DEBUG "freeTxQ = %08d, activeTxQ = %08d\n", macp->freeTxQ->count, macp->activeTxQ->count);
112 printk(KERN_DEBUG "freeSignalCount = %08d, freeFdescCount = %08d\n", freeSignalCount, freeFdescCount);
113 //printk(KERN_DEBUG "hwTotalRxFrm = %08d, hwTotalTxFrm = %08d\n", macp->hwTotalRxFrm, macp->hwTotalTxFrm);
114 //printk(KERN_DEBUG "hwRxFIFOOverrun = %08d, hwUnderrunCnt = %08d\n", macp->hwRxFIFOOverrun, macp->hwUnderrunCnt);
115 //printk(KERN_DEBUG "hwCRC32Cnt = %08d, hwCRC16Cnt = %08d\n", macp->hwCRC32Cnt, macp->hwCRC16Cnt);
116
117 //printk(KERN_DEBUG "ErrLongFrmCnt = %08d, ErrShortFrmCnt = %08d\n", macp->ErrLongFrmCnt, macp->ErrShortFrmCnt);
118 //printk(KERN_DEBUG "ErrToHostFrmCnt = %08d, ErrZeroLenFrmCnt= %08d\n", macp->ErrToHostFrmCnt, macp->ErrZeroLenFrmCnt);
119 printk(KERN_DEBUG "rxOFDMDataFrame = %08d, rx11bDataFrame = %08d\n", macp->rxOFDMDataFrame, macp->rx11bDataFrame);
120 printk(KERN_DEBUG "rxSignalQuality = %08d, rxSignalStrength= %08d\n", macp->rxSignalQuality, macp->rxSignalStrength);
121 printk(KERN_DEBUG "rxRate = %08d, txRate = %08dx\n", macp->rxInfo.rate, macp->cardSetting.CurrTxRate);
122
123 //printk(KERN_DEBUG "rxNeedFragCnt = %08d, rxCompFragCnt = %08d\n", macp->rxNeedFragCnt, macp->rxCompFragCnt);
124 //printk(KERN_DEBUG "ArFreeFailCnt = %08d, ArAgedCnt = %08d\n", macp->ArFreeFailCnt, macp->ArAgedCnt);
125 //printk(KERN_DEBUG "ArSearchFailCnt = %08d, DropFirstFragCnt= %08d\n", macp->ArSearchFailCnt, macp->DropFirstFragCnt);
126 //printk(KERN_DEBUG "skb_req = %08d, AllocSkbFailCnt= %08d\n", macp->skb_req, macp->AllocSkbFailCnt);
127 printk(KERN_DEBUG "txQueToUpCnt = %08d, txQueSetCnt = %08d\n", macp->txQueToUpCnt, macp->txQueSetCnt);
128 printk(KERN_DEBUG "sleepCnt = %08d, wakeupCnt = %08d\n", macp->sleepCnt, macp->wakeupCnt);
129 printk(KERN_DEBUG "WaitLenInfoCnt = %08d, CompLenInfoCnt = %08d\n", macp->WaitLenInfoCnt, macp->CompLenInfoCnt);
130 printk(KERN_DEBUG "Continue2Rx = %08d, NoMergedRxCnt = %08d\n", macp->Continue2Rx, macp->NoMergedRxCnt);
131 printk(KERN_DEBUG "bcnCnt = %08d, dtimCnt = %08d\n", macp->bcnCnt, macp->dtimCnt);
132 printk(KERN_DEBUG "txCnt = %08d, txCmpCnt = %08d\n", macp->txCnt, macp->txCmpCnt);
133 printk(KERN_DEBUG "retryFailCnt = %08d, rxCnt = %08d\n", macp->retryFailCnt, macp->rxCnt);
134 printk(KERN_DEBUG "usbTxCnt = %08d, usbTxCompCnt = %08d\n", macp->usbTxCnt, macp->usbTxCompCnt);
135
136 printk(KERN_DEBUG "regWaitRCompCnt = %08d, regWaitWCompCnt= %08d\n", macp->regWaitRCompCnt, macp->regWaitWCompCnt);
137 printk(KERN_DEBUG "regRWCompCnt = %08d, regUnCompCnt = %08d\n", macp->regRWCompCnt, macp->regUnCompCnt);
138 printk(KERN_DEBUG "regWaitRspCnt = %08d, regRspCompCnt = %08d\n", macp->regWaitRspCnt, macp->regRspCompCnt);
139 printk(KERN_DEBUG "regRdSleepCnt = %08d, regRspCompCnt = %08d\n", macp->regRdSleepCnt, macp->regRspCompCnt);
140 printk(KERN_DEBUG "lastRxComp = %08d\n", macp->lastRxComp);
141 printk(KERN_DEBUG "macp.flags = %08x ", (u32) macp->flags);
142 if(macp->bHandleNonRxTxRunning)
143 {
144 printk("NonRxTxRunning ");
145 }
146
147 if(test_bit(ZD1211_TX_BUSY,&macp->flags)) //B4
148 printk("TX_BUSY ");
149 if(test_bit(ZD1211_REQ_COMP,&macp->flags)) //B2
150 printk("REQ_COMP ");
151 if(test_bit(ZD1211_RUNNING,&macp->flags)) //B3
152 printk("RUNNING ");
153 if(test_bit(ZD1211_CMD_FINISH,&macp->flags)) //B5
154 printk("CMD_FINISH ");
155 printk("\n");
156 printk("bDeviceInSleep:%d\n", dot11Obj.bDeviceInSleep);
157
158
159 zd_ShowQInfo();
160 zd_ShowState();
161 macp->bcnCnt = 0;
162 macp->dtimCnt = 0;
163 macp->rxCnt = 0;
164 macp->txCmpCnt = 0;
165 macp->txCnt = 0;
166 macp->retryFailCnt = 0;
167 macp->txIdleCnt = 0;
168 macp->rxIdleCnt = 0;
169 macp->hwTotalRxFrm = 0;
170 macp->hwTotalTxFrm = 0;
171
172 macp->hwRxFIFOOverrun = 0;
173 macp->hwUnderrunCnt = 0;
174 macp->hwCRC32Cnt =0;
175 macp->hwCRC16Cnt =0;
176
177 macp->ErrLongFrmCnt = 0;
178 macp->ErrShortFrmCnt = 0;
179 macp->ErrToHostFrmCnt = 0;
180 macp->ErrZeroLenFrmCnt = 0;
181 macp->rxOFDMDataFrame = 0;
182 macp->rx11bDataFrame = 0;
183
184 macp->ArFreeFailCnt = 0;
185 macp->ArAgedCnt = 0;
186 macp->ArSearchFailCnt = 0;
187 macp->DropFirstFragCnt = 0;
188 macp->rxNeedFragCnt = 0;
189 macp->rxCompFragCnt = 0;
190 macp->txQueToUpCnt = 0;
191 macp->txQueSetCnt = 0;
192 //macp->sleepCnt = 0;
193 //macp->wakeupCnt = 0;
194 macp->Continue2Rx = 0;
195 macp->NoMergedRxCnt = 0;
196 #ifdef WPA_DEBUG
197 printk("cardSet.WPAIeLen=%d\n",macp->cardSetting.WPAIeLen);
198 printk("mDynKeyMode:%d,mKeyFormat:%d,mPrivacyInvoked:%d,mCap:0x%X,mWpaBcKenLen:%d\n",mDynKeyMode,mKeyFormat,mPrivacyInvoked,mCap,mWpaBcKeyLen);
199 #endif
200 zd1205_unlock(macp);
201 }
202
203 void zd1205_update_brate(struct zd1205_private *macp, u32 value)
204 {
205 u8 ii;
206 u8 nRate;
207 u8 *pRate;
208 card_Setting_t *pSetting = &macp->cardSetting;
209 u8 rate_list[4] = { 0x02, 0x04, 0x0B, 0x16 };
210
211 /* Get the number of rates we support */
212 nRate = pSetting->Info_SupportedRates[1];
213
214 pRate = &(pSetting->Info_SupportedRates[2]);
215
216 for(ii = 0; ii < nRate; ii++)
217 {
218 /* If the Rate is less than the basic Rate, mask 0x80 with the value. */
219 if((*pRate & 0x7f) <= rate_list[value])
220 *pRate |= 0x80;
221 else
222 *pRate &= 0x7f;
223
224 pRate++;
225 }
226 }
227 /*
228 void acquire_ctrl_of_phy_req(void *regp)
229 {
230 u32 tmpValue;
231
232 tmpValue = zd_readl(CtlReg1);
233 tmpValue &= ~0x80;
234 zd_writel(tmpValue, CtlReg1);
235 }
236
237
238 void release_ctrl_of_phy_req(void *regp)
239 {
240 u32 tmpValue;
241
242 tmpValue = zd_readl(CtlReg1);
243 tmpValue |= 0x80;
244 zd_writel(tmpValue, CtlReg1);
245 }
246 */
247
248 void zd1205_dump_phy(struct zd1205_private *macp)
249 {
250 void *regp = macp->regp;
251
252 u32 regValue[4];
253 int i;
254
255 LockPhyReg(&dot11Obj);
256 for (i=0; i<256; i+=4) {
257 //acquire_ctrl_of_phy_req(regp);
258 if (i==4)//The offset of CR4 to CR8 are not multiplied by 4 directly.
259 {
260 regValue[0]=zd_readl(ZD_CR4);
261 regValue[1]=zd_readl(ZD_CR5);
262 regValue[2]=zd_readl(ZD_CR6);
263 regValue[3]=zd_readl(ZD_CR7);
264 }
265 else if (i==8)
266 {
267 regValue[0]=zd_readl(ZD_CR8);
268 regValue[1]=zd_readl(ZD_CR9);
269 regValue[2]=zd_readl(ZD_CR10);
270 regValue[3]=zd_readl(ZD_CR11);
271 }
272 else
273 {
274 regValue[0] = zd_readl(4*i);
275 regValue[1] = zd_readl(4*(i+1));
276 regValue[2] = zd_readl(4*(i+2));
277 regValue[3] = zd_readl(4*(i+3));
278 }
279
280 printk(KERN_DEBUG "CR%03d = %02x CR%03d = %02x CR%03d = %02x CR%03d = %02x\n",
281 i, (u8)regValue[0], i+1, (u8)regValue[1], i+2, (u8)regValue[2], i+3, (u8)regValue[3]);
282 //release_ctrl_of_phy_req(regp);
283 }
284 UnLockPhyReg(&dot11Obj);
285 }
286 /*
287 void zd1205_dump_eeprom(struct zd1205_private *macp)
288 {
289 u32 e2pValue, e2pValue1;
290 int i;
291
292 for (i=0; i<20; i+=2) {
293 e2pValue = zd_readl(E2P_SUBID+4*i);
294 e2pValue1 = zd_readl(E2P_SUBID+4*(i+1));
295 printk(KERN_DEBUG "0x%x = %08x, 0x%x = %08x\n", E2P_SUBID+4*i, e2pValue, E2P_SUBID+4*(i+1), e2pValue1);
296 }
297 }
298 */
299 void zd1205_dump_eeprom(struct zd1205_private *macp)
300 {
301 u32 V1,V2,V3,V4 ;
302 int i;
303
304 for (i=0; i<0x30; i+=4) {
305 V1 = zd_readl(E2P_SUBID+4*i);
306 V2 = zd_readl(E2P_SUBID+4*(i+1));
307 V3 = zd_readl(E2P_SUBID+4*(i+2));
308 V4 = zd_readl(E2P_SUBID+4*(i+3));
309
310 printk(KERN_DEBUG "0x%x = %08x %08x %08x %08x \n", E2P_SUBID+4*i, V1,V2,V3,V4);
311 }
312 }
313
314 extern void zd_ShowHashInfo(u8 aid);
315 void zd1205_show_hash(struct zd1205_private *macp, u32 value)
316 {
317 if (value < 33)
318 zd_ShowHashInfo(value);
319 }
320
321 void zd1205_show_card_setting(struct zd1205_private *macp)
322 {
323 card_Setting_t *pSetting = &macp->cardSetting;
324
325 printk(KERN_DEBUG "RTSThreshold = %04x FragThreshold = %04x\n",
326 pSetting->RTSThreshold, pSetting->FragThreshold);
327 printk(KERN_DEBUG "DtimPeriod = %04x BeaconInterval = %04x\n",
328 pSetting->DtimPeriod, pSetting->BeaconInterval);
329 printk(KERN_DEBUG "EncryMode = %04x EncryOnOff = %04x\n",
330 pSetting->EncryMode, pSetting->EncryOnOff);
331 printk(KERN_DEBUG "EncryKeyId = %04x WepKeyLen = %04x\n",
332 pSetting->EncryKeyId, pSetting->WepKeyLen);
333 printk(KERN_DEBUG "PreambleType = %04x AuthMode = %04x\n",
334 pSetting->PreambleType, pSetting->AuthMode);
335 printk(KERN_DEBUG "Channel = %04x BssType = %04x\n",
336 pSetting->Channel, pSetting->BssType);
337 printk(KERN_DEBUG "SuggestionMode = %04x PwrState = %04x\n",
338 macp->SuggestionMode, macp->PwrState);
339 printk(KERN_DEBUG "bPSMSupported = %04x bAssoc = %04x\n",
340 macp->bPSMSupported, macp->bAssoc);
341 printk(KERN_DEBUG "bAnyActivity = %04x BSS_Members = %04x\n",
342 macp->bAnyActivity, macp->BSS_Members);
343 }
344 #if 0
345 void zd1205_dump_cam(struct zd1205_private *macp)
346 {
347 int ii;
348
349 for(ii = 0; ii < 445; ii++) {
350 u32 data = HW_CAM_Read(&dot11Obj, ii);
351
352 if((ii % 4) == 0)
353 printk(KERN_ERR "\nAddr=0x%04x ", ii);
354
355 printk(KERN_ERR "0x%08x ", data);
356 }
357
358 printk(KERN_ERR "\n");
359 }
360 #endif
361 void zd1205_dump_cam(struct zd1205_private *macp,u32 beginAddr, u32 length)
362 {
363 u8 valid_uid[40];
364 u8 valid_uid_cnt;
365 u32 data;
366 int ii,jj;
367 //u32 RollCallTblLow;
368 //u32 RollCallTblHigh;
369 u32 MACINCAM[6];
370 u32 tmpRollCallTblLow;
371 u32 tmpRollCallTblHigh;
372 //u32 bDisplay;
373 int UserIdBase;
374 char *EncTypeStr[]={"","WEP64","TKIP","","AES","WEP128","WEP256",""};
375 char *CamModeStr[]={"IBSS","AP","STA","WDS","Client","VAP","",""};
376
377 for(ii = 0; ii < length; ii++) {
378 data = HW_CAM_Read(&dot11Obj, beginAddr+ii);
379 printk(KERN_ERR "\nAddr(%03u)=0x%08x", ii+beginAddr, data);
380 }
381 printk(KERN_ERR "\n");
382 data = zd_readl(0x700); // Cam mode: MACREG(0x700)[2:0]
383 printk(KERN_ERR "CAM Mode: %s\n", CamModeStr[data&7]);
384 //tmpRollCallTblLow=RollCallTblLow=zd_readl(0x704);
385 //tmpRollCallTblHigh=RollCallTblHigh=zd_readl(0x708)&0xf;
386 tmpRollCallTblLow=zd_readl(0x704);
387 tmpRollCallTblHigh=zd_readl(0x708)&0xf;
388 //Scan user ID of CAM
389 valid_uid_cnt=0; //Reset number of user ID
390 for (ii=0; ii<40; ii++)
391 {
392 valid_uid[ii]=0;// Reset to invalid
393
394 if (ii<32)
395 {// For user 0 - 31
396 if (tmpRollCallTblLow & 1)
397 {
398 valid_uid[ii]=1;// set to valid
399 valid_uid_cnt++;
400 }
401 tmpRollCallTblLow = tmpRollCallTblLow >> 1;
402 }
403 else
404 {
405 if (tmpRollCallTblHigh & 1)
406 {
407 valid_uid[ii]=1; // set to valid
408 valid_uid_cnt++;
409 }
410 tmpRollCallTblHigh = tmpRollCallTblHigh >> 1;
411 }
412 }
413 // Dump MAC address
414 UserIdBase=0;
415 for(ii = 0; ii < 60; ii+=6)
416 {
417 //UserIdBase = UserIdBase+4;
418 MACINCAM[0]=HW_CAM_Read(&dot11Obj, ii);
419 MACINCAM[1]=HW_CAM_Read(&dot11Obj, ii+1);
420 MACINCAM[2]=HW_CAM_Read(&dot11Obj, ii+2);
421 MACINCAM[3]=HW_CAM_Read(&dot11Obj, ii+3);
422 MACINCAM[4]=HW_CAM_Read(&dot11Obj, ii+4);
423 MACINCAM[5]=HW_CAM_Read(&dot11Obj, ii+5);
424 for (jj=0; jj<4; jj++)
425 {
426 if (valid_uid[UserIdBase+jj])
427 {
428 printk(KERN_ERR "UID:%d Mac:%02x:%02x:%02x:%02x:%02x:%02x\n",UserIdBase+jj, MACINCAM[0]&255, MACINCAM[1]&255, MACINCAM[2]&255, MACINCAM[3]&255,MACINCAM[4]&255,MACINCAM[5]&255);
429 }
430 MACINCAM[0]=MACINCAM[0]>>8;
431 MACINCAM[1]=MACINCAM[1]>>8;
432 MACINCAM[2]=MACINCAM[2]>>8;
433 MACINCAM[3]=MACINCAM[3]>>8;
434 MACINCAM[4]=MACINCAM[4]>>8;
435 MACINCAM[5]=MACINCAM[5]>>8;
436 }
437 UserIdBase = UserIdBase+4;
438 }
439 // Dump Encryption type: CAM location: 60-65
440 //tmpRollCallTblLow=RollCallTblLow;
441 //tmpRollCallTblHigh=RollCallTblHigh;
442 for(ii=60; ii<66; ii++)
443 {
444 data = HW_CAM_Read(&dot11Obj, ii);
445 UserIdBase=(ii-60)*8; //One location for 8 users.
446 if (UserIdBase >= 40)
447 {
448 {//location 65:For default key
449 printk(KERN_ERR "DefaultKeySet:%s\n",EncTypeStr[data&7]);
450 }
451 }
452 else
453 {
454 for(jj=0; jj<8; jj++)
455 {
456 if (valid_uid[UserIdBase+jj])
457 {
458 printk(KERN_ERR "UID:%02d:%s\n",UserIdBase+jj,EncTypeStr[data&7]);
459 valid_uid[UserIdBase+jj] |= ((data & 7)<<1);
460 }
461 data = data >> 4; // Next user.
462 }
463 }
464 }
465 printk(KERN_ERR "KeyContents:\n");
466 for (ii=0; ii<40; ii++)
467 {
468 u32 keylen;
469 u32 keytype;
470
471 if (valid_uid[ii])
472 {
473 keytype=valid_uid[ii]>>1;
474 switch(keytype){
475 case 2://TKIP
476 keylen=32;
477 break;
478 case 4://AES
479 keylen=16;
480 break;
481 case 1://WEP64
482 keylen=8;
483 break;
484 case 5://WEP128
485 keylen=16;
486 break;
487 default:
488 keylen=0;
489 break;
490 }
491 keylen = keylen >> 2;
492 printk(KERN_ERR "UID:%02d\n", ii);
493 for (jj=0; jj<keylen; jj++)
494 {
495 data = HW_CAM_Read(&dot11Obj, (66+(8*ii))+jj);
496 printk(KERN_ERR "%08x\n", data);
497 }
498 }
499 }
500 printk(KERN_ERR "\n");
501 }
502 void zd1205_cam_read(struct zd1205_private *macp, u32 addr)
503 {
504 u32 value = HW_CAM_Read(&dot11Obj, addr);
505 printk(KERN_ERR "Addr: 0x%08x, value = 0x%08x\n", addr, value);
506 }
507
508 void zd1205_cam_write(struct zd1205_private *macp, u32 addr, u32 value)
509 {
510 HW_CAM_Write(&dot11Obj, addr, value);
511 printk(KERN_ERR "Write value: 0x%08x to CAM address: 0x%08x\n", value, addr);
512 }
513
514 void zd1205_cam_rest(struct zd1205_private *macp, int mode)
515 {
516
517 }
518
519 int zd1205_zd_dbg_ioctl(struct zd1205_private *macp, struct zdap_ioctl *zdreq)
520 {
521 void *regp = macp->regp;
522 u16 zd_cmd;
523 u32 tmp_value;
524 u32 tmp_addr;
525 u32 CRn;
526
527 zd_cmd = zdreq->cmd;
528
529 switch(zd_cmd) {
530 //prince add for CFCC begin
531 case ZD_IOCTL_SET_CHANNEL:
532 tmp_addr = zdreq->addr;
533 tmp_value = zdreq->value;
534
535 mMacMode = (U8)tmp_value;
536 HW_Set_AL7230B_RF_Chips( &dot11Obj,tmp_addr,1,(U8)tmp_value );
537 break;
538 //prince add for CFCC end
539 case ZD_IOCTL_DEBUG_FLAG:
540 macp->debugflag = zdreq->addr;
541 mDebugFlag = zdreq->value;
542 break;
543 case ZD_IOCTL_REG_READ:
544 LockPhyReg(&dot11Obj);
545 tmp_value = zd_readl(zdreq->addr);
546 UnLockPhyReg(&dot11Obj);
547 zdreq->value = tmp_value;
548
549 printk(KERN_DEBUG "zd1211 read register: reg = 0x%04x, value = 0x%08x\n",
550 zdreq->addr, zdreq->value);
551
552 // if (copy_to_user(ifr->ifr_data, &zdreq, sizeof (zdreq)))
553 // return -EFAULT;
554 break;
555
556 case ZD_IOCTL_REG_WRITE:
557 LockPhyReg(&dot11Obj);
558 zd_writel(zdreq->value, zdreq->addr);
559 UnLockPhyReg(&dot11Obj);
560
561 if (zdreq->addr == RX_OFFSET_BYTE)
562 macp->rxOffset = zdreq->value;
563 break;
564
565 case ZD_IOCTL_MEM_DUMP:
566 zd1205_dump_data("mem", (u8 *)zdreq->addr, zdreq->value);
567 //memcpy(&zdreq->data[0], (u8 *)zdreq->addr, zdreq->value);
568 //if (copy_to_user(ifr->ifr_data, &zdreq, sizeof (zdreq)))
569 //return -EFAULT;
570 break;
571
572 case ZD_IOCTL_RATE:
573 /* Check for the validation of vale */
574 if(zdreq->value > 3 || zdreq->value < 0)
575 {
576 printk(KERN_DEBUG "zd1205: Basic Rate %x doesn't support\n", zdreq->value);
577 break;
578 }
579
580 printk(KERN_DEBUG "zd1205: Basic Rate = %x\n", zdreq->value);
581 zd1205_update_brate(macp, zdreq->value);
582 break;
583
584 case ZD_IOCTL_SNIFFER:
585 macp->sniffer_on = zdreq->value;
586 printk(KERN_DEBUG "zd1205: sniffer_on = %x\n", macp->sniffer_on);
587 zd1205_set_sniffer_mode(macp);
588 break;
589
590 case ZD_IOCTL_CAM_DUMP://Arg1: Location, Arg2: Length
591 {
592 u32 startAddr, length;
593 startAddr=((zdreq->addr & 0xF00)>>8)*100+
594 ((zdreq->addr & 0xF0)>>4)*10+
595 (zdreq->addr & 0xF);
596 length=((zdreq->value & 0xF00)>>8)*100+
597 ((zdreq->value & 0xF0)>>4)*10+
598 (zdreq->value & 0xF);
599 printk(KERN_DEBUG "zd1205: dump cam\n");
600 zd1205_dump_cam(macp,startAddr,length);
601 break;
602 }
603 case ZD_IOCTL_DUMP_PHY:
604 printk(KERN_DEBUG "zd1205: dump phy\n");
605 zd1205_dump_phy(macp);
606 break;
607 case ZD_IOCTL_READ_PHY:
608 case ZD_IOCTL_WRITE_PHY:
609 LockPhyReg(&dot11Obj);
610 tmp_addr = zdreq->addr;
611 CRn= ((tmp_addr & 0xF00)>>8)*100+
612 ((tmp_addr & 0xF0)>>4)*10+
613 (tmp_addr & 0xF);
614 if (CRn >= 4 && CRn <= 8)//Special handling for CR4 to CR8
615 {
616 u8 cnvtbl1[]={0x20, 0x10, 0x14, 0x18, 0x1c};
617 tmp_addr = cnvtbl1[CRn-4];
618 }
619 else
620 {
621 tmp_addr = CRn*4;
622 }
623 if (zd_cmd == ZD_IOCTL_READ_PHY)
624 {
625 zdreq->value = zd_readl(tmp_addr);
626 printk(KERN_DEBUG "CR%d=0x%x\n",CRn, zdreq->value);
627 }
628 else
629 {// ZD_IOCTL_WRITE_PHY
630 zd_writel(zdreq->value, tmp_addr);
631 printk(KERN_DEBUG "set CR%d=0x%x\n",CRn, zdreq->value);
632 }
633 UnLockPhyReg(&dot11Obj);
634 break;
635
636 case ZD_IOCTL_CARD_SETTING:
637 printk(KERN_DEBUG "zd1205: card setting\n");
638 zd1205_show_card_setting(macp);
639 break;
640
641 case ZD_IOCTL_HASH_DUMP:
642 printk(KERN_DEBUG "zd1205: aid = %x\n", zdreq->value);
643 zd1205_show_hash(macp, zdreq->value);
644 break;
645
646 case ZD_IOCTL_RFD_DUMP:
647 printk(KERN_DEBUG "===== zd1205 rfd dump =====\n");
648 zd1205_dump_rfds(macp);
649 break;
650
651 case ZD_IOCTL_MEM_READ: {
652 u32 *p;
653
654 p = (u32 *) bus_to_virt(zdreq->addr);
655 printk(KERN_DEBUG "zd1205: read memory addr: 0x%08x value: 0x%08x\n", zdreq->addr, *p);
656 break;
657 }
658
659 case ZD_IOCTL_MEM_WRITE: {
660 u32 *p;
661
662 p = (u32 *) bus_to_virt(zdreq->addr);
663 *p = zdreq->value;
664 printk(KERN_DEBUG "zd1205: write value: 0x%08x to memory addr: 0x%08x\n", zdreq->value, zdreq->addr);
665 break;
666 }
667
668 case ZD_IOCTL_TX_RATE:
669 printk(KERN_DEBUG "zd1205: set tx rate = %d\n", zdreq->value);
670
671 if (zdreq->value < 0x0c){
672 macp->cardSetting.FixedRate = zdreq->value;
673 macp->bFixedRate = 1;
674 }
675 else
676 macp->bFixedRate = 0;
677 break;
678
679 case ZD_IOCTL_EEPROM:
680 printk(KERN_DEBUG "zd1205: dump eeprom\n");
681 zd1205_dump_eeprom(macp);
682 break;
683
684 /* Generate the beacon */
685 case ZD_IOCTL_BCN:
686 dot11Obj.dbg_cmd |= DBG_CMD_BEACON;
687 printk(KERN_DEBUG "zd1205: configuration beacon\n");
688 ConfigBcnFIFO();
689 break;
690
691 case ZD_IOCTL_REG_READ16:
692 tmp_value = zd1211_readl(zdreq->addr, false);
693 zdreq->value = tmp_value & 0xffff;
694 printk(KERN_DEBUG "zd1205 read register: reg = %4x, value = %4x\n",
695 zdreq->addr, zdreq->value);
696 break;
697
698 case ZD_IOCTL_REG_WRITE16:
699 tmp_value = zdreq->value & 0xffff;
700 zd1211_writel(zdreq->addr, tmp_value, false);
701 printk(KERN_DEBUG "zd1205 write register: reg = %4x, value = %4x\n",
702 zdreq->addr, zdreq->value);
703 break;
704
705 case ZD_IOCTL_CAM_READ:
706 printk(KERN_ERR "zd1205: cam read, addr: 0x%08x\n", zdreq->addr);
707 zd1205_cam_read(macp, zdreq->addr);
708 break;
709
710 case ZD_IOCTL_CAM_WRITE:
711 printk(KERN_ERR "zd1205: cam write, addr: 0x%08x value: 0x%08x\n", zdreq->addr, zdreq->value);
712 zd1205_cam_write(macp, zdreq->addr, zdreq->value);
713 break;
714
715 case ZD_IOCTL_CAM_RESET:
716 printk(KERN_ERR "zd1205: reset cam\n");
717 zd1205_cam_rest(macp, zdreq->value);
718 break;
719
720 case ZD_IOCTL_CONT_TX:
721 zd1205_cont_tx(macp, zdreq->value);
722 break;
723 case ZD_IOCTL_SET_MIC_CNT_ENABLE:
724 dot11Obj.MIC_CNT = zdreq->value>0?1:0;
725 printk("WPA MIC Counter Measure Feature : %s\n",
726 dot11Obj.MIC_CNT ? "Enable":"Disalbe");
727
728 break;
729 case ZD_IOCTL_GET_MIC_CNT_ENABLE:
730 printk("WPA MIC Counter Measure Feature : %s\n",
731 dot11Obj.MIC_CNT ? "Enable":"Disalbe");
732 break;
733 case ZD_IOCTL_UW_PWR :
734 if(zdreq->addr == 0)
735 printk("Current Level : %d\n",dot11Obj.UWCurrentTxLevel);
736 else if(zdreq->addr == 1)
737 {
738 printk("Set Current Level : %d\n", zdreq->value);
739 if(zdreq->value < 19 && zdreq->value >= 0)
740 {
741 dot11Obj.UWCurrentTxLevel = zdreq->value;
742 dot11Obj.UWDefaulTxLevel = zdreq->value;
743 PHY_UWTxPower(&dot11Obj, dot11Obj.UWDefaulTxLevel);
744 }
745 }
746 else
747 printk("Unknown Command : %d\n", zdreq->addr);
748 break;
749 default :
750 printk(KERN_ERR "zd_dbg_ioctl: error command = %x\n", zd_cmd);
751 break;
752 }
753
754 return 0;
755 }
756
757 int zd1205_wpa_ioctl(struct zd1205_private *macp, struct zydas_wlan_param *zdparm)
758 {
759 card_Setting_t *pSetting = &macp->cardSetting;
760 int ret = 0;
761 u8 keylen;
762 u8 idx;
763 u8 *pkey;
764 u8 CamEncryType=0;
765 //u8 tmpDynKeyMode;
766 u8 bTxKey;
767 u8 bClrPerStaKey=0;
768
769
770 #ifdef HOSTAPD_SUPPORT
771 u8 mac_addr[80];
772 #endif
773
774 //Test write permission
775 switch(zdparm->cmd) {
776 case ZD_CMD_SET_ENCRYPT_KEY:
777 {// Dump key info:
778 WPADEBUG("SET_ENCRYPT_KEY: alg=%s key_idx=%d set_tx=%d key_len=%d ,WPAIeLen=%d, for " MACSTR "\n", zdparm->u.crypt.alg, zdparm->u.crypt.idx, zdparm->u.crypt.flags, zdparm->u.crypt.key_len, macp->cardSetting.WPAIeLen, MAC2STR(zdparm->sta_addr));
779 }
780 bTxKey = zdparm->u.crypt.flags;
781 keylen = zdparm->u.crypt.key_len;
782 idx = zdparm->u.crypt.idx;
783 pkey = zdparm->u.crypt.key;
784
785 if (!strcmp(zdparm->u.crypt.alg, "NONE"))
786 {
787 U8 zero_mac[]={0,0,0,0,0,0};
788
789 CamEncryType = NO_WEP;
790 // pSetting->DynKeyMode = 0;
791 // pSetting->EncryMode=0;
792 // mKeyFormat=0;
793 if (macp->cardSetting.BssType == INDEPENDENT_BSS)
794 {
795 WPADEBUG("Ignore del key request in IBSS\n");
796 return ret;
797 }
798
799 zd_SetKeyInfo(zdparm->sta_addr, CamEncryType, keylen, idx, pkey);
800 if (zdparm->sta_addr[0] & 1)//del group key
801 {
802 if ((macp->cardSetting.BssType == INFRASTRUCTURE_BSS) || macp->cardSetting.WPASupport ==0 || macp->cardSetting.WPAIeLen==0)
803 {//802.1x dynamic WEP
804 WPADEBUG("deleting Group key\n");
805 mDynKeyMode = 0;
806 mKeyFormat = 0;
807 mPrivacyInvoked=FALSE;
808 mCap &= ~CAP_PRIVACY;
809 macp->cardSetting.EncryOnOff=macp->cardSetting.EncryMode = 0;
810 macp->cardSetting.EncryKeyId=0;
811
812 }
813 mWpaBcKeyLen = mGkInstalled = 0;
814 }
815 else
816 {
817 if (memcmp(zero_mac,zdparm->sta_addr, 6)==0)
818 {
819 mDynKeyMode=0;
820 mKeyFormat=0;
821 pSetting->DynKeyMode=0;
822 pSetting->EncryMode=0;
823 mDynKeyMode=0;
824 }
825 }
826 return ret;
827 }
828 else if (!strcmp(zdparm->u.crypt.alg, "TKIP"))
829 {
830 CamEncryType = TKIP;
831 //if (idx == 0)
832 {// Pairwise key
833 mKeyFormat = CamEncryType;
834 mDynKeyMode = pSetting->DynKeyMode = DYN_KEY_TKIP;
835 }
836 }
837 else if (!strcmp(zdparm->u.crypt.alg, "CCMP"))
838 {
839 CamEncryType = AES;
840 //if (idx == 0)
841 {// Pairwise key
842 mKeyFormat = CamEncryType;
843 mDynKeyMode = pSetting->DynKeyMode = DYN_KEY_AES;
844 }
845 }
846 else if (!strcmp(zdparm->u.crypt.alg, "WEP"))
847 {
848 WPADEBUG("**********************Set WEP key\n");
849 mPrivacyInvoked=TRUE;
850 mCap |= CAP_PRIVACY;
851 macp->cardSetting.EncryOnOff=1;
852
853 if (keylen == 5)
854 { // WEP 64
855 CamEncryType = WEP64;
856 //tmpDynKeyMode=DYN_KEY_WEP64;
857 }
858 else if (keylen == 13)
859 {//keylen=13, WEP 128
860 CamEncryType = WEP128;
861 //tmpDynKeyMode=DYN_KEY_WEP128;
862 }
863 else
864 {
865 CamEncryType = WEP256;
866 }
867
868 // For Dynamic WEP key (Non-WPA Radius), the key ID range: 0-3
869 // In WPA/RSN mode, the key ID range: 1-3, usually, a broadcast key.
870 // For WEP key setting: we set mDynKeyMode and mKeyFormat in following case:
871 // 1. For 802.1x dynamically generated WEP key method.
872 // 2. For WPA/RSN mode, but key id == 0. (But this is an impossible case)
873 // So, only check case 1.
874 if (macp->cardSetting.WPAIeLen==0)
875 //if (macp->cardSetting.WPASupport == 0)
876 {
877 WPADEBUG("set WEP Enc type =%d\n", CamEncryType);
878 macp->cardSetting.EncryMode = CamEncryType;
879 mKeyFormat = CamEncryType;
880 //mDynKeyMode = pSetting->DynKeyMode = tmpDynKeyMode;
881 if (macp->cardSetting.BssType == INDEPENDENT_BSS)
882 {
883 mDynKeyMode = 0;
884 }
885 else if (bTxKey)
886 {
887 mDynKeyMode = 0;
888 bClrPerStaKey = 1;
889 macp->cardSetting.EncryKeyId = idx;
890 }
891 }
892
893 }
894 /* DUMP key context */
895 #ifdef WPA_DEBUG
896 if (keylen > 0)
897 {
898 int ii;
899 printk("zddebug:Key Context:\n");
900 for(ii = 0; ii < keylen;) {
901 printk("0x%02x ", pkey[ii]);
902 if((++ii % 16) == 0)
903 printk("\n");
904 }
905 printk("\n");
906 }
907 #endif
908 zd_SetKeyInfo(zdparm->sta_addr, CamEncryType, keylen, idx + (bTxKey << 7) + (bClrPerStaKey << 6), pkey);
909
910 break;
911
912 #if 0
913 WPADEBUG("zd1205_wpa_ioctl: ZD_CMD_SET_ENCRYPT_KEY\n");
914
915 /* DUMP the Key information set by the upper layer */
916 {
917 WPADEBUG("alg=%s key_idx=%d set_tx=%d key_len=%d\n",
918 zdparm->u.crypt.alg, zdparm->u.crypt.idx,
919 zdparm->u.crypt.flags, zdparm->u.crypt.key_len);
920 }
921
922 keylen = zdparm->u.crypt.key_len;
923 idx = zdparm->u.crypt.idx;
924 pkey = zdparm->u.crypt.key;
925
926 if (strcmp(zdparm->u.crypt.alg, "NONE") == 0) {
927 /* Reset those settings related to WPA */
928 mKeyFormat=0;
929 pSetting->EncryMode=0;
930 pSetting->DynKeyMode = 0;
931 return ret;
932 }
933 else if (strcmp(zdparm->u.crypt.alg, "TKIP") == 0) {
934 /* Try to change mDynKeyMode here. 4D06 */
935 pSetting->DynKeyMode = DYN_KEY_TKIP;
936 mDynKeyMode = DYN_KEY_TKIP;
937 mKeyFormat = TKIP;
938 }
939 else if (strcmp(zdparm->u.crypt.alg, "CCMP") == 0) {
940 /* Try to change mDynKeyMode here. 4D06 */
941 pSetting->DynKeyMode = DYN_KEY_AES;
942 mDynKeyMode = DYN_KEY_AES;
943 mKeyFormat = AES;
944 }
945
946 /* DUMP key context */
947 {
948 int ii;
949
950 WPADEBUG("Key Context: ");
951 for(ii = 0; ii < keylen;) {
952 WPADEBUG("0x%02x ", pkey[ii]);
953
954 if((++ii % 16) == 0)
955 WPADEBUG("\n");
956 }
957 WPADEBUG("\n");
958 }
959
960 /* If Key Index is 0, this is the unicast key */
961 if (idx == 0) {
962 /* Set unicast key installed information */
963 zd_SetKeyContext(&macp->BSSID[0], pSetting->DynKeyMode, keylen, idx, pkey);
964 }
965 else {
966 /* Set broadcast key installed information */
967 u8 bcaddr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
968
969 zd_SetKeyContext(bcaddr, pSetting->DynKeyMode, keylen, idx, pkey);
970 }
971
972 break;
973 #endif
974 case ZD_CMD_SET_MLME:
975 WPADEBUG("zd1205_wpa_ioctl: ZD_CMD_SET_MLME\n");
976
977 /* Translate STA's address */
978 sprintf(mac_addr, "%02x:%02x:%02x:%02x:%02x:%02x", zdparm->sta_addr[0], zdparm->sta_addr[1],
979 zdparm->sta_addr[2], zdparm->sta_addr[3], zdparm->sta_addr[4], zdparm->sta_addr[5]);
980
981 switch(zdparm->u.mlme.cmd) {
982 case MLME_STA_DEAUTH:
983 printk(" -------Call zd_CmdDeauth, reason:%d\n",zdparm->u.mlme.reason_code);
984 if(zd_CmdDeauth((MacAddr_t *) zdparm->sta_addr, zdparm->u.mlme.reason_code) == FALSE)
985 WPADEBUG("Can't deauthencate STA: %s\n", mac_addr);
986 else
987 WPADEBUG("Deauthenticate STA: %s with reason code: %d\n", mac_addr, zdparm->u.mlme.reason_code);
988 break;
989
990 case MLME_STA_DISASSOC:
991 if(zd_CmdDisasoc((MacAddr_t *) zdparm->sta_addr, zdparm->u.mlme.reason_code) == FALSE)
992 WPADEBUG("Can't disassociate STA: %s\n", mac_addr);
993 else
994 WPADEBUG("Disassociate STA: %s with reason code: %d\n", mac_addr, zdparm->u.mlme.reason_code);
995 break;
996
997 default:
998 WPADEBUG("MLME command: 0x%04x not support\n", zdparm->u.mlme.cmd);
999 break;
1000 }
1001
1002
1003 break;
1004
1005 case ZD_CMD_SCAN_REQ:
1006 WPADEBUG("zd1205_wpa_ioctl: ZD_CMD_SCAN_REQ\n");
1007 break;
1008
1009 case ZD_CMD_SET_GENERIC_ELEMENT:
1010 WPADEBUG("zd1205_wpa_ioctl: ZD_CMD_SET_GENERIC_ELEMENT\n");
1011
1012 /* Copy the WPA IE */
1013 pSetting->WPAIeLen = zdparm->u.generic_elem.len;
1014 memcpy(&pSetting->WPAIe, zdparm->u.generic_elem.data, pSetting->WPAIeLen);
1015
1016 {
1017 int ii;
1018
1019 WPADEBUG("pSetting->WPAIeLen: %d\n", pSetting->WPAIeLen);
1020
1021 /* DUMP WPA IE */
1022 for(ii = 0; ii < pSetting->WPAIeLen;) {
1023 WPADEBUG("0x%02x ", pSetting->WPAIe[ii]);
1024
1025 if((++ii % 16) == 0)
1026 WPADEBUG("\n");
1027 }
1028 WPADEBUG("\n");
1029 }
1030 #if CODE4_AP
1031 #ifdef HOSTAPD_SUPPORT
1032 if (pSetting->BssType == AP_BSS)
1033 {// Update Beacon FIFO in the next TBTT.
1034 memcpy(&mWPAIe, pSetting->WPAIe, pSetting->WPAIeLen);
1035 WPADEBUG("Copy WPA IE into mWPAIe\n");
1036 }
1037 #endif
1038 #endif
1039
1040 break;
1041
1042 default:
1043 WPADEBUG("zd1205_wpa_ioctl: default\n");
1044 ret = -EINVAL;
1045 break;
1046 }
1047
1048 return ret;
1049 }
1050 int zd1205_cont_tx(struct zd1205_private *macp, u8 rate) {
1051
1052 void *reg = dot11Obj.reg;
1053 static u8 LastCont_TX_Rate=0;
1054 printk(KERN_ERR "ZDContinuousTx,Rate=%d\n",rate);
1055
1056 //if (le32_to_cpu(pZDRD->ZDRdLength) < sizeof(ZD_RD_STRUCT))
1057 //{
1058 // pZDRD->ZDRdLength = cpu_to_le32(sizeof(ZD_RD_STRUCT));
1059 // *BytesNeeded = sizeof(ZD_RD_STRUCT);
1060 // *BytesRead = 0;
1061 // Status = NDIS_STATUS_BUFFER_TOO_SHORT;
1062 // break;
1063 //}
1064
1065 //macp->bContinueTxMode = le32_to_cpu(pZDRD->Buffer[0]);
1066 //macp->bContinueTx = le32_to_cpu(pZDRD->Buffer[1]);
1067
1068 /* Use the Fixed Rate instead of LastSentTxRate */
1069 //macp->LastZDContinuousTxRate = macp->cardSetting.LastSentTxRate;
1070 //macp->LastZDContinuousTxRate = macp->cardSetting.FixedRate;
1071
1072 // Roger 2004-11-10 , Set for Dr.Wang request , set 0x0001c4 when CCK mode with AL2230
1073 if (dot11Obj.rfMode == AL2230_RF) {
1074 //if (macp->cardSetting.LastSentTxRate > 3) {
1075 if (LastCont_TX_Rate > 3) {
1076 HW_Set_IF_Synthesizer(&dot11Obj, 0x0005a4);
1077 }
1078 //else if (macp->cardSetting.LastSentTxRate <= 3) {
1079 else if (LastCont_TX_Rate <= 3) {
1080 HW_Set_IF_Synthesizer(&dot11Obj, 0x0001c4);
1081 }
1082 }
1083 LastCont_TX_Rate = rate;
1084
1085 if(rate <= RATE_54M) { // Start
1086 u8 tmpChr = 0;
1087 u32 RateTmp= 0;
1088 u32 tmpvalue;
1089 u32 nLoop;
1090 LockPhyReg(&dot11Obj);
1091 dot11Obj.SetReg(reg, ZD1205_CR2, 0x3F);
1092 dot11Obj.SetReg(reg, ZD1205_CR138, 0x28);
1093 dot11Obj.SetReg(reg, ZD1205_CR33, 0x20);
1094 // Query CR60 until change to 0x04
1095 nLoop = 200;
1096 while(nLoop--)
1097 {
1098 dot11Obj.DelayUs(10*1000); // sleep 10ms
1099 if(dot11Obj.bDeviceInSleep)
1100 {
1101 printk("In SLLLLLLLLLLLLLLLLLLP @ %s\n", __FUNCTION__);
1102 return FALSE;
1103 }
1104 tmpvalue = dot11Obj.GetReg(reg, ZD1205_CR60);
1105
1106 if(tmpvalue == 0x04)
1107 break;
1108 }
1109 if(nLoop == 0)
1110 {
1111 printk("\nLoop countdown to Zero. But it still fails\n");
1112 }
1113
1114 UnLockPhyReg(&dot11Obj);
1115
1116 printk(KERN_DEBUG "Start ContTx_Normal\n");
1117
1118 dot11Obj.bContinueTx = 1;
1119 LockPhyReg(&dot11Obj);
1120 /* In order to avoid the uninitial length problem,
1121 force to set length to 0x20.
1122 */
1123 dot11Obj.SetReg(reg, ZD1205_CR134, 0x20);
1124 UnLockPhyReg(&dot11Obj);
1125
1126 switch (rate){
1127 case RATE_6M: //6M
1128 RateTmp = 0xB;
1129 break;
1130 case RATE_9M: //9M
1131 RateTmp = 0xF;
1132 break;
1133 case RATE_12M: //12M
1134 RateTmp = 0xA;
1135 break;
1136 case RATE_18M: //18M
1137 RateTmp = 0xE;
1138 break;
1139 case RATE_24M: //24M
1140 RateTmp = 0x9;
1141 break;
1142 case RATE_36M: //36M
1143 RateTmp = 0xD;
1144 break;
1145
1146 case RATE_48M: //48M
1147 RateTmp = 0x8;
1148 break;
1149
1150 case RATE_54M: //54M
1151 RateTmp = 0xC;
1152 break;
1153
1154 default:
1155 RateTmp = 0;
1156 break;
1157 }
1158
1159 printk(KERN_DEBUG "RateTmp=0x%08x\n", RateTmp);
1160
1161 if (RateTmp){
1162 LockPhyReg(&dot11Obj);
1163 dot11Obj.SetReg(reg, ZD1205_CR132, RateTmp);
1164
1165 //AcquireCtrOfPhyReg(Adapter);
1166 if(dot11Obj.bDeviceInSleep)
1167 {
1168 printk("In SLLLLLLLLLLLLLLLLLLP @ %s\n", __FUNCTION__);
1169 return FALSE;
1170 }
1171
1172 tmpvalue = dot11Obj.GetReg(reg, ZD1205_CR159);
1173 tmpvalue &= ~(BIT_0 + BIT_1 );
1174 tmpvalue |= BIT_2;
1175 dot11Obj.SetReg(reg, ZD1205_CR159, tmpvalue);
1176
1177
1178 dot11Obj.SetReg(reg, 0x644, 7);
1179 if(dot11Obj.bDeviceInSleep)
1180 {
1181 printk("In SLLLLLLLLLLLLLLLLLLP @ %s\n", __FUNCTION__);
1182 return FALSE;
1183 }
1184 tmpvalue = dot11Obj.GetReg(reg, 0x648);
1185 tmpvalue &= ~BIT_0;
1186 dot11Obj.SetReg(reg, 0x648, tmpvalue);
1187 UnLockPhyReg(&dot11Obj);
1188
1189 }
1190
1191 tmpChr = LastCont_TX_Rate;
1192 printk(KERN_DEBUG "tmpChr=0x%x\n", tmpChr);
1193
1194 #if 0
1195 if (macp->preambleMode == 1)
1196 macp->cardSetting.PreambleType = 0x00;
1197 else if (macp->preambleMode == 2)
1198 macp->cardSetting.PreambleType = 0x20;
1199 #endif
1200
1201 if (macp->cardSetting.PreambleType == SHORT_PREAMBLE){
1202 // short premable
1203 tmpChr |= BIT_5;
1204 }
1205 else{
1206 // long premable
1207 tmpChr &= ~BIT_5;
1208 }
1209
1210 if (macp->RegionCode == 0x10)
1211 tmpChr &= ~BIT_6; //USA
1212 if (macp->RegionCode == 0x40)
1213 tmpChr |= BIT_6; //japan
1214
1215 LockPhyReg(&dot11Obj);
1216 dot11Obj.SetReg(reg, ZD1205_CR5, tmpChr);
1217 dot11Obj.SetReg(reg, 0x644, 3);
1218 UnLockPhyReg(&dot11Obj);
1219 }
1220 else {
1221 u32 tmpvalue;
1222
1223 // Roger 2004-11-10 , Set for Dr.Wang request , set 0x0001c4 when CCK mode with AL2230
1224 if (dot11Obj.rfMode == AL2230_RF) {
1225 HW_Set_IF_Synthesizer(&dot11Obj, 0x0005a4);
1226 }
1227
1228 LockPhyReg(&dot11Obj);
1229 dot11Obj.SetReg(reg, ZD1205_CR2, 0x26);
1230 dot11Obj.SetReg(reg, ZD1205_CR138, 0xA8);
1231 dot11Obj.SetReg(reg, ZD1205_CR33, 0x08);
1232 UnLockPhyReg(&dot11Obj);
1233 printk(KERN_DEBUG "Stop Normal Continuous Transmit\n");
1234
1235 dot11Obj.bContinueTx = 0;
1236 LockPhyReg(&dot11Obj);
1237 macp->PHYTestTimer = 30;
1238 // ZD1205_WRITE_REGISTER(Adapter,CR122, 0x0);
1239 UnLockPhyReg(&dot11Obj);
1240
1241 if (LastCont_TX_Rate >= 4){
1242 LockPhyReg(&dot11Obj);
1243 tmpvalue = dot11Obj.GetReg(reg, ZD1205_CR159);
1244 tmpvalue &= ~(BIT_0 + BIT_1 + BIT_2 );
1245 dot11Obj.SetReg(reg, ZD1205_CR159, tmpvalue);
1246
1247 dot11Obj.SetReg(reg, 0x644, 0);
1248
1249 tmpvalue = dot11Obj.GetReg(reg, 0x648);
1250 tmpvalue |= BIT_0;
1251 dot11Obj.SetReg(reg, 0x648, tmpvalue);
1252 UnLockPhyReg(&dot11Obj);
1253
1254 }
1255 else{
1256 LockPhyReg(&dot11Obj);
1257 dot11Obj.SetReg(reg, 0x644, 0);
1258
1259 tmpvalue = dot11Obj.GetReg(reg, 0x648);
1260 tmpvalue |= BIT_0;
1261 dot11Obj.SetReg(reg, 0x648, tmpvalue);
1262 UnLockPhyReg(&dot11Obj);
1263 }
1264
1265 //dot11Obj.SetReg(reg, ZD_PS_Ctrl, 0x1);
1266 //Roger 2004-11-16 SoftwareReset here to solve RX fail after TxContinue problem
1267 {
1268 //zd1205_device_reset(macp);
1269 //Card resetting , copying from driver of ZyNOS
1270 //It's a little different from ours
1271 u32 tmp_value;
1272 /* Update the value of Beacon Interval and Pre TBTT */
1273 update_beacon_interval(macp, 0x2);
1274 zd_writel(0x01, Pre_TBTT);
1275
1276 LockPhyReg(&dot11Obj);
1277 dot11Obj.SetReg(dot11Obj.reg, ZD1205_PHY_END, 0x8);
1278 tmp_value = zd_readl(PS_Ctrl);
1279 zd_writel(tmp_value | BIT_5, PS_Ctrl);
1280 dot11Obj.SetReg(dot11Obj.reg, ZD1205_PHY_END, 0x0);
1281 UnLockPhyReg(&dot11Obj);
1282
1283 dot11Obj.bDeviceInSleep = 1;
1284 dot11Obj.DelayUs(5000);
1285 }
1286 }
1287
1288 return 0;
1289 }
1290
1291 #endif
1292
MOXA 2.6.9 from sdlinux-moxaart.tgz