| blob | 3f1cf264a2c4a6b586d166f9f72e4cf85618b0e3 |
1 /*\r
2 ***************************************************************************\r
3 * Ralink Tech Inc.\r
4 * 4F, No. 2 Technology 5th Rd.\r
5 * Science-based Industrial Park\r
6 * Hsin-chu, Taiwan, R.O.C.\r
7 *\r
8 * (c) Copyright 2002, Ralink Technology, Inc.\r
9 *\r
10 * All rights reserved. Ralink's source code is an unpublished work and the\r
11 * use of a copyright notice does not imply otherwise. This source code\r
12 * contains confidential trade secret material of Ralink Tech. Any attemp\r
13 * or participation in deciphering, decoding, reverse engineering or in any\r
14 * way altering the source code is stricitly prohibited, unless the prior\r
15 * written consent of Ralink Technology, Inc. is obtained.\r
16 ***************************************************************************\r
17 \r
18 Module Name:\r
19 rtmp_init.c\r
20 \r
21 Abstract:\r
22 Miniport generic portion header file\r
23 \r
24 Revision History:\r
25 Who When What\r
26 -------- ---------- ----------------------------------------------\r
27 Paul Lin 08-01-2002 created\r
28 \r
29 */\r
30 #include "rt_config.h"\r
31 \r
32 //\r
33 // BBP register initialization set\r
34 //\r
35 ULONG BBPRegTable[] = {\r
36 0x00018302, // R03\r
37 0x00018419, // R04\r
38 0x00018E1C, // R14\r
39 0x00018F30, // R15\r
40 0x000190ac, // R16\r
41 0x00019148, // R17\r
42 0x00019218, // R18\r
43 0x000193ff, // R19\r
44 0x0001941E, // R20\r
45 0x00019508, // R21\r
46 0x00019608, // R22\r
47 0x00019708, // R23\r
48 0x00019870, // R24\r
49 0x00019940, // R25\r
50 0x00019A08, // R26\r
51 0x00019B23, // R27\r
52 0x00019E10, // R30\r
53 0x00019F2B, // R31\r
54 0x0001A0B9, // R32\r
55 0x0001A212, // R34\r
56 0x0001A350, // R35\r
57 0x0001A7c4, // R39\r
58 0x0001A802, // R40\r
59 0x0001A960, // R41\r
60 0x0001B510, // R53\r
61 0x0001B618, // R54\r
62 0x0001B808, // R56\r
63 0x0001B910, // R57\r
64 0x0001BA08, // R58\r
65 0x0001BD6d, // R61\r
66 0x0001BE10, // R62\r
67 };\r
68 \r
69 //\r
70 // MAC register initialization sets\r
71 //\r
72 RTMP_REG_PAIR MACRegTable[] = {\r
73 {PSCSR0, 0x00020002}, // 0xc8\r
74 {PSCSR1, 0x00000002}, // 0xcc\r
75 // {PSCSR2, 0x00023f20}, // 0xd0\r
76 {PSCSR2, 0x00020002}, // 0xd0\r
77 {PSCSR3, 0x00000002}, // 0xd4\r
78 {TIMECSR, 0x00003f21}, // 0xDC, to slower down our 1-us tick\r
79 {CSR9, 0x00000780}, // 0x24\r
80 {CSR11, 0x07041483}, // 0x2C, lrc=7, src=4, slot=20us, CWmax=2^8, CWmax=2^3\r
81 {CSR18, 0x00140000}, // SIFS=10us - TR switch time, PIFS=SIFS+20us\r
82 {CSR19, 0x016C0028}, // DIFS=SIFS+2*20us, EIFS=364us\r
83 {CNT3, 0x00000000}, // Backoff_CCA_Th, RX_&_TX_CCA_Th\r
84 \r
85 {TXCSR1, 0x07614562}, // 0x64, ACK as 1Mb time\r
86 {TXCSR8, 0x8c8d8b8a}, // 0x98, CCK TX BBP register ID\r
87 //{TXCSR9, 0x86870885}, // 0x94, OFDM TX BBP register ID\r
88 \r
89 {ARCSR1, 0x0000000f}, // 0x9c, Basic rate set bitmap\r
90 {PLCP1MCSR, 0x00700400}, // 0x13c, ACK/CTS PLCP at 1 Mbps\r
91 {PLCP2MCSR, 0x00380401}, // 0x140, ACK/CTS PLCP at 2 Mbps\r
92 {PLCP5MCSR, 0x00150402}, // 0x144, ACK/CTS PLCP at 5.5 Mbps\r
93 {PLCP11MCSR,0x000b8403}, // 0x148, ACK/CTS PLCP at 11 Mbps\r
94 \r
95 {ARTCSR0, 0x7038140a}, // 0x14c, ACK/CTS payload consumed time for 1/2/5.5/11 mbps\r
96 {ARTCSR1, 0x1d21252d}, // 0x150, alexsu : OFDM ACK/CTS payload consumed time for 18/12/9/6 mbps\r
97 {ARTCSR2, 0x1919191d}, // 0x154, alexsu : OFDM ACK/CTS payload consumed time for 54/48/36/24 mbps\r
98 \r
99 {RXCSR0, 0xffffffff}, // 0x80\r
100 {RXCSR3, 0xb3aab3af}, // 0x90. RT2530 BBP 51:RSSI, R42:OFDM rate, R47:CCK SIGNAL\r
101 {PCICSR, 0x000003b8}, // 0x8c, alexsu : PCI control register\r
102 {PWRCSR0, 0x3f3b3100}, // 0xC4\r
103 {GPIOCSR, 0x0000ff00}, // 0x120, GPIO default value\r
104 {TESTCSR, 0x000000f0}, // 0x138, Test CSR, make sure it's running at normal mode\r
105 {PWRCSR1, 0x000001ff}, // 0xd8\r
106 {MACCSR0, 0x00213223}, // 0xE0, Enable Tx dribble mode - 2003/10/22:Gary\r
107 {MACCSR1, 0x00235518}, // 0xE4, Disable Rx Reset, tx dribble count, 2x30x16 = 960n,\r
108 {MACCSR2, 0x00000040}, // 0x0134, 64*33ns = 2us\r
109 {RALINKCSR, 0x9a009a11}, // 0xE8\r
110 {CSR7, 0xffffffff}, // 0x1C, Clear all pending interrupt source\r
111 {LEDCSR, 0x00001E46}, // default both LEDs off\r
112 {BBPCSR1, 0x82188200}, // for 2560+2522\r
113 {TXACKCSR0, 0x00000020}, // 0x110, TX ACK timeout in usec\r
114 {SECCSR3, 0x0000e78f}, // AES, mask off more data bit for MIC calculation\r
115 };\r
116 \r
117 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(ULONG))\r
118 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))\r
119 \r
120 /*\r
121 ========================================================================\r
122 \r
123 Routine Description:\r
124 Allocate all DMA releated resources\r
125 \r
126 Arguments:\r
127 Adapter Pointer to our adapter\r
128 \r
129 Return Value:\r
130 None\r
131 \r
132 Note:\r
133 \r
134 ========================================================================\r
135 */\r
136 NDIS_STATUS RTMPAllocDMAMemory(\r
137 IN PRTMP_ADAPTER pAd)\r
138 {\r
139 INT index;\r
140 VOID *ring; // VA of ring descriptor\r
141 VOID *ring_data; // VA of DMA data buffer\r
142 dma_addr_t ring_dma; // PA of ring descriptor\r
143 dma_addr_t ring_data_dma; // PA of DMA data buffer\r
144 PTXD_STRUC pTxD; // Tx type ring descriptor\r
145 PRXD_STRUC pRxD; // Rx type ring descriptor\r
146 \r
147 DBGPRINT(RT_DEBUG_INFO, "--> RTMPAllocDMAMemory\n");\r
148 \r
149 // 1. Allocate Tx Ring DMA descriptor and buffer memory\r
150 // Allocate Ring descriptors DMA block\r
151 ring = pci_alloc_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);\r
152 if (!ring) {\r
153 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");\r
154 goto err_out_allocate_txring;\r
155 }\r
156 \r
157 // Zero init ring descriptors\r
158 memset(ring, 0, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE));\r
159 \r
160 // Allocate Ring data DMA blocks\r
161 ring_data = pci_alloc_consistent(pAd->pPci_Dev, (TX_RING_SIZE * TX_BUFFER_SIZE), &ring_data_dma);\r
162 \r
163 // If failed, release ring descriptors DMA block & exit\r
164 if (!ring_data) {\r
165 pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);\r
166 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");\r
167 goto err_out_allocate_txring;\r
168 }\r
169 \r
170 // Start with Tx ring & DMA buffer\r
171 for (index = 0; index < TX_RING_SIZE; index++)\r
172 {\r
173 // Init Tx Ring Size, Va, Pa variables\r
174 pAd->TxRing[index].size = RING_DESCRIPTOR_SIZE;\r
175 pAd->TxRing[index].va_addr = ring;\r
176 pAd->TxRing[index].pa_addr = ring_dma;\r
177 ring += RING_DESCRIPTOR_SIZE;\r
178 ring_dma += RING_DESCRIPTOR_SIZE;\r
179 \r
180 // Init Tx DMA buffer\r
181 pAd->TxRing[index].data_size = TX_BUFFER_SIZE;\r
182 pAd->TxRing[index].va_data_addr = ring_data;\r
183 pAd->TxRing[index].pa_data_addr = ring_data_dma;\r
184 ring_data += TX_BUFFER_SIZE;\r
185 ring_data_dma += TX_BUFFER_SIZE;\r
186 \r
187 // Write TxD buffer address & allocated buffer length\r
188 pTxD = (PTXD_STRUC) pAd->TxRing[index].va_addr;\r
189 #ifndef BIG_ENDIAN\r
190 pTxD->BufferAddressPa = pAd->TxRing[index].pa_data_addr;\r
191 #else\r
192 pTxD->BufferAddressPa = SWAP32(pAd->TxRing[index].pa_data_addr);\r
193 #endif\r
194 \r
195 DBGPRINT(RT_DEBUG_INFO, "TxRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",\r
196 index, (UINT)pAd->TxRing[index].va_addr, (UINT)pAd->TxRing[index].pa_addr, pAd->TxRing[index].size);\r
197 DBGPRINT(RT_DEBUG_INFO, "TxRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",\r
198 index, (UINT)pAd->TxRing[index].va_data_addr, (UINT)pAd->TxRing[index].pa_data_addr, pAd->TxRing[index].data_size);\r
199 }\r
200 \r
201 // 2. Allocate Prio Ring DMA descriptor and buffer memory\r
202 // Allocate Ring descriptors DMA block\r
203 ring = pci_alloc_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);\r
204 if (!ring) {\r
205 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");\r
206 goto err_out_allocate_prioring;\r
207 }\r
208 \r
209 // Zero init ring descriptors\r
210 memset(ring, 0, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE));\r
211 \r
212 // Allocate Ring data DMA blocks\r
213 ring_data = pci_alloc_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE), &ring_data_dma);\r
214 \r
215 // If failed, release ring descriptors DMA block & exit\r
216 if (!ring_data) {\r
217 pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);\r
218 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");\r
219 goto err_out_allocate_prioring;\r
220 }\r
221 \r
222 // Second with Prio ring & DMA buffer\r
223 for (index = 0; index < PRIO_RING_SIZE; index++)\r
224 {\r
225 // Init Prio Ring Size, Va, Pa variables\r
226 pAd->PrioRing[index].size = RING_DESCRIPTOR_SIZE;\r
227 pAd->PrioRing[index].va_addr = ring;\r
228 pAd->PrioRing[index].pa_addr = ring_dma;\r
229 ring += RING_DESCRIPTOR_SIZE;\r
230 ring_dma += RING_DESCRIPTOR_SIZE;\r
231 \r
232 // Init Prio DMA buffer\r
233 pAd->PrioRing[index].data_size = PRIO_BUFFER_SIZE;\r
234 pAd->PrioRing[index].va_data_addr = ring_data;\r
235 pAd->PrioRing[index].pa_data_addr = ring_data_dma;\r
236 ring_data += PRIO_BUFFER_SIZE;\r
237 ring_data_dma += PRIO_BUFFER_SIZE;\r
238 \r
239 // Write TxD buffer address & allocated buffer length for priority ring\r
240 pTxD = (PTXD_STRUC) pAd->PrioRing[index].va_addr;\r
241 #ifndef BIG_ENDIAN\r
242 pTxD->BufferAddressPa = pAd->PrioRing[index].pa_data_addr;\r
243 #else\r
244 pTxD->BufferAddressPa = SWAP32(pAd->PrioRing[index].pa_data_addr); // Scott: to LE\r
245 #endif\r
246 \r
247 DBGPRINT(RT_DEBUG_INFO, "PrioRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",\r
248 index, (UINT)pAd->PrioRing[index].va_addr, (UINT)pAd->PrioRing[index].pa_addr, pAd->PrioRing[index].size);\r
249 DBGPRINT(RT_DEBUG_INFO, "PrioRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",\r
250 index, (UINT)pAd->PrioRing[index].va_data_addr, (UINT)pAd->PrioRing[index].pa_data_addr, pAd->PrioRing[index].data_size);\r
251 }\r
252 \r
253 // 3. Allocate Atim Ring DMA descriptor and buffer memory\r
254 // Allocate Ring descriptors DMA block\r
255 ring = pci_alloc_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);\r
256 if (!ring) {\r
257 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");\r
258 goto err_out_allocate_atimring;\r
259 }\r
260 \r
261 // Zero init ring descriptors\r
262 memset(ring, 0, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE));\r
263 \r
264 // Allocate Ring data DMA blocks\r
265 ring_data = pci_alloc_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE), &ring_data_dma);\r
266 \r
267 // If failed, release ring descriptors DMA block & exit\r
268 if (!ring_data) {\r
269 pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);\r
270 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");\r
271 goto err_out_allocate_atimring;\r
272 }\r
273 \r
274 // Atim ring & DMA buffer\r
275 for (index = 0; index < ATIM_RING_SIZE; index++)\r
276 {\r
277 // Init Atim Ring Size, Va, Pa variables\r
278 pAd->AtimRing[index].size = RING_DESCRIPTOR_SIZE;\r
279 pAd->AtimRing[index].va_addr = ring;\r
280 pAd->AtimRing[index].pa_addr = ring_dma;\r
281 ring += RING_DESCRIPTOR_SIZE;\r
282 ring_dma += RING_DESCRIPTOR_SIZE;\r
283 \r
284 // Init Atim DMA buffer\r
285 pAd->AtimRing[index].data_size = ATIM_BUFFER_SIZE;\r
286 pAd->AtimRing[index].va_data_addr = ring_data;\r
287 pAd->AtimRing[index].pa_data_addr = ring_data_dma;\r
288 ring_data += ATIM_BUFFER_SIZE;\r
289 ring_data_dma += ATIM_BUFFER_SIZE;\r
290 \r
291 // Write TxD buffer address & allocated buffer length\r
292 pTxD = (PTXD_STRUC) pAd->AtimRing[index].va_addr;\r
293 #ifndef BIG_ENDIAN\r
294 pTxD->BufferAddressPa = pAd->AtimRing[index].pa_data_addr;\r
295 #else\r
296 pTxD->BufferAddressPa = SWAP32(pAd->AtimRing[index].pa_data_addr); // Scott: to LE\r
297 #endif\r
298 \r
299 DBGPRINT(RT_DEBUG_INFO, "AtimRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",\r
300 index, (UINT)pAd->AtimRing[index].va_addr, (UINT)pAd->AtimRing[index].pa_addr, pAd->AtimRing[index].size);\r
301 DBGPRINT(RT_DEBUG_INFO, "AtimRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",\r
302 index, (UINT)pAd->AtimRing[index].va_data_addr, (UINT)pAd->AtimRing[index].pa_data_addr, pAd->AtimRing[index].data_size);\r
303 }\r
304 \r
305 // 4. Allocate Rx Ring DMA descriptor and buffer memory\r
306 // Allocate Ring descriptors DMA block\r
307 ring = pci_alloc_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);\r
308 if (!ring) {\r
309 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");\r
310 goto err_out_allocate_rxring;\r
311 }\r
312 \r
313 // Zero init ring descriptors\r
314 memset(ring, 0, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE));\r
315 \r
316 // Allocate Ring data DMA blocks\r
317 ring_data = pci_alloc_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RX_BUFFER_SIZE), &ring_data_dma);\r
318 \r
319 // If failed, release ring descriptors DMA block & exit\r
320 if (!ring_data) {\r
321 pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);\r
322 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");\r
323 goto err_out_allocate_rxring;\r
324 }\r
325 \r
326 // Rx ring & DMA buffer\r
327 for (index = 0; index < RX_RING_SIZE; index++)\r
328 {\r
329 // Init Rx Ring Size, Va, Pa variables\r
330 pAd->RxRing[index].size = RING_DESCRIPTOR_SIZE;\r
331 pAd->RxRing[index].va_addr = ring;\r
332 pAd->RxRing[index].pa_addr = ring_dma;\r
333 ring += RING_DESCRIPTOR_SIZE;\r
334 ring_dma += RING_DESCRIPTOR_SIZE;\r
335 \r
336 // Init Rx DMA buffer\r
337 pAd->RxRing[index].data_size = RX_BUFFER_SIZE;\r
338 pAd->RxRing[index].va_data_addr = ring_data;\r
339 pAd->RxRing[index].pa_data_addr = ring_data_dma;\r
340 ring_data += RX_BUFFER_SIZE;\r
341 ring_data_dma += RX_BUFFER_SIZE;\r
342 \r
343 // Write RxD buffer address & allocated buffer length\r
344 pRxD = (PRXD_STRUC) pAd->RxRing[index].va_addr;\r
345 #ifndef BIG_ENDIAN\r
346 pRxD->BufferAddressPa = pAd->RxRing[index].pa_data_addr;\r
347 #else\r
348 pRxD->BufferAddressPa = SWAP32(pAd->RxRing[index].pa_data_addr); // Scott: to LE\r
349 #endif\r
350 // Rx owner bit assign to NIC immediately\r
351 pRxD->Owner = DESC_OWN_NIC;\r
352 \r
353 #ifdef BIG_ENDIAN\r
354 RTMPDescriptorEndianChange((PUCHAR)pRxD, TYPE_RXD); // Scott: to LE\r
355 #endif\r
356 \r
357 DBGPRINT(RT_DEBUG_INFO, "RxRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",\r
358 index, (UINT)pAd->RxRing[index].va_addr, (UINT)pAd->RxRing[index].pa_addr, pAd->RxRing[index].size);\r
359 DBGPRINT(RT_DEBUG_INFO, "RxRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",\r
360 index, (UINT)pAd->RxRing[index].va_data_addr, (UINT)pAd->RxRing[index].pa_data_addr, pAd->RxRing[index].data_size);\r
361 }\r
362 \r
363 // 5. Allocate Beacon Ring DMA descriptor and buffer memory\r
364 // Init Beacon Ring Size, Va, Pa variables\r
365 ring = pci_alloc_consistent(pAd->pPci_Dev, RING_DESCRIPTOR_SIZE, &ring_dma);\r
366 if (!ring) {\r
367 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");\r
368 goto err_out_allocate_beaconring;\r
369 }\r
370 \r
371 // Zero init ring descriptors\r
372 memset(ring, 0, (RING_DESCRIPTOR_SIZE));\r
373 \r
374 // Allocate Ring data DMA blocks\r
375 ring_data = pci_alloc_consistent(pAd->pPci_Dev, BEACON_BUFFER_SIZE, &ring_data_dma);\r
376 \r
377 // If failed, release ring descriptors DMA block & exit\r
378 if (!ring_data) {\r
379 pci_free_consistent(pAd->pPci_Dev, RING_DESCRIPTOR_SIZE, ring, ring_dma);\r
380 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");\r
381 goto err_out_allocate_beaconring;\r
382 }\r
383 \r
384 pAd->BeaconRing.size = RING_DESCRIPTOR_SIZE;\r
385 pAd->BeaconRing.va_addr = ring;\r
386 pAd->BeaconRing.pa_addr = ring_dma;\r
387 \r
388 // Init Beacon DMA buffer\r
389 pAd->BeaconRing.data_size = BEACON_BUFFER_SIZE;\r
390 pAd->BeaconRing.va_data_addr = ring_data;\r
391 pAd->BeaconRing.pa_data_addr = ring_data_dma;\r
392 \r
393 // Write RxD buffer address & allocated buffer length\r
394 pTxD = (PTXD_STRUC) pAd->BeaconRing.va_addr;\r
395 #ifndef BIG_ENDIAN\r
396 pTxD->BufferAddressPa = pAd->BeaconRing.pa_data_addr;\r
397 #else\r
398 pTxD->BufferAddressPa = SWAP32(pAd->BeaconRing.pa_data_addr); // Scott: to LE\r
399 #endif\r
400 \r
401 DBGPRINT(RT_DEBUG_INFO, "BeaconRing va = 0x%x, pa = 0x%x, size = 0x%x\n",\r
402 (UINT)pAd->BeaconRing.va_addr, (UINT)pAd->BeaconRing.pa_addr, pAd->BeaconRing.size);\r
403 DBGPRINT(RT_DEBUG_INFO, "BeaconRing va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",\r
404 (UINT)pAd->BeaconRing.va_data_addr, (UINT)pAd->BeaconRing.pa_data_addr, pAd->BeaconRing.data_size);\r
405 \r
406 DBGPRINT(RT_DEBUG_INFO, "<-- RTMPAllocDMAMemory\n");\r
407 return NDIS_STATUS_SUCCESS;\r
408 \r
409 \r
410 err_out_allocate_beaconring:\r
411 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
412 pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RX_BUFFER_SIZE),\r
413 pAd->RxRing[0].va_data_addr, pAd->RxRing[0].pa_data_addr);\r
414 // Free ring descriptor second, the start address is the same as TxRing first elment\r
415 pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
416 pAd->RxRing[0].va_addr, pAd->RxRing[0].pa_addr);\r
417 err_out_allocate_rxring:\r
418 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
419 pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE),\r
420 pAd->AtimRing[0].va_data_addr, pAd->AtimRing[0].pa_data_addr);\r
421 // Free ring descriptor second, the start address is the same as TxRing first elment\r
422 pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
423 pAd->AtimRing[0].va_addr, pAd->AtimRing[0].pa_addr);\r
424 err_out_allocate_atimring:\r
425 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
426 pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE),\r
427 pAd->PrioRing[0].va_data_addr, pAd->PrioRing[0].pa_data_addr);\r
428 // Free ring descriptor second, the start address is the same as TxRing first elment\r
429 pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
430 pAd->PrioRing[0].va_addr, pAd->PrioRing[0].pa_addr);\r
431 err_out_allocate_prioring:\r
432 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
433 pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * TX_BUFFER_SIZE),\r
434 pAd->TxRing[0].va_data_addr, pAd->TxRing[0].pa_data_addr);\r
435 // Free ring descriptor second, the start address is the same as TxRing first elment\r
436 pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
437 pAd->TxRing[0].va_addr, pAd->TxRing[0].pa_addr);\r
438 err_out_allocate_txring:\r
439 DBGPRINT(RT_DEBUG_ERROR, "<-- RTMPAllocDMAMemory (memory not allocate successfully!)\n");\r
440 \r
441 return -ENOMEM;\r
442 }\r
443 \r
444 /*\r
445 ========================================================================\r
446 \r
447 Routine Description:\r
448 Free all DMA memory.\r
449 \r
450 Arguments:\r
451 Adapter Pointer to our adapter\r
452 \r
453 Return Value:\r
454 None\r
455 \r
456 Note:\r
457 \r
458 ========================================================================\r
459 */\r
460 VOID RTMPFreeDMAMemory(\r
461 IN PRTMP_ADAPTER pAd)\r
462 {\r
463 DBGPRINT(RT_DEBUG_INFO, "--> RTMPFreeDMAMemory\n");\r
464 \r
465 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
466 pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * TX_BUFFER_SIZE),\r
467 pAd->TxRing[0].va_data_addr, pAd->TxRing[0].pa_data_addr);\r
468 // Free ring descriptor second, the start address is the same as TxRing first elment\r
469 pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
470 pAd->TxRing[0].va_addr, pAd->TxRing[0].pa_addr);\r
471 \r
472 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
473 pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE),\r
474 pAd->PrioRing[0].va_data_addr, pAd->PrioRing[0].pa_data_addr);\r
475 // Free ring descriptor second, the start address is the same as TxRing first elment\r
476 pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
477 pAd->PrioRing[0].va_addr, pAd->PrioRing[0].pa_addr);\r
478 \r
479 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
480 pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE),\r
481 pAd->AtimRing[0].va_data_addr, pAd->AtimRing[0].pa_data_addr);\r
482 // Free ring descriptor second, the start address is the same as TxRing first elment\r
483 pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
484 pAd->AtimRing[0].va_addr, pAd->AtimRing[0].pa_addr);\r
485 \r
486 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
487 pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RX_BUFFER_SIZE),\r
488 pAd->RxRing[0].va_data_addr, pAd->RxRing[0].pa_data_addr);\r
489 // Free ring descriptor second, the start address is the same as TxRing first elment\r
490 pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
491 pAd->RxRing[0].va_addr, pAd->RxRing[0].pa_addr);\r
492 \r
493 // Free data DMA blocks first, the start address is the same as TxRing first DMA data block\r
494 pci_free_consistent(pAd->pPci_Dev, (BEACON_RING_SIZE * BEACON_BUFFER_SIZE),\r
495 pAd->BeaconRing.va_data_addr, pAd->BeaconRing.pa_data_addr);\r
496 // Free ring descriptor second, the start address is the same as TxRing first elment\r
497 pci_free_consistent(pAd->pPci_Dev, (BEACON_RING_SIZE * RING_DESCRIPTOR_SIZE),\r
498 pAd->BeaconRing.va_addr, pAd->BeaconRing.pa_addr);\r
499 \r
500 }\r
501 \r
502 /*\r
503 ========================================================================\r
504 \r
505 Routine Description:\r
506 Initialize transmit data structures\r
507 \r
508 Arguments:\r
509 Adapter Pointer to our adapter\r
510 \r
511 Return Value:\r
512 None\r
513 \r
514 Note:\r
515 Initialize all transmit releated private buffer, include those define\r
516 in RTMP_ADAPTER structure and all private data structures.\r
517 \r
518 ========================================================================\r
519 */\r
520 VOID NICInitTransmit(\r
521 IN PRTMP_ADAPTER pAdapter)\r
522 {\r
523 DBGPRINT(RT_DEBUG_TRACE, "--> NICInitTransmit\n");\r
524 \r
525 // Initialize all Transmit releated queues\r
526 InitializeQueueHeader(&pAdapter->TxSwQueue0);\r
527 InitializeQueueHeader(&pAdapter->TxSwQueue1);\r
528 InitializeQueueHeader(&pAdapter->TxSwQueue2);\r
529 InitializeQueueHeader(&pAdapter->TxSwQueue3);\r
530 \r
531 // Init Ring index pointer\r
532 pAdapter->CurRxIndex = 0;\r
533 pAdapter->CurDecryptIndex = 0;\r
534 pAdapter->CurTxIndex = 0;\r
535 pAdapter->CurEncryptIndex = 0;\r
536 pAdapter->CurAtimIndex = 0;\r
537 pAdapter->CurPrioIndex = 0;\r
538 pAdapter->NextEncryptDoneIndex = 0;\r
539 pAdapter->NextTxDoneIndex = 0;\r
540 pAdapter->NextAtimDoneIndex = 0;\r
541 pAdapter->NextPrioDoneIndex = 0;\r
542 pAdapter->NextDecryptDoneIndex = 0;\r
543 pAdapter->PushMgmtIndex = 0;\r
544 pAdapter->PopMgmtIndex = 0;\r
545 pAdapter->MgmtQueueSize = 0;\r
546 \r
547 pAdapter->PrivateInfo.TxRingFullCnt = 0;\r
548 \r
549 DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitTransmit\n");\r
550 }\r
551 \r
552 inline VOID NICDisableInterrupt(\r
553 IN PRTMP_ADAPTER pAd)\r
554 {\r
555 RTMP_IO_WRITE32(pAd, CSR8, 0xFFFF);\r
556 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE);\r
557 }\r
558 \r
559 inline VOID NICEnableInterrupt(\r
560 IN PRTMP_ADAPTER pAd)\r
561 {\r
562 // 0xFF37 : Txdone & Rxdone, 0xFF07: Txdonw, Rxdone, PrioDone, AtimDone,\r
563 RTMP_IO_WRITE32(pAd, CSR8, 0xFE14);\r
564 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE);\r
565 }\r
566 \r
567 /*\r
568 ========================================================================\r
569 \r
570 Routine Description:\r
571 Read additional information from EEPROM, such as MAC address\r
572 \r
573 Arguments:\r
574 Adapter Pointer to our adapter\r
575 \r
576 Return Value:\r
577 NDIS_STATUS_SUCCESS\r
578 NDIS_STATUS_FAILURE\r
579 \r
580 Note:\r
581 \r
582 ========================================================================\r
583 */\r
584 NDIS_STATUS NICReadAdapterInfo(\r
585 IN PRTMP_ADAPTER pAd)\r
586 {\r
587 CSR3_STRUC StaMacReg0;\r
588 CSR4_STRUC StaMacReg1;\r
589 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;\r
590 \r
591 //\r
592 // Read MAC address from CSR3 & CSR4, these CSRs reflects real value\r
593 // stored with EEPROM.\r
594 //\r
595 RTMP_IO_READ32(pAd, CSR3, &StaMacReg0.word);\r
596 RTMP_IO_READ32(pAd, CSR4, &StaMacReg1.word);\r
597 pAd->PermanentAddress[0] = StaMacReg0.field.Byte0;\r
598 pAd->PermanentAddress[1] = StaMacReg0.field.Byte1;\r
599 pAd->PermanentAddress[2] = StaMacReg0.field.Byte2;\r
600 pAd->PermanentAddress[3] = StaMacReg0.field.Byte3;\r
601 pAd->PermanentAddress[4] = StaMacReg1.field.Byte4;\r
602 pAd->PermanentAddress[5] = StaMacReg1.field.Byte5;\r
603 // Set Current address to permanet address.\r
604 // TODO: put current address check within registery read out\r
605 pAd->CurrentAddress[0] = pAd->PermanentAddress[0];\r
606 pAd->CurrentAddress[1] = pAd->PermanentAddress[1];\r
607 pAd->CurrentAddress[2] = pAd->PermanentAddress[2];\r
608 pAd->CurrentAddress[3] = pAd->PermanentAddress[3];\r
609 pAd->CurrentAddress[4] = pAd->PermanentAddress[4];\r
610 pAd->CurrentAddress[5] = pAd->PermanentAddress[5];\r
611 \r
612 return Status;\r
613 }\r
614 \r
615 /*\r
616 ========================================================================\r
617 \r
618 Routine Description:\r
619 Read initial parameters from EEPROM\r
620 \r
621 Arguments:\r
622 Adapter Pointer to our adapter\r
623 \r
624 Return Value:\r
625 None\r
626 \r
627 Note:\r
628 \r
629 ========================================================================\r
630 */\r
631 VOID NICReadEEPROMParameters(\r
632 IN PRTMP_ADAPTER pAdapter)\r
633 {\r
634 ULONG data;\r
635 USHORT i, value;\r
636 UCHAR TmpPhy;\r
637 EEPROM_TX_PWR_STRUC Power;\r
638 EEPROM_VERSION_STRUC Version;\r
639 EEPROM_ANTENNA_STRUC Antenna;\r
640 \r
641 DBGPRINT(RT_DEBUG_TRACE, "--> NICReadEEPROMParameters\n");\r
642 \r
643 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8\r
644 RTMP_IO_READ32(pAdapter, CSR21, &data);\r
645 \r
646 if(data & 0x20)\r
647 pAdapter->EEPROMAddressNum = 6;\r
648 else\r
649 pAdapter->EEPROMAddressNum = 8;\r
650 \r
651 // if E2PROM version mismatch with driver's expectation, then skip\r
652 // all subsequent E2RPOM retieval and set a system error bit to notify GUI\r
653 Version.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_VERSION_OFFSET);\r
654 if (Version.field.Version != VALID_EEPROM_VERSION)\r
655 {\r
656 DBGPRINT(RT_DEBUG_ERROR, "WRONG E2PROM VERSION %d, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION);\r
657 pAdapter->PortCfg.SystemErrorBitmap |= 0x00000001;\r
658 return;\r
659 }\r
660 \r
661 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAdapter\r
662 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)\r
663 {\r
664 value = RTMP_EEPROM_READ16(pAdapter, EEPROM_BBP_BASE_OFFSET + i*2);\r
665 \r
666 pAdapter->EEPROMDefaultValue[i] = value;\r
667 }\r
668 \r
669 #if 1\r
670 // We have to parse NIC configuration 0 at here.\r
671 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false\r
672 // Therefore, we have to read TxAutoAgc control beforehand.\r
673 // Read Tx AGC control bit\r
674 Antenna.word = pAdapter->EEPROMDefaultValue[0];\r
675 if (Antenna.field.DynamicTxAgcControl == 1)\r
676 pAdapter->PortCfg.bAutoTxAgc = TRUE;\r
677 else\r
678 pAdapter->PortCfg.bAutoTxAgc = FALSE;\r
679 \r
680 // Read Tx power value for all 14 channels\r
681 // Value from 1 - 0x7f. Default value is 24.\r
682 for (i = 0; i < NUM_EEPROM_TX_PARMS; i++)\r
683 {\r
684 Power.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_TX_PWR_OFFSET + i*2);\r
685 pAdapter->PortCfg.ChannelTxPower[i * 2] = ((Power.field.Byte0 > 32) ? 24 : Power.field.Byte0);\r
686 pAdapter->PortCfg.ChannelTxPower[i * 2 + 1] = ((Power.field.Byte1 > 32) ? 24 : Power.field.Byte1);\r
687 }\r
688 \r
689 // Read Tx TSSI reference value, OK to reuse Power data structure\r
690 for (i = 0; i < NUM_EEPROM_TX_PARMS; i++)\r
691 {\r
692 Power.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_TSSI_REF_OFFSET + i * 2);\r
693 pAdapter->PortCfg.ChannelTssiRef[i * 2] = Power.field.Byte0;\r
694 pAdapter->PortCfg.ChannelTssiRef[i * 2 + 1] = Power.field.Byte1;\r
695 // Disable TxAgc if the value is not right\r
696 if ((pAdapter->PortCfg.ChannelTssiRef[i * 2] == 0xff) ||\r
697 (pAdapter->PortCfg.ChannelTssiRef[i * 2 + 1] == 0xff))\r
698 pAdapter->PortCfg.bAutoTxAgc = FALSE;\r
699 }\r
700 \r
701 // Tx Tssi delta offset 0x24\r
702 Power.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_TSSI_DELTA_OFFSET);\r
703 pAdapter->PortCfg.ChannelTssiDelta = Power.field.Byte0;\r
704 \r
705 #endif\r
706 \r
707 //CountryRegion byte offset = 0x35\r
708 value = pAdapter->EEPROMDefaultValue[2] >> 8;\r
709 if ((value <= 7))\r
710 {\r
711 pAdapter->PortCfg.CountryRegion = (UCHAR) value;\r
712 TmpPhy = pAdapter->PortCfg.PhyMode;\r
713 pAdapter->PortCfg.PhyMode = 0xff;\r
714 RTMPSetPhyMode(pAdapter, TmpPhy);\r
715 }\r
716 DBGPRINT(RT_DEBUG_TRACE, "<-- NICReadEEPROMParameters\n");\r
717 }\r
718 \r
719 /*\r
720 ========================================================================\r
721 \r
722 Routine Description:\r
723 Set default value from EEPROM\r
724 \r
725 Arguments:\r
726 Adapter Pointer to our adapter\r
727 \r
728 Return Value:\r
729 None\r
730 \r
731 Note:\r
732 \r
733 ========================================================================\r
734 */\r
735 VOID NICInitAsicFromEEPROM(\r
736 IN PRTMP_ADAPTER pAdapter)\r
737 {\r
738 ULONG data, BbpCsr1;\r
739 USHORT i, value;\r
740 UCHAR TxValue,RxValue;\r
741 EEPROM_ANTENNA_STRUC Antenna;\r
742 EEPROM_NIC_CONFIG2_STRUC NicConfig2;\r
743 \r
744 DBGPRINT(RT_DEBUG_TRACE, "--> NICInitAsicFromEEPROM\n");\r
745 \r
746 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)\r
747 {\r
748 value = pAdapter->EEPROMDefaultValue[i];\r
749 \r
750 if((value != 0xFFFF) && (value != 0))\r
751 {\r
752 data = value | 0x18000;\r
753 RTMP_BBP_IO_WRITE32(pAdapter, data);\r
754 }\r
755 }\r
756 \r
757 Antenna.word = pAdapter->EEPROMDefaultValue[0];\r
758 \r
759 if ((Antenna.word == 0xFFFF) || (Antenna.field.TxDefaultAntenna > 2) || (Antenna.field.RxDefaultAntenna > 2))\r
760 {\r
761 DBGPRINT(RT_DEBUG_TRACE, "E2PROM error(=0x%04x), hard code as 0x0002\n", Antenna.word);\r
762 Antenna.word = 0x0002;\r
763 }\r
764 \r
765 pAdapter->PortCfg.NumberOfAntenna = 2; // (UCHAR)Antenna.field.NumOfAntenna;\r
766 pAdapter->PortCfg.CurrentTxAntenna = (UCHAR)Antenna.field.TxDefaultAntenna;\r
767 pAdapter->PortCfg.CurrentRxAntenna = (UCHAR)Antenna.field.RxDefaultAntenna;\r
768 pAdapter->PortCfg.RfType = (UCHAR) Antenna.field.RfType;\r
769 \r
770 RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, BBP_Tx_Configure, &TxValue);\r
771 RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, BBP_Rx_Configure, &RxValue);\r
772 RTMP_IO_READ32(pAdapter, BBPCSR1, &BbpCsr1);\r
773 \r
774 // Tx antenna select\r
775 if(Antenna.field.TxDefaultAntenna == 1) // Antenna A\r
776 {\r
777 TxValue = (TxValue & 0xFC) | 0x00;\r
778 BbpCsr1 = (BbpCsr1 & 0xFFFCFFFC) | 0x00000000;\r
779 }\r
780 else if(Antenna.field.TxDefaultAntenna == 2) // Antenna B\r
781 {\r
782 TxValue = (TxValue & 0xFC) | 0x02;\r
783 BbpCsr1 = (BbpCsr1 & 0xFFFCFFFC) | 0x00020002;\r
784 }\r
785 else // diverity - start from Antenna B\r
786 {\r
787 TxValue = (TxValue & 0xFC) | 0x02;\r
788 BbpCsr1 = (BbpCsr1 & 0xFFFCFFFC) | 0x00020002;\r
789 }\r
790 \r
791 // Rx antenna select\r
792 if(Antenna.field.RxDefaultAntenna == 1) // Antenna A\r
793 RxValue = (RxValue & 0xFC) | 0x00;\r
794 else if(Antenna.field.RxDefaultAntenna == 2) // Antenna B\r
795 RxValue = (RxValue & 0xFC) | 0x02;\r
796 else // Antenna Diversity\r
797 RxValue = (RxValue & 0xFC) | 0x02;\r
798 \r
799 // RT5222 needs special treatment to swap TX I/Q\r
800 if (pAdapter->PortCfg.RfType == RFIC_5222)\r
801 {\r
802 BbpCsr1 |= 0x00040004;\r
803 TxValue |= 0x04; // TX I/Q flip\r
804 }\r
805 // RT2525E need to flip TX I/Q but not RX I/Q\r
806 else if (pAdapter->PortCfg.RfType == RFIC_2525E)\r
807 {\r
808 BbpCsr1 |= 0x00040004;\r
809 TxValue |= 0x04; // TX I/Q flip\r
810 RxValue &= 0xfb; // RX I/Q no flip\r
811 }\r
812 \r
813 // Change to match microsoft definition, 0xff: diversity, 0: A, 1: B\r
814 pAdapter->PortCfg.CurrentTxAntenna--;\r
815 pAdapter->PortCfg.CurrentRxAntenna--;\r
816 \r
817 RTMP_IO_WRITE32(pAdapter, BBPCSR1, BbpCsr1);\r
818 RTMP_BBP_IO_WRITE32_BY_REG_ID(pAdapter, BBP_Tx_Configure, TxValue);\r
819 RTMP_BBP_IO_WRITE32_BY_REG_ID(pAdapter, BBP_Rx_Configure, RxValue);\r
820 \r
821 // 2003-12-16 software-based RX antenna diversity\r
822 // pAdapter->PortCfg.CurrentRxAntenna = 0xff; // Diversity ON\r
823 AsicSetRxAnt(pAdapter);\r
824 \r
825 if (Antenna.field.LedMode == LED_MODE_TXRX_ACTIVITY)\r
826 pAdapter->PortCfg.LedMode = LED_MODE_TXRX_ACTIVITY;\r
827 else if (Antenna.field.LedMode == LED_MODE_SINGLE)\r
828 {\r
829 pAdapter->PortCfg.LedMode = LED_MODE_SINGLE;\r
830 ASIC_LED_ACT_ON(pAdapter);\r
831 }\r
832 else if (Antenna.field.LedMode == LED_MODE_ASUS)\r
833 {\r
834 pAdapter->PortCfg.LedMode = LED_MODE_ASUS;\r
835 RTMP_IO_WRITE32(pAdapter, LEDCSR, 0x0002461E);\r
836 }\r
837 else\r
838 pAdapter->PortCfg.LedMode = LED_MODE_DEFAULT;\r
839 \r
840 // Read Hardware controlled Radio state enable bit\r
841 if (Antenna.field.HardwareRadioControl == 1)\r
842 {\r
843 pAdapter->PortCfg.bHardwareRadio = TRUE;\r
844 \r
845 // Read GPIO pin0 as Hardware controlled radio state\r
846 RTMP_IO_READ32(pAdapter, GPIOCSR, &data);\r
847 if ((data & 0x01) == 0)\r
848 {\r
849 pAdapter->PortCfg.bHwRadio = FALSE;\r
850 pAdapter->PortCfg.bRadio = FALSE;\r
851 RTMP_IO_WRITE32(pAdapter, PWRCSR0, 0x00000000);\r
852 RTMP_SET_FLAG(pAdapter, fRTMP_ADAPTER_RADIO_OFF);\r
853 if (pAdapter->PortCfg.LedMode == LED_MODE_ASUS)\r
854 {\r
855 // Turn bit 17 for Radio OFF\r
856 RTMP_IO_WRITE32(pAdapter, LEDCSR, 0x0000461E);\r
857 }\r
858 }\r
859 }\r
860 else\r
861 pAdapter->PortCfg.bHardwareRadio = FALSE;\r
862 \r
863 NicConfig2.word = pAdapter->EEPROMDefaultValue[1];\r
864 if (NicConfig2.word == 0xffff)\r
865 { \r
866 DBGPRINT(RT_DEBUG_TRACE, "++++++++++empty E2PROM, use default\n");\r
867 NicConfig2.word = 0; // empty E2PROM, use default\r
868 }\r
869 // for dynamic BBP R17:RX sensibility tuning\r
870 {\r
871 UCHAR r17;\r
872 RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, 17, &r17);\r
873 DBGPRINT(RT_DEBUG_TRACE, "+++++++++++++NicConfig2.field.DynamicBbpTuning=%d\n", NicConfig2.field.DynamicBbpTuning)\r
874 pAdapter->PortCfg.BbpTuningEnable = (NicConfig2.field.DynamicBbpTuning==0)? 1:0;\r
875 pAdapter->PortCfg.VgcLowerBound = r17;\r
876 \r
877 // 2004-3-4 per David's request, R7 starts at upper bound\r
878 pAdapter->PortCfg.BbpTuning.VgcUpperBound = BBP_R17_DYNAMIC_UP_BOUND;\r
879 r17 = pAdapter->PortCfg.BbpTuning.VgcUpperBound;\r
880 pAdapter->PortCfg.LastR17Value = r17;\r
881 RTMP_BBP_IO_WRITE32_BY_REG_ID(pAdapter, 17, r17);\r
882 \r
883 // 2004-2-2 per David's request, lower R17 low-bound for very good quality NIC\r
884 pAdapter->PortCfg.VgcLowerBound -= 6;\r
885 DBGPRINT(RT_DEBUG_TRACE,"R17 tuning enable=%d, R17=0x%02x, range=<0x%02x, 0x%02x>\n",\r
886 pAdapter->PortCfg.BbpTuningEnable, r17, pAdapter->PortCfg.VgcLowerBound, pAdapter->PortCfg.BbpTuning.VgcUpperBound);\r
887 }\r
888 \r
889 DBGPRINT(RT_DEBUG_TRACE, "RF IC=%d, LED mode=%d\n", pAdapter->PortCfg.RfType, pAdapter->PortCfg.LedMode);\r
890 \r
891 DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitAsicFromEEPROM\n");\r
892 }\r
893 \r
894 void NICInitializeAdapter(IN PRTMP_ADAPTER pAdapter)\r
895 {\r
896 TXCSR2_STRUC TxCSR2;\r
897 RXCSR1_STRUC RxCSR1;\r
898 ULONG Value;\r
899 \r
900 DBGPRINT(RT_DEBUG_TRACE, "--> NICInitializeAdapter\n");\r
901 \r
902 // Init spin locks\r
903 NdisAllocateSpinLock(&pAdapter->TxRingLock);\r
904 NdisAllocateSpinLock(&pAdapter->PrioRingLock);\r
905 NdisAllocateSpinLock(&pAdapter->AtimRingLock);\r
906 NdisAllocateSpinLock(&pAdapter->RxRingLock);\r
907 NdisAllocateSpinLock(&pAdapter->TxSwQueueLock);\r
908 NdisAllocateSpinLock(&pAdapter->MemLock);\r
909 \r
910 // Write TXCSR2 register\r
911 TxCSR2.field.TxDSize = RING_DESCRIPTOR_SIZE;\r
912 TxCSR2.field.NumTxD = TX_RING_SIZE;\r
913 TxCSR2.field.NumAtimD = ATIM_RING_SIZE;\r
914 TxCSR2.field.NumPrioD = PRIO_RING_SIZE;\r
915 RTMP_IO_WRITE32(pAdapter, TXCSR2, TxCSR2.word);\r
916 \r
917 // Write TXCSR3 register\r
918 Value = pAdapter->TxRing[0].pa_addr;\r
919 RTMP_IO_WRITE32(pAdapter, TX_RING_BASE_REG, Value);\r
920 \r
921 // Write TXCSR4 register\r
922 Value = pAdapter->PrioRing[0].pa_addr;\r
923 RTMP_IO_WRITE32(pAdapter, PRIO_RING_BASE_REG, Value);\r
924 \r
925 // Write TXCSR5 register\r
926 Value = pAdapter->AtimRing[0].pa_addr;\r
927 RTMP_IO_WRITE32(pAdapter, ATIM_RING_BASE_REG, Value);\r
928 \r
929 // Write TXCSR6 register\r
930 Value = pAdapter->BeaconRing.pa_addr;\r
931 RTMP_IO_WRITE32(pAdapter, BEACON_BASE_REG, Value);\r
932 \r
933 // Write RXCSR1 register\r
934 RxCSR1.field.RxDSize = RING_DESCRIPTOR_SIZE;\r
935 RxCSR1.field.NumRxD = RX_RING_SIZE;\r
936 RTMP_IO_WRITE32(pAdapter, RXCSR1, RxCSR1.word);\r
937 \r
938 // Write RXCSR2 register\r
939 Value = pAdapter->RxRing[0].pa_addr;\r
940 RTMP_IO_WRITE32(pAdapter, RX_RING_BASE_REG, Value);\r
941 \r
942 // Write CSR1 for host ready\r
943 // Move Host reay to end of ASIC initialization\r
944 // to ensure no Rx will perform before ASIC init\r
945 // RTMP_IO_WRITE32(pAdapter, CSR1, 0x4);\r
946 \r
947 // Initialze ASIC for TX & Rx operation\r
948 NICInitializeAsic(pAdapter);\r
949 \r
950 DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitializeAdapter\n");\r
951 }\r
952 \r
953 void NICInitializeAsic(IN PRTMP_ADAPTER pAdapter)\r
954 {\r
955 ULONG Index;\r
956 UCHAR Value = 0xff;\r
957 \r
958 DBGPRINT(RT_DEBUG_TRACE, "--> NICInitializeAsic\n");\r
959 \r
960 // Initialize MAC register to default value\r
961 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)\r
962 {\r
963 RTMP_IO_WRITE32(pAdapter, MACRegTable[Index].Register, MACRegTable[Index].Value);\r
964 }\r
965 \r
966 // Set Host ready before kicking Rx\r
967 RTMP_IO_WRITE32(pAdapter, CSR1, 0x1); // reset MAC state machine, requested by Kevin 2003-2-11\r
968 RTMP_IO_WRITE32(pAdapter, CSR1, 0x4);\r
969 \r
970 // Read BBP register, make sure BBP is up and running before write new data\r
971 while ((Value == 0xff) || (Value == 0x00))\r
972 {\r
973 RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, BBP_Version, &Value);\r
974 DBGPRINT(RT_DEBUG_TRACE, "Value = %d\n", Value);\r
975 }\r
976 \r
977 // Initialize BBP register to default value\r
978 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)\r
979 {\r
980 RTMP_BBP_IO_WRITE32(pAdapter, BBPRegTable[Index]);\r
981 }\r
982 \r
983 // Initialize RF register to default value\r
984 AsicSwitchChannel(pAdapter, pAdapter->PortCfg.Channel);\r
985 AsicLockChannel(pAdapter, pAdapter->PortCfg.Channel);\r
986 \r
987 // Add radio off control\r
988 if (pAdapter->PortCfg.bRadio == FALSE)\r
989 {\r
990 RTMP_IO_WRITE32(pAdapter, PWRCSR0, 0x00000000);\r
991 RTMP_SET_FLAG(pAdapter, fRTMP_ADAPTER_RADIO_OFF);\r
992 }\r
993 \r
994 // Kick Rx\r
995 RTMP_IO_WRITE32(pAdapter, RXCSR0, 0x7e);\r
996 // Clear old FCS jitter before init ASIC\r
997 RTMP_IO_READ32(pAdapter, CNT0, &Index);\r
998 // Clear old Rx FIFO error jitter before init ASIC\r
999 RTMP_IO_READ32(pAdapter, CNT4, &Index);\r
1000 \r
1001 DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitializeAsic\n");\r
1002 }\r
1003 \r
1004 /*\r
1005 ========================================================================\r
1006 \r
1007 Routine Description:\r
1008 Reset NIC Asics\r
1009 \r
1010 Arguments:\r
1011 Adapter Pointer to our adapter\r
1012 \r
1013 Return Value:\r
1014 None\r
1015 \r
1016 Note:\r
1017 Reset NIC to initial state AS IS system boot up time.\r
1018 \r
1019 ========================================================================\r
1020 */\r
1021 VOID NICIssueReset(\r
1022 IN PRTMP_ADAPTER pAdapter)\r
1023 {\r
1024 CSR3_STRUC StaMacReg0;\r
1025 CSR4_STRUC StaMacReg1;\r
1026 \r
1027 DBGPRINT(RT_DEBUG_TRACE, "--> NICIssueReset\n");\r
1028 \r
1029 // Abort Tx, prevent ASIC from writing to Host memory\r
1030 RTMP_IO_WRITE32(pAdapter, TXCSR0, 0x08);\r
1031 \r
1032 // Disable Rx, register value supposed will remain after reset\r
1033 RTMP_IO_WRITE32(pAdapter, RXCSR0, 0x01);\r
1034 \r
1035 if (pAdapter->PortCfg.bLocalAdminMAC)\r
1036 {\r
1037 // Write Back Permanent MAC address to CSR3 & CSR4\r
1038 StaMacReg0.field.Byte0 = pAdapter->PermanentAddress[0];\r
1039 StaMacReg0.field.Byte1 = pAdapter->PermanentAddress[1];\r
1040 StaMacReg0.field.Byte2 = pAdapter->PermanentAddress[2];\r
1041 StaMacReg0.field.Byte3 = pAdapter->PermanentAddress[3];\r
1042 StaMacReg1.field.Byte4 = pAdapter->PermanentAddress[4];\r
1043 StaMacReg1.field.Byte5 = pAdapter->PermanentAddress[5];\r
1044 RTMP_IO_WRITE32(pAdapter, CSR3, StaMacReg0.word);\r
1045 RTMP_IO_WRITE32(pAdapter, CSR4, StaMacReg1.word);\r
1046 }\r
1047 \r
1048 // Issue reset and clear from reset state\r
1049 RTMP_IO_WRITE32(pAdapter, CSR1, 0x01);\r
1050 RTMP_IO_WRITE32(pAdapter, CSR1, 0x00);\r
1051 \r
1052 DBGPRINT(RT_DEBUG_TRACE, "<-- NICIssueReset\n");\r
1053 }\r
1054 \r
1055 /*\r
1056 ========================================================================\r
1057 \r
1058 Routine Description:\r
1059 Check ASIC registers and find any reason the system might hang\r
1060 \r
1061 Arguments:\r
1062 Adapter Pointer to our adapter\r
1063 \r
1064 Return Value:\r
1065 None\r
1066 \r
1067 Note:\r
1068 \r
1069 \r
1070 ========================================================================\r
1071 */\r
1072 BOOLEAN NICCheckForHang(\r
1073 IN PRTMP_ADAPTER pAd)\r
1074 {\r
1075 // garbage collection\r
1076 // if ((pAd->RalinkCounters.EncryptCount - pAd->RalinkCounters.TxDoneCount) == TX_RING_SIZE)\r
1077 // {\r
1078 // DBGPRINT(RT_DEBUG_WARNING,"\nNICCheckForHang --- Garbage Collection!!!\n\n");\r
1079 // }\r
1080 \r
1081 {\r
1082 RTMPHandleTxRingTxDoneInterrupt(pAd);\r
1083 RTMPHandleEncryptionDoneInterrupt(pAd);\r
1084 }\r
1085 \r
1086 return (FALSE);\r
1087 }\r
1088 \r
1089 /*\r
1090 ========================================================================\r
1091 \r
1092 Routine Description:\r
1093 Reset NIC from error\r
1094 \r
1095 Arguments:\r
1096 Adapter Pointer to our adapter\r
1097 \r
1098 Return Value:\r
1099 None\r
1100 \r
1101 Note:\r
1102 Reset NIC from error state\r
1103 \r
1104 ========================================================================\r
1105 */\r
1106 VOID NICResetFromError(\r
1107 IN PRTMP_ADAPTER pAdapter)\r
1108 {\r
1109 // Reset BBP (according to alex, reset ASIC will force reset BBP\r
1110 // Therefore, skip the reset BBP\r
1111 // RTMP_IO_WRITE32(pAdapter, CSR1, 0x2);\r
1112 // Release BBP reset\r
1113 // RTMP_IO_WRITE32(pAdapter, CSR1, 0x0);\r
1114 \r
1115 RTMP_IO_WRITE32(pAdapter, CSR1, 0x1);\r
1116 // Remove ASIC from reset state\r
1117 RTMP_IO_WRITE32(pAdapter, CSR1, 0x0);\r
1118 \r
1119 // Init send data structures and related parameters\r
1120 NICInitTransmit(pAdapter);\r
1121 \r
1122 NICInitializeAdapter(pAdapter);\r
1123 NICInitAsicFromEEPROM(pAdapter);\r
1124 \r
1125 // Switch to current channel, since during reset process, the connection should remains on.\r
1126 AsicSwitchChannel(pAdapter, pAdapter->PortCfg.Channel);\r
1127 AsicLockChannel(pAdapter, pAdapter->PortCfg.Channel);\r
1128 }\r
1129 /*\r
1130 ========================================================================\r
1131 \r
1132 Routine Description:\r
1133 Verify section is valid for Get key parameter.\r
1134 \r
1135 Arguments:\r
1136 buffer Pointer to the buffer to start find the key section\r
1137 ptr pointer to section\r
1138 \r
1139 Return Value:\r
1140 TRUE Success\r
1141 FALSE Fail\r
1142 ========================================================================\r
1143 */\r
1144 INT RTMPIsFindSection(\r
1145 IN PUCHAR ptr,\r
1146 IN PUCHAR buffer)\r
1147 {\r
1148 if(ptr == buffer)\r
1149 return TRUE;\r
1150 else if (ptr > buffer)\r
1151 {\r
1152 while (ptr > buffer)\r
1153 {\r
1154 ptr--;\r
1155 if( *ptr == 0x0a)\r
1156 return TRUE;\r
1157 else if( (*ptr == ' ') || (*ptr == '\t'))\r
1158 continue;\r
1159 else\r
1160 return FALSE;\r
1161 }\r
1162 return TRUE;\r
1163 }\r
1164 \r
1165 return FALSE;\r
1166 }\r
1167 /*\r
1168 ========================================================================\r
1169 \r
1170 Routine Description:\r
1171 Find key section for Get key parameter.\r
1172 \r
1173 Arguments:\r
1174 buffer Pointer to the buffer to start find the key section\r
1175 section the key of the secion to be find\r
1176 \r
1177 Return Value:\r
1178 NULL Fail\r
1179 Others Success\r
1180 ========================================================================\r
1181 */\r
1182 PUCHAR RTMPFindSection(\r
1183 IN PCHAR buffer,\r
1184 IN PCHAR section)\r
1185 {\r
1186 CHAR temp_buf[255];\r
1187 PUCHAR ptr;\r
1188 \r
1189 strcpy(temp_buf, "["); /* and the opening bracket [ */\r
1190 strcat(temp_buf, section);\r
1191 strcat(temp_buf, "]");\r
1192 \r
1193 if((ptr = rtstrstr(buffer, temp_buf)) != NULL)\r
1194 {\r
1195 if(RTMPIsFindSection(ptr, buffer))\r
1196 return (ptr+strlen("\n"));\r
1197 else\r
1198 return NULL;\r
1199 }\r
1200 else\r
1201 return NULL;\r
1202 }\r
1203 /**\r
1204 * strstr - Find the first substring in a %NUL terminated string\r
1205 * @s1: The string to be searched\r
1206 * @s2: The string to search for\r
1207 */\r
1208 char * rtstrstr(const char * s1,const char * s2)\r
1209 {\r
1210 int l1, l2;\r
1211 \r
1212 l2 = strlen(s2);\r
1213 if (!l2)\r
1214 return (char *) s1;\r
1215 l1 = strlen(s1);\r
1216 while (l1 >= l2) {\r
1217 l1--;\r
1218 if (!memcmp(s1,s2,l2))\r
1219 return (char *) s1;\r
1220 s1++;\r
1221 }\r
1222 return NULL;\r
1223 }\r
1224 /*\r
1225 ========================================================================\r
1226 \r
1227 Routine Description:\r
1228 Get key parameter.\r
1229 \r
1230 Arguments:\r
1231 section the key of the secion\r
1232 key Pointer to key string\r
1233 dest Pointer to destination\r
1234 destsize The datasize of the destination\r
1235 buffer Pointer to the buffer to start find the key\r
1236 \r
1237 Return Value:\r
1238 TRUE Success\r
1239 FALSE Fail\r
1240 \r
1241 Note:\r
1242 This routine get the value with the matched key (case case-sensitive)\r
1243 ========================================================================\r
1244 */\r
1245 INT RTMPGetKeyParameter(\r
1246 IN PUCHAR section,\r
1247 IN PCHAR key,\r
1248 OUT PCHAR dest,\r
1249 IN INT destsize,\r
1250 IN PCHAR buffer)\r
1251 {\r
1252 char temp_buf1[600];\r
1253 char temp_buf2[600];\r
1254 char *start_ptr;\r
1255 char *end_ptr;\r
1256 char *ptr;\r
1257 char *too_far_ptr;\r
1258 char *offset;\r
1259 int len;\r
1260 \r
1261 //find section\r
1262 if((offset = RTMPFindSection(buffer, section)) == NULL)\r
1263 return (FALSE);\r
1264 \r
1265 strcpy(temp_buf1, "\n");\r
1266 strcat(temp_buf1, key);\r
1267 strcat(temp_buf1, "=");\r
1268 \r
1269 //search key\r
1270 if((start_ptr=rtstrstr(offset, temp_buf1))==NULL)\r
1271 return FALSE;\r
1272 \r
1273 start_ptr+=strlen("\n");\r
1274 if((too_far_ptr=rtstrstr(offset+1, "["))==NULL)\r
1275 too_far_ptr=offset+strlen(offset);\r
1276 \r
1277 if((end_ptr=rtstrstr(start_ptr, "\n"))==NULL)\r
1278 end_ptr=start_ptr+strlen(start_ptr);\r
1279 \r
1280 if (too_far_ptr<start_ptr)\r
1281 return FALSE;\r
1282 \r
1283 memcpy(temp_buf2, start_ptr, end_ptr-start_ptr);\r
1284 temp_buf2[end_ptr-start_ptr]='\0';\r
1285 len = strlen(temp_buf2);\r
1286 strcpy(temp_buf1, temp_buf2);\r
1287 if((start_ptr=rtstrstr(temp_buf1, "=")) == NULL)\r
1288 return FALSE;\r
1289 \r
1290 strcpy(temp_buf2, start_ptr+1);\r
1291 ptr = temp_buf2;\r
1292 //trim space or tab\r
1293 while(*ptr != 0x00)\r
1294 {\r
1295 if( (*ptr == ' ') || (*ptr == '\t') )\r
1296 ptr++;\r
1297 else\r
1298 break;\r
1299 }\r
1300 \r
1301 len = strlen(ptr);\r
1302 memset(dest, 0x00, destsize);\r
1303 strncpy(dest, ptr, len >= destsize ? destsize: len);\r
1304 \r
1305 return TRUE;\r
1306 }\r
1307 /*\r
1308 ========================================================================\r
1309 \r
1310 Routine Description:\r
1311 In kernel mode read parameters from file\r
1312 \r
1313 Arguments:\r
1314 src the location of the file.\r
1315 dest put the parameters to the destination.\r
1316 Length size to read.\r
1317 \r
1318 Return Value:\r
1319 None\r
1320 \r
1321 Note:\r
1322 \r
1323 ========================================================================\r
1324 */\r
1325 \r
1326 VOID RTMPReadParametersFromFile(\r
1327 IN PRTMP_ADAPTER pAd)\r
1328 {\r
1329 PUCHAR src;\r
1330 struct file *srcf;\r
1331 INT retval, orgfsuid, orgfsgid;\r
1332 mm_segment_t orgfs;\r
1333 CHAR buffer[MAX_INI_BUFFER_SIZE];\r
1334 CHAR tmpbuf[255];\r
1335 UCHAR keyMaterial[40];\r
1336 UCHAR Channel;\r
1337 ULONG ulInfo;\r
1338 RT_802_11_PREAMBLE Preamble;\r
1339 int KeyLen;\r
1340 int i;\r
1341 BOOLEAN bIsHex = TRUE;\r
1342 ULONG rate_mapping[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; //according to README\r
1343 \r
1344 src = PROFILE_PATH;\r
1345 \r
1346 // Save uid and gid used for filesystem access.\r
1347 // Set user and group to 0 (root)\r
1348 orgfsuid = current->fsuid;\r
1349 orgfsgid = current->fsgid;\r
1350 current->fsuid=current->fsgid = 0;\r
1351 orgfs = get_fs();\r
1352 set_fs(KERNEL_DS);\r
1353 \r
1354 if (src && *src)\r
1355 {\r
1356 srcf = filp_open(src, O_RDONLY, 0);\r
1357 if (IS_ERR(srcf))\r
1358 {\r
1359 DBGPRINT(RT_DEBUG_TRACE, "--> Error %ld opening %s\n", -PTR_ERR(srcf),src);\r
1360 }\r
1361 else\r
1362 {\r
1363 /* The object must have a read method */\r
1364 if (srcf->f_op && srcf->f_op->read)\r
1365 {\r
1366 memset(buffer, 0x00, MAX_INI_BUFFER_SIZE);\r
1367 retval=srcf->f_op->read(srcf, buffer, MAX_INI_BUFFER_SIZE, &srcf->f_pos);\r
1368 if (retval < 0)\r
1369 {\r
1370 DBGPRINT(RT_DEBUG_TRACE, "--> Read %s error %d\n", src, -retval);\r
1371 }\r
1372 else\r
1373 {\r
1374 // set file parameter to portcfg\r
1375 //CountryRegion\r
1376 if (RTMPGetKeyParameter("Default", "CountryRegion", tmpbuf, 255, buffer))\r
1377 {\r
1378 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1379 if ((ulInfo >= REGION_MIN) && (ulInfo <= REGION_MAX) )\r
1380 {\r
1381 pAd->PortCfg.CountryRegion = (UCHAR) ulInfo;\r
1382 DBGPRINT(RT_DEBUG_TRACE, "%s::(CountryRegion=%d)\n", __FUNCTION__, pAd->PortCfg.CountryRegion);\r
1383 }\r
1384 }\r
1385 //SSID\r
1386 #if 0\r
1387 memset(tmpbuf, 0x00, 255);\r
1388 if (RTMPGetKeyParameter("Default", "SSID", tmpbuf, 64, buffer))\r
1389 {\r
1390 pAd->PortCfg.SsidLen = (UCHAR) strlen(tmpbuf)/2;\r
1391 for (i=0; i<pAd->PortCfg.SsidLen; i++)\r
1392 {\r
1393 if (tmpbuf[i*2]>='0' && tmpbuf[i*2]<='9')\r
1394 tmpbuf[i]=(tmpbuf[i*2]-'0')*16;\r
1395 else if (tmpbuf[i*2]>='a' && tmpbuf[i*2]<='z')\r
1396 tmpbuf[i]=(tmpbuf[i*2]-'a'+10)*16;\r
1397 else if (tmpbuf[i*2]>='A' && tmpbuf[i*2]<='Z')\r
1398 tmpbuf[i]=(tmpbuf[i*2]-'A'+10)*16;\r
1399 \r
1400 if (tmpbuf[i*2+1]>='0' && tmpbuf[i*2+1]<='9')\r
1401 tmpbuf[i]=tmpbuf[i]+(tmpbuf[i*2+1]-'0');\r
1402 else if (tmpbuf[i*2+1]>='a' && tmpbuf[i*2+1]<='z')\r
1403 tmpbuf[i]=tmpbuf[i]+(tmpbuf[i*2+1]-'a'+10);\r
1404 else if (tmpbuf[i*2+1]>='A' && tmpbuf[i*2+1]<='Z')\r
1405 tmpbuf[i]=tmpbuf[i]+(tmpbuf[i*2+1]-'A'+10);\r
1406 }\r
1407 \r
1408 for (i=pAd->PortCfg.SsidLen; i<strlen(tmpbuf); i++)\r
1409 tmpbuf[i]=0;\r
1410 \r
1411 memcpy(pAd->PortCfg.Ssid, tmpbuf, pAd->PortCfg.SsidLen);\r
1412 \r
1413 pAd->Mlme.CntlAux.SsidLen = pAd->PortCfg.SsidLen;\r
1414 memcpy(pAd->Mlme.CntlAux.Ssid, tmpbuf, pAd->Mlme.CntlAux.SsidLen);\r
1415 DBGPRINT(RT_DEBUG_TRACE, "%s::(SSID=%s Len=%d)\n", __FUNCTION__, tmpbuf, pAd->PortCfg.SsidLen);\r
1416 }\r
1417 #else\r
1418 memset(tmpbuf, 0x00, 255);\r
1419 if (RTMPGetKeyParameter("Default", "SSID", tmpbuf, 32, buffer))\r
1420 {\r
1421 pAd->PortCfg.SsidLen = (UCHAR) strlen(tmpbuf);\r
1422 memcpy(pAd->PortCfg.Ssid, tmpbuf, pAd->PortCfg.SsidLen);\r
1423 \r
1424 pAd->Mlme.CntlAux.SsidLen = pAd->PortCfg.SsidLen;\r
1425 memcpy(pAd->Mlme.CntlAux.Ssid, tmpbuf, pAd->Mlme.CntlAux.SsidLen);\r
1426 DBGPRINT(RT_DEBUG_TRACE, "%s::(SSID=%s Len=%d)\n", __FUNCTION__, tmpbuf, pAd->PortCfg.SsidLen);\r
1427 }\r
1428 #endif\r
1429 //NetworkType\r
1430 if (RTMPGetKeyParameter("Default", "NetworkType", tmpbuf, 255, buffer))\r
1431 {\r
1432 pAd->bConfigChanged = TRUE;\r
1433 if (strcmp(tmpbuf, "Adhoc") == 0)\r
1434 pAd->PortCfg.BssType = BSS_INDEP;\r
1435 else //Default Infrastructure mode\r
1436 pAd->PortCfg.BssType = BSS_INFRA;\r
1437 // Reset Ralink supplicant to not use, it will be set to start when UI set PMK key\r
1438 pAd->PortCfg.WpaState = SS_NOTUSE;\r
1439 DBGPRINT(RT_DEBUG_TRACE, "%s::(NetworkType=%d)\n", __FUNCTION__, pAd->PortCfg.BssType);\r
1440 }\r
1441 //WirelessMode\r
1442 if (RTMPGetKeyParameter("Default", "WirelessMode", tmpbuf, 10, buffer))\r
1443 {\r
1444 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1445 if ((ulInfo == PHY_11BG_MIXED) || (ulInfo == PHY_11B) ||\r
1446 (ulInfo == PHY_11A) || (ulInfo == PHY_11ABG_MIXED))\r
1447 {\r
1448 RTMPSetPhyMode(pAd, ulInfo);\r
1449 DBGPRINT(RT_DEBUG_TRACE, "%s::(WirelessMode=%d)\n", __FUNCTION__, ulInfo);\r
1450 }\r
1451 }\r
1452 //TxRate\r
1453 if (RTMPGetKeyParameter("Default", "TxRate", tmpbuf, 10, buffer))\r
1454 {\r
1455 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1456 {\r
1457 if (ulInfo == 0)\r
1458 RTMPSetDesiredRates(pAd, -1);\r
1459 else\r
1460 RTMPSetDesiredRates(pAd, (LONG) (rate_mapping[ulInfo-1] * 1000000));\r
1461 \r
1462 DBGPRINT(RT_DEBUG_TRACE, "%s::(TxRate=%d)\n", __FUNCTION__, ulInfo);\r
1463 }\r
1464 }\r
1465 //Channel\r
1466 if (RTMPGetKeyParameter("Default", "Channel", tmpbuf, 10, buffer))\r
1467 {\r
1468 Channel = (UCHAR) simple_strtol(tmpbuf, 0, 10);\r
1469 if (ChannelSanity(pAd, Channel) == TRUE)\r
1470 {\r
1471 pAd->PortCfg.Channel = Channel;\r
1472 // If default profile in Registry is an ADHOC network, driver should use the specified channel\r
1473 // number when starting IBSS the first time, because RaConfig is passive and will not set this\r
1474 // via OID_802_11_CONFIGURATION upon driver bootup.\r
1475 pAd->PortCfg.IbssConfig.Channel = pAd->PortCfg.Channel;\r
1476 DBGPRINT(RT_DEBUG_TRACE, "%s::(Channel=%d)\n", __FUNCTION__, Channel);\r
1477 }\r
1478 }\r
1479 //BGProtection\r
1480 if (RTMPGetKeyParameter("Default", "BGProtection", tmpbuf, 10, buffer))\r
1481 {\r
1482 switch (simple_strtol(tmpbuf, 0, 10))\r
1483 {\r
1484 case 1: //Always On\r
1485 pAd->PortCfg.UseBGProtection = 1;\r
1486 break;\r
1487 case 2: //Always OFF\r
1488 pAd->PortCfg.UseBGProtection = 2;\r
1489 break;\r
1490 case 0: //AUTO\r
1491 default:\r
1492 pAd->PortCfg.UseBGProtection = 0;\r
1493 break;\r
1494 }\r
1495 DBGPRINT(RT_DEBUG_TRACE, "%s::(BGProtection=%d)\n", __FUNCTION__, pAd->PortCfg.UseBGProtection);\r
1496 }\r
1497 //TxPreamble\r
1498 if (RTMPGetKeyParameter("Default", "TxPreamble", tmpbuf, 10, buffer))\r
1499 {\r
1500 Preamble = simple_strtol(tmpbuf, 0, 10);\r
1501 switch (Preamble)\r
1502 {\r
1503 case Rt802_11PreambleShort:\r
1504 pAd->PortCfg.WindowsTxPreamble = Preamble;\r
1505 MlmeSetTxPreamble(pAd, Rt802_11PreambleShort);\r
1506 break;\r
1507 case Rt802_11PreambleLong:\r
1508 case Rt802_11PreambleAuto:\r
1509 default:\r
1510 // if user wants AUTO, initialize to LONG here, then change according to AP's\r
1511 // capability upon association.\r
1512 pAd->PortCfg.WindowsTxPreamble = Preamble;\r
1513 MlmeSetTxPreamble(pAd, Rt802_11PreambleLong);\r
1514 }\r
1515 DBGPRINT(RT_DEBUG_TRACE, "%s::(TxPreamble=%d)\n", __FUNCTION__, Preamble);\r
1516 }\r
1517 //RTSThreshold\r
1518 if (RTMPGetKeyParameter("Default", "RTSThreshold", tmpbuf, 10, buffer))\r
1519 {\r
1520 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1521 \r
1522 if((ulInfo > 0) && (ulInfo <= MAX_RTS_THRESHOLD))\r
1523 pAd->PortCfg.RtsThreshold = (USHORT)ulInfo;\r
1524 else\r
1525 pAd->PortCfg.RtsThreshold = MAX_RTS_THRESHOLD;\r
1526 \r
1527 DBGPRINT(RT_DEBUG_TRACE, "%s::(RTSThreshold=%d)\n", __FUNCTION__, pAd->PortCfg.RtsThreshold);\r
1528 }\r
1529 //FragThreshold\r
1530 if (RTMPGetKeyParameter("Default", "FragThreshold", tmpbuf, 10, buffer))\r
1531 {\r
1532 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1533 \r
1534 if ( (ulInfo >= MIN_FRAG_THRESHOLD) && (ulInfo <= MAX_FRAG_THRESHOLD))\r
1535 pAd->PortCfg.FragmentThreshold = (USHORT)ulInfo;\r
1536 else\r
1537 pAd->PortCfg.FragmentThreshold = MAX_FRAG_THRESHOLD;\r
1538 \r
1539 if (pAd->PortCfg.FragmentThreshold == MAX_FRAG_THRESHOLD)\r
1540 pAd->PortCfg.bFragmentZeroDisable = TRUE;\r
1541 else\r
1542 pAd->PortCfg.bFragmentZeroDisable = FALSE;\r
1543 \r
1544 DBGPRINT(RT_DEBUG_TRACE, "%s::(FragThreshold=%d)\n", __FUNCTION__, ulInfo);\r
1545 }\r
1546 //AdhocModeRate\r
1547 if (RTMPGetKeyParameter("Default", "AdhocModeRate", tmpbuf, 10, buffer))\r
1548 {\r
1549 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1550 \r
1551 if (ulInfo == 1)\r
1552 pAd->PortCfg.AdhocMode = 1;\r
1553 else\r
1554 pAd->PortCfg.AdhocMode = 0;\r
1555 \r
1556 DBGPRINT(RT_DEBUG_TRACE, "%s::(AdhocModeRate=%d)\n", __FUNCTION__, pAd->PortCfg.AdhocMode);\r
1557 }\r
1558 //TxBurst\r
1559 if (RTMPGetKeyParameter("Default", "TxBurst", tmpbuf, 10, buffer))\r
1560 {\r
1561 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1562 \r
1563 if (ulInfo == 1)\r
1564 pAd->PortCfg.EnableTxBurst = TRUE;\r
1565 else\r
1566 pAd->PortCfg.EnableTxBurst = FALSE;\r
1567 \r
1568 DBGPRINT(RT_DEBUG_TRACE, "%s::(TxBurst=%d)\n", __FUNCTION__, pAd->PortCfg.EnableTxBurst);\r
1569 }\r
1570 //TurboRate\r
1571 if (RTMPGetKeyParameter("Default", "TurboRate", tmpbuf, 10, buffer))\r
1572 {\r
1573 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1574 \r
1575 if (ulInfo == 1)\r
1576 pAd->PortCfg.EnableTurboRate = TRUE;\r
1577 else\r
1578 pAd->PortCfg.EnableTurboRate = FALSE;\r
1579 \r
1580 DBGPRINT(RT_DEBUG_TRACE, "%s::(TurboRate=%d)\n", __FUNCTION__, pAd->PortCfg.EnableTurboRate);\r
1581 }\r
1582 //ShortSlot\r
1583 if (RTMPGetKeyParameter("Default", "ShortSlot", tmpbuf, 10, buffer))\r
1584 {\r
1585 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1586 \r
1587 if (ulInfo == 1)\r
1588 pAd->PortCfg.UseShortSlotTime = TRUE;\r
1589 else\r
1590 pAd->PortCfg.UseShortSlotTime = FALSE;\r
1591 \r
1592 DBGPRINT(RT_DEBUG_TRACE, "%s::(ShortSlot=%d)\n", __FUNCTION__, pAd->PortCfg.UseShortSlotTime);\r
1593 }\r
1594 //POWER_MODE\r
1595 if (RTMPGetKeyParameter("Default", "PSMode", tmpbuf, 10, buffer))\r
1596 {\r
1597 if (pAd->PortCfg.BssType == BSS_INFRA)\r
1598 {\r
1599 if ((strcmp(tmpbuf, "MAX_PSP") == 0) || (strcmp(tmpbuf, "max_psp") == 0))\r
1600 {\r
1601 // do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()\r
1602 // to exclude certain situations.\r
1603 // MlmeSetPsmBit(pAdapter, PWR_SAVE);\r
1604 if (pAd->PortCfg.WindowsACCAMEnable == FALSE)\r
1605 pAd->PortCfg.WindowsPowerMode = Ndis802_11PowerModeMAX_PSP;\r
1606 pAd->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeMAX_PSP;\r
1607 pAd->PortCfg.RecvDtim = TRUE; // FALSE;\r
1608 pAd->PortCfg.DefaultListenCount = 5;\r
1609 }\r
1610 else if ((strcmp(tmpbuf, "Fast_PSP") == 0) || (strcmp(tmpbuf, "fast_psp") == 0)\r
1611 || (strcmp(tmpbuf, "FAST_PSP") == 0))\r
1612 {\r
1613 // do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()\r
1614 // to exclude certain situations.\r
1615 // MlmeSetPsmBit(pAdapter, PWR_SAVE);\r
1616 pAd->PortCfg.RecvDtim = TRUE;\r
1617 if (pAd->PortCfg.WindowsACCAMEnable == FALSE)\r
1618 pAd->PortCfg.WindowsPowerMode = Ndis802_11PowerModeFast_PSP;\r
1619 pAd->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeFast_PSP;\r
1620 pAd->PortCfg.DefaultListenCount = 3;\r
1621 }\r
1622 else\r
1623 { //Default Ndis802_11PowerModeCAM\r
1624 // clear PSM bit immediately\r
1625 MlmeSetPsmBit(pAd, PWR_ACTIVE);\r
1626 pAd->PortCfg.RecvDtim = TRUE;\r
1627 if (pAd->PortCfg.WindowsACCAMEnable == FALSE)\r
1628 pAd->PortCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;\r
1629 pAd->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;\r
1630 }\r
1631 DBGPRINT(RT_DEBUG_TRACE, "%s::(PSMode=%d)\n", __FUNCTION__, pAd->PortCfg.WindowsPowerMode);\r
1632 }\r
1633 }\r
1634 //AuthMode\r
1635 if (RTMPGetKeyParameter("Default", "AuthMode", tmpbuf, 10, buffer))\r
1636 {\r
1637 if ((strcmp(tmpbuf, "SHARED") == 0) || (strcmp(tmpbuf, "shared") == 0))\r
1638 pAd->PortCfg.AuthMode = Ndis802_11AuthModeShared;\r
1639 else if ((strcmp(tmpbuf, "WPAPSK") == 0) || (strcmp(tmpbuf, "wpapsk") == 0))\r
1640 pAd->PortCfg.AuthMode = Ndis802_11AuthModeWPAPSK;\r
1641 else if ((strcmp(tmpbuf, "WPANONE") == 0) || (strcmp(tmpbuf, "wpanone") == 0))\r
1642 pAd->PortCfg.AuthMode = Ndis802_11AuthModeWPANone;\r
1643 else\r
1644 pAd->PortCfg.AuthMode = Ndis802_11AuthModeOpen;\r
1645 \r
1646 pAd->PortCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;\r
1647 DBGPRINT(RT_DEBUG_TRACE, "%s::(AuthMode=%d)\n", __FUNCTION__, pAd->PortCfg.AuthMode);\r
1648 }\r
1649 //EncrypType\r
1650 if (RTMPGetKeyParameter("Default", "EncrypType", tmpbuf, 10, buffer))\r
1651 {\r
1652 if ((strcmp(tmpbuf, "WEP") == 0) || (strcmp(tmpbuf, "wep") == 0))\r
1653 pAd->PortCfg.WepStatus = Ndis802_11WEPEnabled;\r
1654 else if ((strcmp(tmpbuf, "TKIP") == 0) || (strcmp(tmpbuf, "tkip") == 0))\r
1655 pAd->PortCfg.WepStatus = Ndis802_11Encryption2Enabled;\r
1656 else if ((strcmp(tmpbuf, "AES") == 0) || (strcmp(tmpbuf, "aes") == 0))\r
1657 pAd->PortCfg.WepStatus = Ndis802_11Encryption3Enabled;\r
1658 else\r
1659 pAd->PortCfg.WepStatus = Ndis802_11WEPDisabled;\r
1660 \r
1661 DBGPRINT(RT_DEBUG_TRACE, "%s::(EncrypType=%d)\n", __FUNCTION__, pAd->PortCfg.WepStatus);\r
1662 }\r
1663 //WPAPSK_KEY\r
1664 if (RTMPGetKeyParameter("Default", "WPAPSK", tmpbuf, 255, buffer))\r
1665 {\r
1666 if ((strlen(tmpbuf) >= 8) && (strlen(tmpbuf) <= 64))\r
1667 {\r
1668 PasswordHash((char *)tmpbuf, pAd->PortCfg.Ssid, pAd->PortCfg.SsidLen, keyMaterial);\r
1669 NdisMoveMemory(pAd->PortCfg.PskKey.Key, keyMaterial, 32);\r
1670 // Use RaConfig as PSK agent.\r
1671 // Start STA supplicant state machine\r
1672 pAd->PortCfg.WpaState = SS_START;\r
1673 #if 0\r
1674 DBGPRINT(RT_DEBUG_TRACE, "%s WPAPSK Key => \n", __FUNCTION__);\r
1675 for (i = 0; i < 32; i++)\r
1676 {\r
1677 DBGPRINT(RT_DEBUG_TRACE, "%02x:", pAd->PortCfg.PskKey.Key[i]);\r
1678 if (i%16 == 15)\r
1679 DBGPRINT(RT_DEBUG_TRACE, "\n");\r
1680 }\r
1681 DBGPRINT(RT_DEBUG_TRACE, "\n");\r
1682 #endif\r
1683 }\r
1684 }\r
1685 //DefaultKeyID\r
1686 if (RTMPGetKeyParameter("Default", "DefaultKeyID", tmpbuf, 10, buffer))\r
1687 {\r
1688 ulInfo = simple_strtol(tmpbuf, 0, 10);\r
1689 if((ulInfo >= 1 ) && (ulInfo <= 4))\r
1690 pAd->PortCfg.DefaultKeyId = (UCHAR) (ulInfo - 1 );\r
1691 else\r
1692 pAd->PortCfg.DefaultKeyId = 0;\r
1693 \r
1694 DBGPRINT(RT_DEBUG_TRACE, "%s::(DefaultKeyID=%d)\n", __FUNCTION__, pAd->PortCfg.DefaultKeyId);\r
1695 }\r
1696 //Key1Str\r
1697 if (RTMPGetKeyParameter("Default", "Key1Str", tmpbuf, 26, buffer))\r
1698 {\r
1699 KeyLen = strlen(tmpbuf);\r
1700 switch (KeyLen) {\r
1701 case 0:\r
1702 pAd->PortCfg.SharedKey[0].KeyLen = 0;\r
1703 break;\r
1704 case 5: //wep 40 Ascii type\r
1705 pAd->PortCfg.SharedKey[0].KeyLen = KeyLen;\r
1706 memcpy(pAd->PortCfg.SharedKey[0].Key, tmpbuf, KeyLen);\r
1707 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1708 break;\r
1709 case 10: //wep 40 Hex type\r
1710 for(i=0; i < KeyLen; i++) {\r
1711 if( !isxdigit(*(tmpbuf+i)) ) {\r
1712 bIsHex = FALSE;\r
1713 break;\r
1714 }\r
1715 }\r
1716 \r
1717 if (bIsHex)\r
1718 {\r
1719 pAd->PortCfg.SharedKey[0].KeyLen = KeyLen / 2 ;\r
1720 AtoH(tmpbuf, pAd->PortCfg.SharedKey[0].Key, KeyLen / 2);\r
1721 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1722 }\r
1723 break;\r
1724 case 13: //wep 104 Ascii type\r
1725 pAd->PortCfg.SharedKey[0].KeyLen = KeyLen;\r
1726 memcpy(pAd->PortCfg.SharedKey[0].Key, tmpbuf, KeyLen);\r
1727 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1728 break;\r
1729 case 26: //wep 104 Hex type\r
1730 for(i=0; i < KeyLen; i++)\r
1731 {\r
1732 if( !isxdigit(*(tmpbuf+i)) )\r
1733 {\r
1734 bIsHex = FALSE;\r
1735 break;\r
1736 }\r
1737 }\r
1738 \r
1739 if (bIsHex)\r
1740 {\r
1741 pAd->PortCfg.SharedKey[0].KeyLen = KeyLen / 2 ;\r
1742 AtoH(tmpbuf, pAd->PortCfg.SharedKey[0].Key, KeyLen / 2);\r
1743 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1744 }\r
1745 break;\r
1746 default:\r
1747 pAd->PortCfg.SharedKey[0].KeyLen = 0;\r
1748 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid Key (=%s)\n", __FUNCTION__, tmpbuf);\r
1749 }\r
1750 }\r
1751 //Key2Str\r
1752 if (RTMPGetKeyParameter("Default", "Key2Str", tmpbuf, 26, buffer))\r
1753 {\r
1754 KeyLen = strlen(tmpbuf);\r
1755 switch (KeyLen)\r
1756 {\r
1757 case 0:\r
1758 pAd->PortCfg.SharedKey[1].KeyLen = 0;\r
1759 break;\r
1760 case 5: //wep 40 Ascii type\r
1761 pAd->PortCfg.SharedKey[1].KeyLen = KeyLen;\r
1762 memcpy(pAd->PortCfg.SharedKey[1].Key, tmpbuf, KeyLen);\r
1763 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1764 case 10: //wep 40 Hex type\r
1765 for(i=0; i < KeyLen; i++)\r
1766 {\r
1767 if( !isxdigit(*(tmpbuf+i)) )\r
1768 {\r
1769 bIsHex = FALSE;\r
1770 break;\r
1771 }\r
1772 }\r
1773 \r
1774 if (bIsHex)\r
1775 {\r
1776 pAd->PortCfg.SharedKey[1].KeyLen = KeyLen / 2 ;\r
1777 AtoH(tmpbuf, pAd->PortCfg.SharedKey[1].Key, KeyLen / 2);\r
1778 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1779 }\r
1780 break;\r
1781 case 13: //wep 104 Ascii type\r
1782 pAd->PortCfg.SharedKey[1].KeyLen = KeyLen;\r
1783 memcpy(pAd->PortCfg.SharedKey[1].Key, tmpbuf, KeyLen);\r
1784 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1785 break;\r
1786 case 26: //wep 104 Hex type\r
1787 for(i=0; i < KeyLen; i++)\r
1788 {\r
1789 if( !isxdigit(*(tmpbuf+i)) )\r
1790 {\r
1791 bIsHex = FALSE;\r
1792 break;\r
1793 }\r
1794 }\r
1795 \r
1796 if (bIsHex)\r
1797 {\r
1798 pAd->PortCfg.SharedKey[1].KeyLen = KeyLen / 2 ;\r
1799 AtoH(tmpbuf, pAd->PortCfg.SharedKey[1].Key, KeyLen / 2);\r
1800 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1801 }\r
1802 break;\r
1803 default:\r
1804 pAd->PortCfg.SharedKey[1].KeyLen = 0;\r
1805 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid argument (=%s)\n", __FUNCTION__, tmpbuf);\r
1806 }\r
1807 }\r
1808 //Key3Str\r
1809 if (RTMPGetKeyParameter("Default", "Key3Str", tmpbuf, 26, buffer))\r
1810 {\r
1811 KeyLen = strlen(tmpbuf);\r
1812 switch (KeyLen)\r
1813 {\r
1814 case 0:\r
1815 pAd->PortCfg.SharedKey[2].KeyLen = 0;\r
1816 break;\r
1817 case 5: //wep 40 Ascii type\r
1818 pAd->PortCfg.SharedKey[2].KeyLen = KeyLen;\r
1819 memcpy(pAd->PortCfg.SharedKey[2].Key, tmpbuf, KeyLen);\r
1820 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1821 case 10: //wep 40 Hex type\r
1822 for(i=0; i < KeyLen; i++)\r
1823 {\r
1824 if( !isxdigit(*(tmpbuf+i)) )\r
1825 {\r
1826 bIsHex = FALSE;\r
1827 break;\r
1828 }\r
1829 }\r
1830 \r
1831 if (bIsHex)\r
1832 {\r
1833 pAd->PortCfg.SharedKey[2].KeyLen = KeyLen / 2 ;\r
1834 AtoH(tmpbuf, pAd->PortCfg.SharedKey[2].Key, KeyLen / 2);\r
1835 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1836 }\r
1837 break;\r
1838 case 13: //wep 104 Ascii type\r
1839 pAd->PortCfg.SharedKey[2].KeyLen = KeyLen;\r
1840 memcpy(pAd->PortCfg.SharedKey[2].Key, tmpbuf, KeyLen);\r
1841 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1842 break;\r
1843 case 26: //wep 104 Hex type\r
1844 for(i=0; i < KeyLen; i++)\r
1845 {\r
1846 if( !isxdigit(*(tmpbuf+i)) )\r
1847 {\r
1848 bIsHex = FALSE;\r
1849 break;\r
1850 }\r
1851 }\r
1852 \r
1853 if (bIsHex)\r
1854 {\r
1855 pAd->PortCfg.SharedKey[2].KeyLen = KeyLen / 2 ;\r
1856 AtoH(tmpbuf, pAd->PortCfg.SharedKey[2].Key, KeyLen / 2);\r
1857 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1858 }\r
1859 break;\r
1860 default:\r
1861 pAd->PortCfg.SharedKey[2].KeyLen = 0;\r
1862 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid argument (=%s)\n", __FUNCTION__, tmpbuf);\r
1863 }\r
1864 }\r
1865 //Key4Str\r
1866 if (RTMPGetKeyParameter("Default", "Key4Str", tmpbuf, 26, buffer))\r
1867 {\r
1868 KeyLen = strlen(tmpbuf);\r
1869 switch (KeyLen)\r
1870 {\r
1871 case 0:\r
1872 pAd->PortCfg.SharedKey[3].KeyLen = 0;\r
1873 break;\r
1874 case 5: //wep 40 Ascii type\r
1875 pAd->PortCfg.SharedKey[3].KeyLen = KeyLen;\r
1876 memcpy(pAd->PortCfg.SharedKey[3].Key, tmpbuf, KeyLen);\r
1877 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1878 case 10: //wep 40 Hex type\r
1879 for(i=0; i < KeyLen; i++)\r
1880 {\r
1881 if( !isxdigit(*(tmpbuf+i)) )\r
1882 {\r
1883 bIsHex = FALSE;\r
1884 break;\r
1885 }\r
1886 }\r
1887 \r
1888 if (bIsHex)\r
1889 {\r
1890 pAd->PortCfg.SharedKey[3].KeyLen = KeyLen / 2 ;\r
1891 AtoH(tmpbuf, pAd->PortCfg.SharedKey[3].Key, KeyLen / 2);\r
1892 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1893 }\r
1894 break;\r
1895 case 13: //wep 104 Ascii type\r
1896 pAd->PortCfg.SharedKey[3].KeyLen = KeyLen;\r
1897 memcpy(pAd->PortCfg.SharedKey[3].Key, tmpbuf, KeyLen);\r
1898 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");\r
1899 break;\r
1900 case 26: //wep 104 Hex type\r
1901 for(i=0; i < KeyLen; i++)\r
1902 {\r
1903 if( !isxdigit(*(tmpbuf+i)) )\r
1904 {\r
1905 bIsHex = FALSE;\r
1906 break;\r
1907 }\r
1908 }\r
1909 \r
1910 if (bIsHex)\r
1911 {\r
1912 pAd->PortCfg.SharedKey[3].KeyLen = KeyLen / 2 ;\r
1913 AtoH(tmpbuf, pAd->PortCfg.SharedKey[3].Key, KeyLen / 2);\r
1914 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");\r
1915 }\r
1916 break;\r
1917 default:\r
1918 pAd->PortCfg.SharedKey[3].KeyLen = 0;\r
1919 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid argument (=%s)\n", __FUNCTION__, tmpbuf);\r
1920 }\r
1921 }\r
1922 }\r
1923 }\r
1924 else\r
1925 {\r
1926 DBGPRINT(RT_DEBUG_TRACE, "--> %s does not have a write method\n", src);\r
1927 }\r
1928 \r
1929 retval=filp_close(srcf,NULL);\r
1930 if (retval)\r
1931 {\r
1932 DBGPRINT(RT_DEBUG_TRACE, "--> Error %d closing %s\n", -retval, src);\r
1933 }\r
1934 }\r
1935 } //if (src && *src)\r
1936 \r
1937 set_fs(orgfs);\r
1938 current->fsuid = orgfsuid;\r
1939 current->fsgid = orgfsgid;\r
1940 }\r
1941 /*\r
1942 ========================================================================\r
1943 \r
1944 Routine Description:\r
1945 Reset NIC Asics\r
1946 \r
1947 Arguments:\r
1948 Adapter Pointer to our adapter\r
1949 \r
1950 Return Value:\r
1951 None\r
1952 \r
1953 Note:\r
1954 Reset NIC to initial state AS IS system boot up time.\r
1955 \r
1956 ========================================================================\r
1957 */\r
1958 VOID RTMPRingCleanUp(\r
1959 IN PRTMP_ADAPTER pAdapter,\r
1960 IN UCHAR RingType)\r
1961 {\r
1962 ULONG Count;\r
1963 PTXD_STRUC pTxD;\r
1964 PRXD_STRUC pRxD;\r
1965 PMGMT_STRUC pMgmt;\r
1966 struct sk_buff *skb;\r
1967 \r
1968 Count = 0;\r
1969 switch (RingType)\r
1970 {\r
1971 case TX_RING:\r
1972 // We have to clean all descriptos in case some error happened with reset\r
1973 do\r
1974 {\r
1975 pTxD = (PTXD_STRUC) pAdapter->TxRing[pAdapter->NextTxDoneIndex].va_addr;\r
1976 \r
1977 pTxD->Owner = DESC_OWN_HOST;\r
1978 pTxD->Valid = FALSE;\r
1979 \r
1980 pAdapter->NextTxDoneIndex++;\r
1981 Count++;\r
1982 if (pAdapter->NextTxDoneIndex >= TX_RING_SIZE)\r
1983 {\r
1984 pAdapter->NextTxDoneIndex = 0;\r
1985 }\r
1986 \r
1987 } while (Count < TX_RING_SIZE); // We have to scan all TX ring\r
1988 \r
1989 // Check for packet in send tx wait waiting queue\r
1990 while (pAdapter->TxSwQueue0.Head != NULL)\r
1991 {\r
1992 // Packets queued, Remove all and return to upper layer\r
1993 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue0);\r
1994 // Release packet by calling send failure\r
1995 RTMPFreeSkbBuffer(skb);\r
1996 }\r
1997 while (pAdapter->TxSwQueue1.Head != NULL)\r
1998 {\r
1999 // Packets queued, Remove all and return to upper layer\r
2000 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue1);\r
2001 // Release packet by calling send failure\r
2002 RTMPFreeSkbBuffer(skb);\r
2003 }\r
2004 while (pAdapter->TxSwQueue2.Head != NULL)\r
2005 {\r
2006 // Packets queued, Remove all and return to upper layer\r
2007 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue2);\r
2008 // Release packet by calling send failure\r
2009 RTMPFreeSkbBuffer(skb);\r
2010 }\r
2011 while (pAdapter->TxSwQueue3.Head != NULL)\r
2012 {\r
2013 // Packets queued, Remove all and return to upper layer\r
2014 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue3);\r
2015 // Release packet by calling send failure\r
2016 RTMPFreeSkbBuffer(skb);\r
2017 }\r
2018 break;\r
2019 \r
2020 case PRIO_RING:\r
2021 // We have to clean all descriptos in case some error happened with reset\r
2022 do\r
2023 {\r
2024 pTxD = (PTXD_STRUC) pAdapter->PrioRing[pAdapter->NextPrioDoneIndex].va_addr;\r
2025 \r
2026 // We just re-claim these ring spaces.\r
2027 pTxD->Owner = DESC_OWN_HOST;\r
2028 pTxD->Valid = FALSE;\r
2029 \r
2030 pAdapter->NextPrioDoneIndex++;\r
2031 Count++;\r
2032 if (pAdapter->NextPrioDoneIndex >= PRIO_RING_SIZE)\r
2033 {\r
2034 pAdapter->NextPrioDoneIndex = 0;\r
2035 }\r
2036 \r
2037 } while (Count < PRIO_RING_SIZE); // We have to scan all Priority Ring\r
2038 \r
2039 // Clear managemt buffer ring\r
2040 while ((pAdapter->PushMgmtIndex != pAdapter->PopMgmtIndex) || (pAdapter->MgmtQueueSize != 0))\r
2041 {\r
2042 pMgmt = (PMGMT_STRUC) &pAdapter->MgmtRing[pAdapter->PopMgmtIndex];\r
2043 if (pMgmt->Valid == TRUE)\r
2044 {\r
2045 MlmeFreeMemory(pAdapter, pMgmt->pBuffer);\r
2046 pMgmt->Valid = FALSE;\r
2047 pAdapter->PopMgmtIndex++;\r
2048 pAdapter->MgmtQueueSize--;\r
2049 if (pAdapter->PopMgmtIndex >= MGMT_RING_SIZE)\r
2050 {\r
2051 pAdapter->PopMgmtIndex = 0;\r
2052 }\r
2053 }\r
2054 }\r
2055 pAdapter->RalinkCounters.MgmtRingFullCount = 0;\r
2056 break;\r
2057 \r
2058 case RX_RING:\r
2059 // We have to clean all descriptos in case some error happened with reset\r
2060 do\r
2061 {\r
2062 pRxD = (PRXD_STRUC) pAdapter->RxRing[pAdapter->CurRxIndex].va_addr;\r
2063 \r
2064 // Re-initial Rx ring cell to owned by NIC.\r
2065 pRxD->Owner = DESC_OWN_NIC;\r
2066 \r
2067 pAdapter->CurRxIndex++;\r
2068 Count++;\r
2069 if (pAdapter->CurRxIndex >= RX_RING_SIZE)\r
2070 {\r
2071 pAdapter->CurRxIndex = 0;\r
2072 }\r
2073 \r
2074 } while (Count < RX_RING_SIZE); // We have to scan all Rx Ring\r
2075 break;\r
2076 \r
2077 default:\r
2078 break;\r
2079 \r
2080 }\r
2081 }\r
2082 \r
2083 /*\r
2084 ========================================================================\r
2085 \r
2086 Routine Description:\r
2087 Compare two memory block\r
2088 \r
2089 Arguments:\r
2090 Adapter Pointer to our adapter\r
2091 \r
2092 Return Value:\r
2093 1: memory are equal\r
2094 0: memory are not equal\r
2095 \r
2096 Note:\r
2097 \r
2098 ========================================================================\r
2099 */\r
2100 ULONG RTMPEqualMemory(\r
2101 IN PVOID pSrc1,\r
2102 IN PVOID pSrc2,\r
2103 IN ULONG Length)\r
2104 {\r
2105 PUCHAR pMem1;\r
2106 PUCHAR pMem2;\r
2107 ULONG Index = 0;\r
2108 \r
2109 pMem1 = (PUCHAR) pSrc1;\r
2110 pMem2 = (PUCHAR) pSrc2;\r
2111 \r
2112 for (Index = 0; Index < Length; Index++)\r
2113 {\r
2114 if (pMem1[Index] != pMem2[Index])\r
2115 {\r
2116 break;\r
2117 }\r
2118 }\r
2119 \r
2120 if (Index == Length)\r
2121 {\r
2122 return (1);\r
2123 }\r
2124 else\r
2125 {\r
2126 return (0);\r
2127 }\r
2128 }\r
2129 \r
2130 /*\r
2131 ========================================================================\r
2132 \r
2133 Routine Description:\r
2134 Compare two memory block\r
2135 \r
2136 Arguments:\r
2137 pSrc1 Pointer to first memory address\r
2138 pSrc2 Pointer to second memory addres\r
2139 \r
2140 Return Value:\r
2141 0: memory is equal\r
2142 1: pSrc1 memory is larger\r
2143 2: pSrc2 memory is larger\r
2144 \r
2145 Note:\r
2146 \r
2147 ========================================================================\r
2148 */\r
2149 ULONG RTMPCompareMemory(\r
2150 IN PVOID pSrc1,\r
2151 IN PVOID pSrc2,\r
2152 IN ULONG Length)\r
2153 {\r
2154 PUCHAR pMem1;\r
2155 PUCHAR pMem2;\r
2156 ULONG Index = 0;\r
2157 \r
2158 pMem1 = (PUCHAR) pSrc1;\r
2159 pMem2 = (PUCHAR) pSrc2;\r
2160 \r
2161 for (Index = 0; Index < Length; Index++)\r
2162 {\r
2163 if (pMem1[Index] > pMem2[Index])\r
2164 return (1);\r
2165 else if (pMem1[Index] < pMem2[Index])\r
2166 return (2);\r
2167 }\r
2168 \r
2169 // Equal\r
2170 return (0);\r
2171 }\r
2172 \r
2173 /*\r
2174 ========================================================================\r
2175 \r
2176 Routine Description:\r
2177 Zero out memory block\r
2178 \r
2179 Arguments:\r
2180 pSrc1 Pointer to memory address\r
2181 Length Size\r
2182 \r
2183 Return Value:\r
2184 None\r
2185 \r
2186 Note:\r
2187 \r
2188 ========================================================================\r
2189 */\r
2190 VOID NdisZeroMemory(\r
2191 IN PVOID pSrc,\r
2192 IN ULONG Length)\r
2193 {\r
2194 #if 0\r
2195 PUCHAR pMem;\r
2196 ULONG Index = 0;\r
2197 \r
2198 pMem = (PUCHAR) pSrc;\r
2199 \r
2200 for (Index = 0; Index < Length; Index++)\r
2201 {\r
2202 pMem[Index] = 0x00;\r
2203 }\r
2204 #else\r
2205 memset(pSrc, 0, Length);\r
2206 #endif\r
2207 }\r
2208 \r
2209 VOID NdisFillMemory(\r
2210 IN PVOID pSrc,\r
2211 IN ULONG Length,\r
2212 IN UCHAR Fill)\r
2213 {\r
2214 #if 0\r
2215 PUCHAR pMem;\r
2216 ULONG Index = 0;\r
2217 \r
2218 pMem = (PUCHAR) pSrc;\r
2219 \r
2220 for (Index = 0; Index < Length; Index++)\r
2221 {\r
2222 pMem[Index] = Fill;\r
2223 }\r
2224 #else\r
2225 memset(pSrc, Fill, Length);\r
2226 #endif\r
2227 }\r
2228 \r
2229 /*\r
2230 ========================================================================\r
2231 \r
2232 Routine Description:\r
2233 Copy data from memory block 1 to memory block 2\r
2234 \r
2235 Arguments:\r
2236 pDest Pointer to destination memory address\r
2237 pSrc Pointer to source memory address\r
2238 Length Copy size\r
2239 \r
2240 Return Value:\r
2241 None\r
2242 \r
2243 Note:\r
2244 \r
2245 ========================================================================\r
2246 */\r
2247 VOID NdisMoveMemory(\r
2248 OUT PVOID pDest,\r
2249 IN PVOID pSrc,\r
2250 IN ULONG Length)\r
2251 {\r
2252 #if 0\r
2253 PUCHAR pMem1;\r
2254 PUCHAR pMem2;\r
2255 ULONG Index = 0;\r
2256 \r
2257 pMem1 = (PUCHAR) pDest;\r
2258 pMem2 = (PUCHAR) pSrc;\r
2259 \r
2260 for (Index = 0; Index < Length; Index++)\r
2261 {\r
2262 pMem1[Index] = pMem2[Index];\r
2263 }\r
2264 #endif\r
2265 \r
2266 #ifdef RTMP_EMBEDDED\r
2267 if(Length <= 8)\r
2268 {\r
2269 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2270 if(--Length == 0) return;\r
2271 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2272 if(--Length == 0) return;\r
2273 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2274 if(--Length == 0) return;\r
2275 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2276 if(--Length == 0) return;\r
2277 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2278 if(--Length == 0) return;\r
2279 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2280 if(--Length == 0) return;\r
2281 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2282 if(--Length == 0) return;\r
2283 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);\r
2284 if(--Length == 0) return;\r
2285 }\r
2286 else\r
2287 memcpy(pDest, pSrc, Length);\r
2288 #else\r
2289 memcpy(pDest, pSrc, Length);\r
2290 #endif\r
2291 }\r
2292 \r
2293 /*\r
2294 ========================================================================\r
2295 \r
2296 Routine Description:\r
2297 Initialize port configuration structure\r
2298 \r
2299 Arguments:\r
2300 Adapter Pointer to our adapter\r
2301 \r
2302 Return Value:\r
2303 None\r
2304 \r
2305 Note:\r
2306 \r
2307 ========================================================================\r
2308 */\r
2309 VOID PortCfgInit(\r
2310 IN PRTMP_ADAPTER pAdapter)\r
2311 {\r
2312 UINT i;\r
2313 \r
2314 DBGPRINT(RT_DEBUG_TRACE, "--> PortCfgInit\n");\r
2315 \r
2316 pAdapter->PortCfg.UseBGProtection = 0; // 0: AUTO\r
2317 \r
2318 pAdapter->PortCfg.CapabilityInfo = 0x0000;\r
2319 pAdapter->PortCfg.Psm = PWR_ACTIVE;\r
2320 pAdapter->PortCfg.BeaconPeriod = 100; // in mSec\r
2321 \r
2322 pAdapter->PortCfg.CfpMaxDuration = 0; // never mind, decided by AP later\r
2323 pAdapter->PortCfg.CfpDurRemain = 0; // never mind, decided by AP later\r
2324 pAdapter->PortCfg.CfpCount = 0; // never mind, decided by AP later\r
2325 pAdapter->PortCfg.CfpPeriod = 0; // never mind, decided by AP later\r
2326 pAdapter->PortCfg.AuthMode = Ndis802_11AuthModeOpen;\r
2327 \r
2328 for(i = 0; i < SHARE_KEY_NO; i++) {\r
2329 pAdapter->PortCfg.SharedKey[i].KeyLen = 0;\r
2330 }\r
2331 \r
2332 for(i = 0; i < PAIRWISE_KEY_NO; i++) {\r
2333 pAdapter->PortCfg.PairwiseKey[i].KeyLen = 0;\r
2334 }\r
2335 \r
2336 for(i = 0; i < GROUP_KEY_NO; i++) {\r
2337 pAdapter->PortCfg.GroupKey[i].KeyLen = 0;\r
2338 }\r
2339 \r
2340 pAdapter->PortCfg.WepStatus = Ndis802_11EncryptionDisabled;\r
2341 pAdapter->PortCfg.DefaultKeyId = 0;\r
2342 pAdapter->PortCfg.PrivacyFilter = Ndis802_11PrivFilterAcceptAll;\r
2343 \r
2344 // 802.1x port control\r
2345 pAdapter->PortCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;\r
2346 pAdapter->PortCfg.LastMicErrorTime = 0;\r
2347 pAdapter->PortCfg.MicErrCnt = 0;\r
2348 pAdapter->PortCfg.bBlockAssoc = FALSE;\r
2349 pAdapter->PortCfg.WpaState = SS_NOTUSE;\r
2350 \r
2351 pAdapter->PortCfg.RtsThreshold = 2347;\r
2352 pAdapter->PortCfg.FragmentThreshold = 2346;\r
2353 pAdapter->PortCfg.bFragmentZeroDisable = FALSE;\r
2354 \r
2355 pAdapter->PortCfg.CurrentTxAntenna = 0xff; // diversity\r
2356 pAdapter->PortCfg.CurrentRxAntenna = 0xff; // diversity\r
2357 pAdapter->PortCfg.NumberOfAntenna = 2;\r
2358 \r
2359 // pAdapter->PortCfg.TxPowerLevel[0] = 100;\r
2360 // pAdapter->PortCfg.NumOfTxPowerLevel = 1;\r
2361 pAdapter->PortCfg.TxPower = 100; //mW\r
2362 pAdapter->PortCfg.TxPowerPercentage = 0xffffffff; // AUTO\r
2363 \r
2364 pAdapter->PortCfg.AntennaSupportTx = TRUE;\r
2365 pAdapter->PortCfg.AntennaSupportRx = TRUE;\r
2366 pAdapter->PortCfg.AntennaSupportDiversityRx = TRUE;\r
2367 \r
2368 pAdapter->PortCfg.RecvDtim = TRUE;\r
2369 NdisZeroMemory(&pAdapter->PortCfg.Bssid, MAC_ADDR_LEN);\r
2370 NdisFillMemory(&pAdapter->PortCfg.Broadcast, MAC_ADDR_LEN, 0xff);\r
2371 pAdapter->PortCfg.Pss = PWR_ACTIVE;\r
2372 pAdapter->PortCfg.RssiTrigger = 0;\r
2373 pAdapter->PortCfg.LastRssi = 0;\r
2374 pAdapter->PortCfg.AvgRssi = 0;\r
2375 pAdapter->PortCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;\r
2376 pAdapter->PortCfg.AtimWin = 0;\r
2377 pAdapter->PortCfg.Channel = 1;\r
2378 \r
2379 pAdapter->PortCfg.Aid = 1;\r
2380 \r
2381 pAdapter->PortCfg.DefaultListenCount = 3;//default listen count;\r
2382 pAdapter->PortCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_INDEP\r
2383 \r
2384 // Scott: 2005-05-05\r
2385 // Enable OFDM in Adhoc mode. This might violate WiFi spec.\r
2386 // pAdapter->PortCfg.AdhocMode = 0;\r
2387 pAdapter->PortCfg.AdhocMode = 1;\r
2388 \r
2389 pAdapter->PortCfg.SsidLen = 0;\r
2390 NdisZeroMemory(pAdapter->PortCfg.Ssid, MAX_LEN_OF_SSID); // NOT NULL-terminated\r
2391 \r
2392 // global variables mXXXX used in MAC protocol state machines\r
2393 pAdapter->PortCfg.Mibss = FALSE;\r
2394 pAdapter->PortCfg.Massoc = FALSE;\r
2395 pAdapter->PortCfg.Mauth = FALSE;\r
2396 \r
2397 // PHY specification\r
2398 pAdapter->PortCfg.PhyMode = 0xff;\r
2399 // RTMPSetPhyMode(pAdapter, PHY_11BG_MIXED); // default in 11BG mixed mode\r
2400 // pAdapter->PortCfg.Channel = FirstChannel(pAdapter);\r
2401 pAdapter->PortCfg.Dsifs = 10; // in units of usec\r
2402 pAdapter->PortCfg.TxPreambleInUsed = Rt802_11PreambleLong; // use Long preamble on TX by defaut\r
2403 \r
2404 // user desired power mode\r
2405 pAdapter->PortCfg.WindowsPowerMode = Ndis802_11PowerModeCAM; // Ndis802_11PowerModeFast_PSP;\r
2406 pAdapter->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM; // Ndis802_11PowerModeFast_PSP;\r
2407 pAdapter->PortCfg.WindowsTxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut\r
2408 pAdapter->PortCfg.WindowsACCAMEnable = FALSE;\r
2409 // pAdapter->PortCfg.PacketFilter = NDIS_PACKET_TYPE_ALL_MULTICAST | NDIS_PACKET_TYPE_DIRECTED | NDIS_PACKET_TYPE_BROADCAST;\r
2410 pAdapter->bAcceptDirect = TRUE;\r
2411 pAdapter->bAcceptMulticast = FALSE;\r
2412 pAdapter->bAcceptBroadcast = TRUE;\r
2413 pAdapter->bAcceptAllMulticast = TRUE;\r
2414 \r
2415 // parameters to be used when this STA starts a new ADHOC network\r
2416 pAdapter->PortCfg.IbssConfig.BeaconPeriod = 100;\r
2417 pAdapter->PortCfg.IbssConfig.AtimWin = 0;\r
2418 pAdapter->PortCfg.IbssConfig.Channel = 1;\r
2419 pAdapter->PortCfg.RfType = RFIC_2525;\r
2420 pAdapter->PortCfg.LedMode = LED_MODE_DEFAULT;\r
2421 RTMPInitTimer(pAdapter, &pAdapter->PortCfg.RfTuningTimer, AsicRfTuningExec);\r
2422 \r
2423 pAdapter->PortCfg.IgnoredScanNumber = 0;\r
2424 pAdapter->bTxBusy = FALSE;\r
2425 \r
2426 pAdapter->PortCfg.bHwRadio = TRUE;\r
2427 pAdapter->PortCfg.bSwRadio = TRUE;\r
2428 pAdapter->PortCfg.bRadio = TRUE;\r
2429 pAdapter->PortCfg.bHardwareRadio = FALSE; // Default is OFF\r
2430 pAdapter->PortCfg.bAutoTxAgc = FALSE; // Default is OFF\r
2431 pAdapter->PortCfg.bShowHiddenSSID = FALSE;\r
2432 \r
2433 // Nitro mode control\r
2434 pAdapter->PortCfg.EnableTxBurst = 0;\r
2435 pAdapter->PortCfg.AutoReconnect = TRUE;\r
2436 \r
2437 // Save the init time as last scan time, the system should do scan after 2 seconds.\r
2438 pAdapter->PortCfg.LastScanTime = 0;\r
2439 \r
2440 // Default Config change flag\r
2441 pAdapter->bConfigChanged = FALSE;\r
2442 \r
2443 pAdapter->PortCfg.bLocalAdminMAC = TRUE;\r
2444 \r
2445 pAdapter->NeedSwapToLittleEndian = TRUE;\r
2446 \r
2447 // dynamic BBP R17:sensibity tuning to overcome background noise\r
2448 pAdapter->PortCfg.BbpTuningEnable = TRUE; // overwritten by E2PROM setting\r
2449 pAdapter->PortCfg.VgcLowerBound = 0x38; // overwritten by E2PROM setting\r
2450 pAdapter->PortCfg.BbpTuning.FalseCcaLowerThreshold = 100;\r
2451 pAdapter->PortCfg.BbpTuning.FalseCcaUpperThreshold = 4; // unit 128, 4*128 = 512\r
2452 pAdapter->PortCfg.BbpTuning.VgcDelta = 1;\r
2453 pAdapter->PortCfg.BbpTuning.VgcUpperBound = BBP_R17_DYNAMIC_UP_BOUND;\r
2454 \r
2455 #ifdef RALINK_ATE\r
2456 memset(&pAdapter->ate, 0, sizeof(ATE_INFO));\r
2457 pAdapter->ate.Mode = ATE_STASTART;\r
2458 pAdapter->ate.TxCount = TX_RING_SIZE;\r
2459 pAdapter->ate.TxLength = PRIO_BUFFER_SIZE;\r
2460 pAdapter->ate.TxRate = RATE_11;\r
2461 pAdapter->ate.Channel = 1;\r
2462 memcpy(&pAdapter->ate.Addr1,"001122334455", ETH_LENGTH_OF_ADDRESS);\r
2463 memcpy(&pAdapter->ate.Addr2,"001122334455", ETH_LENGTH_OF_ADDRESS);\r
2464 memcpy(&pAdapter->ate.Addr3,"001122334455", ETH_LENGTH_OF_ADDRESS);\r
2465 #endif //#ifdef RALINK_ATE\r
2466 \r
2467 RTMP_IO_READ32(pAdapter, 0, &pAdapter->PortCfg.Rt2560Version);\r
2468 \r
2469 DBGPRINT(RT_DEBUG_TRACE, "<-- PortCfgInit\n");\r
2470 }\r
2471 \r
2472 UCHAR BtoH(char ch)\r
2473 {\r
2474 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals\r
2475 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits\r
2476 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits\r
2477 return(255);\r
2478 }\r
2479 \r
2480 //\r
2481 // FUNCTION: AtoH(char *, UCHAR *, int)\r
2482 //\r
2483 // PURPOSE: Converts ascii string to network order hex\r
2484 //\r
2485 // PARAMETERS:\r
2486 // src - pointer to input ascii string\r
2487 // dest - pointer to output hex\r
2488 // destlen - size of dest\r
2489 //\r
2490 // COMMENTS:\r
2491 //\r
2492 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair\r
2493 // into upper nibble and 2nd ascii byte of pair into lower nibble.\r
2494 //\r
2495 \r
2496 void AtoH(char * src, UCHAR * dest, int destlen)\r
2497 {\r
2498 char *srcptr;\r
2499 PUCHAR destTemp;\r
2500 \r
2501 srcptr = src;\r
2502 destTemp = (PUCHAR) dest;\r
2503 \r
2504 while(destlen--)\r
2505 {\r
2506 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.\r
2507 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.\r
2508 destTemp++;\r
2509 }\r
2510 }\r
2511 \r
2512 /*\r
2513 ========================================================================\r
2514 \r
2515 Routine Description:\r
2516 Init timer objects\r
2517 \r
2518 Arguments:\r
2519 pAdapter Pointer to our adapter\r
2520 pTimer Timer structure\r
2521 pTimerFunc Function to execute when timer expired\r
2522 Repeat Ture for period timer\r
2523 \r
2524 Return Value:\r
2525 None\r
2526 \r
2527 Note:\r
2528 \r
2529 ========================================================================\r
2530 */\r
2531 VOID RTMPInitTimer(\r
2532 IN PRTMP_ADAPTER pAdapter,\r
2533 IN PRALINK_TIMER_STRUCT pTimer,\r
2534 IN PVOID pTimerFunc)\r
2535 {\r
2536 pTimer->State = FALSE;\r
2537 init_timer(&pTimer->TimerObj);\r
2538 pTimer->TimerObj.data = (unsigned long)pAdapter;\r
2539 pTimer->TimerObj.function = pTimerFunc;\r
2540 }\r
2541 \r
2542 /*\r
2543 ========================================================================\r
2544 \r
2545 Routine Description:\r
2546 Init timer objects\r
2547 \r
2548 Arguments:\r
2549 pTimer Timer structure\r
2550 Value Timer value in milliseconds\r
2551 \r
2552 Return Value:\r
2553 None\r
2554 \r
2555 Note:\r
2556 \r
2557 ========================================================================\r
2558 */\r
2559 VOID RTMPSetTimer(\r
2560 IN PRTMP_ADAPTER pAdapter,\r
2561 IN PRALINK_TIMER_STRUCT pTimer,\r
2562 IN ULONG Value)\r
2563 {\r
2564 pTimer->TimerValue = Value;\r
2565 pTimer->State = FALSE;\r
2566 pTimer->TimerObj.expires = jiffies + (Value * HZ)/1000;\r
2567 add_timer(&pTimer->TimerObj);\r
2568 }\r
2569 \r
2570 /*\r
2571 ========================================================================\r
2572 \r
2573 Routine Description:\r
2574 Cancel timer objects\r
2575 \r
2576 Arguments:\r
2577 Adapter Pointer to our adapter\r
2578 \r
2579 Return Value:\r
2580 None\r
2581 \r
2582 Note:\r
2583 Reset NIC to initial state AS IS system boot up time.\r
2584 \r
2585 ========================================================================\r
2586 */\r
2587 VOID RTMPCancelTimer(\r
2588 IN PRALINK_TIMER_STRUCT pTimer)\r
2589 {\r
2590 del_timer_sync(&pTimer->TimerObj);\r
2591 }\r
2592 \r