drivers/net/wireless/rtlink.org/rtmp_init.c

   1 /*
   2  ***************************************************************************
   3  * Ralink Tech Inc.
   4  * 4F, No. 2 Technology 5th Rd.
   5  * Science-based Industrial Park
   6  * Hsin-chu, Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002, Ralink Technology, Inc.
   9  *
  10  * All rights reserved. Ralink's source code is an unpublished work and the
  11  * use of a copyright notice does not imply otherwise. This source code
  12  * contains confidential trade secret material of Ralink Tech. Any attemp
  13  * or participation in deciphering, decoding, reverse engineering or in any
  14  * way altering the source code is stricitly prohibited, unless the prior
  15  * written consent of Ralink Technology, Inc. is obtained.
  16  ***************************************************************************
  17
  18     Module Name:
  19     rtmp_init.c
  20
  21     Abstract:
  22     Miniport generic portion header file
  23
  24     Revision History:
  25     Who         When          What
  26     --------    ----------    ----------------------------------------------
  27     Paul Lin    08-01-2002    created
  28
  29 */
  30 #include    "rt_config.h"
  31
  32 //
  33 // BBP register initialization set
  34 //
  35 ULONG   BBPRegTable[] = {
  36     0x00018302,  // R03
  37     0x00018419,  // R04
  38     0x00018E1C,  // R14
  39     0x00018F30,  // R15
  40     0x000190ac,  // R16
  41     0x00019148,  // R17
  42     0x00019218,  // R18
  43     0x000193ff,  // R19
  44     0x0001941E,  // R20
  45     0x00019508,  // R21
  46     0x00019608,  // R22
  47     0x00019708,  // R23
  48     0x00019870,  // R24
  49     0x00019940,  // R25
  50     0x00019A08,  // R26
  51     0x00019B23,  // R27
  52     0x00019E10,  // R30
  53     0x00019F2B,  // R31
  54     0x0001A0B9,  // R32
  55     0x0001A212,  // R34
  56     0x0001A350,  // R35
  57     0x0001A7c4,  // R39
  58     0x0001A802,  // R40
  59     0x0001A960,  // R41
  60     0x0001B510,  // R53
  61     0x0001B618,  // R54
  62     0x0001B808,  // R56
  63     0x0001B910,  // R57
  64     0x0001BA08,  // R58
  65     0x0001BD6d,  // R61
  66     0x0001BE10,  // R62
  67 };
  68
  69 //
  70 // MAC register initialization sets
  71 //
  72 RTMP_REG_PAIR   MACRegTable[] = {
  73         {PSCSR0,0x00020002},    // 0xc8
  74         {PSCSR1,0x00000002},    // 0xcc
  75 //      {PSCSR2,0x00023f20},    // 0xd0
  76         {PSCSR2,0x00020002},    // 0xd0
  77         {PSCSR3,0x00000002},    // 0xd4
  78         {TIMECSR,0x00003f21},   // 0xDC, to slower down our 1-us tick
  79         {CSR9,  0x00000780},    // 0x24
  80         {CSR11, 0x07041483},    // 0x2C, lrc=7, src=4, slot=20us, CWmax=2^8, CWmax=2^3
  81         {CSR18, 0x00140000},    // SIFS=10us - TR switch time, PIFS=SIFS+20us
  82         {CSR19, 0x016C0028},    // DIFS=SIFS+2*20us, EIFS=364us
  83         {CNT3,  0x00000000},    // Backoff_CCA_Th, RX_&_TX_CCA_Th
  84
  85         {TXCSR1,0x07614562},    // 0x64, ACK as 1Mb time
  86         {TXCSR8,0x8c8d8b8a},    // 0x98, CCK TX BBP register ID
  87 //      {TXCSR9,0x86870885},    // 0x94, OFDM TX BBP register ID
  88
  89         {ARCSR1,0x0000000f},    // 0x9c, Basic rate set bitmap
  90         {PLCP1MCSR,0x00700400}, // 0x13c, ACK/CTS PLCP at 1 Mbps
  91         {PLCP2MCSR,0x00380401}, // 0x140, ACK/CTS PLCP at 2 Mbps
  92         {PLCP5MCSR,0x00150402}, // 0x144, ACK/CTS PLCP at 5.5 Mbps
  93         {PLCP11MCSR,0x000b8403},// 0x148, ACK/CTS PLCP at 11 Mbps
  94
  95         {ARTCSR0,0x7038140a},   // 0x14c, ACK/CTS payload consumed time for 1/2/5.5/11 mbps
  96         {ARTCSR1,0x1d21252d},   // 0x150, alexsu : OFDM ACK/CTS payload consumed time for 18/12/9/6 mbps
  97         {ARTCSR2,0x1919191d},   // 0x154, alexsu : OFDM ACK/CTS payload consumed time for 54/48/36/24 mbps
  98
  99         {RXCSR0,0xffffffff},    // 0x80
 100         {RXCSR3,0xb3aab3af},    // 0x90. RT2530 BBP 51:RSSI, R42:OFDM rate, R47:CCK SIGNAL
 101         {PCICSR,0x000003b8},    // 0x8c, alexsu : PCI control register
 102         {PWRCSR0,0x3f3b3100},   // 0xC4
 103         {GPIOCSR,0x0000ff00},   // 0x120, GPIO default value
 104         {TESTCSR,0x000000f0},   // 0x138, Test CSR, make sure it's running at normal mode
 105         {PWRCSR1,0x000001ff},   // 0xd8
 106         {MACCSR0,0x00213223},   // 0xE0, Enable Tx dribble mode - 2003/10/22:Gary
 107         {MACCSR1,0x00235518},   // 0xE4, Disable Rx Reset, tx dribble count, 2x30x16 = 960n,
 108         {MACCSR2,0x00000040},   // 0x0134, 64*33ns = 2us
 109         {RALINKCSR,0x9a009a11}, // 0xE8
 110         {CSR7,0xffffffff},      // 0x1C, Clear all pending interrupt source
 111         {LEDCSR,0x00001E46},    // default both LEDs off
 112         {BBPCSR1,0x82188200},   // for 2560+2522
 113         {TXACKCSR0,0x00000020}, // 0x110, TX ACK timeout in usec
 114         {SECCSR3,0x0000e78f},   // AES, mask off more data bit for MIC calculation
 115 };
 116
 117 #define NUM_BBP_REG_PARMS   (sizeof(BBPRegTable) / sizeof(ULONG))
 118 #define NUM_MAC_REG_PARMS   (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 119
 120 /*
 121 Routine Description:
 122         Allocate all DMA releated resources
 123
 124 Arguments:
 125         Adapter         Pointer to our adapter
 126
 127 Return Value:
 128         None
 129 Note:
 130 */
 131 NDIS_STATUS RTMPAllocDMAMemory(IN PRTMP_ADAPTER pAd)
 132 {
 133         INT             index;
 134         VOID            *ring;      // VA of ring descriptor
 135         VOID            *ring_data;     // VA of DMA data buffer
 136         dma_addr_t      ring_dma;           // PA of ring descriptor
 137         dma_addr_t      ring_data_dma;  // PA of DMA data buffer
 138         PTXD_STRUC      pTxD;       // Tx type ring descriptor
 139         PRXD_STRUC      pRxD;       // Rx type ring descriptor
 140
 141         DBGPRINT(RT_DEBUG_INFO, "--> RTMPAllocDMAMemory\n");
 142         // 1. Allocate Tx Ring DMA descriptor and buffer memory
 143         // Allocate Ring descriptors DMA block
 144 #if 0   // mask by Victor Yu. 05-18-2006
 145         ring = pci_alloc_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);
 146 #else   // add by Victor Yu. 05-18-2006
 147         ring = (VOID *)dma_alloc_coherent(NULL, TX_RING_SIZE*RING_DESCRIPTOR_SIZE, &ring_dma, GFP_DMA|GFP_KERNEL);
 148 #endif
 149         if (!ring) {
 150                 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");
 151                 goto err_out_allocate_txring;
 152         }
 153
 154         // Zero init ring descriptors
 155         memset(ring, 0, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE));
 156
 157         // Allocate Ring data DMA blocks
 158 #if 0   // maks by Victor Yu. 05-18-2006
 159         ring_data = pci_alloc_consistent(pAd->pPci_Dev, (TX_RING_SIZE * TX_BUFFER_SIZE), &ring_data_dma);
 160 #else   // add by Victor Yu. 05-18-2006
 161         ring_data = (VOID *)dma_alloc_coherent(NULL, TX_RING_SIZE*TX_BUFFER_SIZE, &ring_data_dma, GFP_DMA|GFP_KERNEL);
 162 #endif
 163
 164         // If failed, release ring descriptors DMA block & exit
 165         if (!ring_data) {
 166 #if 0   // mask by Victor Yu, 05-18-2006
 167                 pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);
 168 #else   // add by Victor Yu. 05-18-2006
 169                 dma_free_coherent(NULL, TX_RING_SIZE*RING_DESCRIPTOR_SIZE, ring, ring_dma);
 170 #endif
 171                 DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");
 172                 goto err_out_allocate_txring;
 173         }
 174
 175     // Start with Tx ring & DMA buffer
 176     for (index = 0; index < TX_RING_SIZE; index++)
 177     {
 178         // Init Tx Ring Size, Va, Pa variables
 179         pAd->TxRing[index].size = RING_DESCRIPTOR_SIZE;
 180         pAd->TxRing[index].va_addr = ring;
 181         pAd->TxRing[index].pa_addr = ring_dma;
 182         ring     += RING_DESCRIPTOR_SIZE;
 183         ring_dma += RING_DESCRIPTOR_SIZE;
 184
 185         // Init Tx DMA buffer
 186         pAd->TxRing[index].data_size = TX_BUFFER_SIZE;
 187         pAd->TxRing[index].va_data_addr = ring_data;
 188         pAd->TxRing[index].pa_data_addr = ring_data_dma;
 189         ring_data     += TX_BUFFER_SIZE;
 190         ring_data_dma += TX_BUFFER_SIZE;
 191
 192         // Write TxD buffer address & allocated buffer length
 193         pTxD = (PTXD_STRUC) pAd->TxRing[index].va_addr;
 194 #ifndef BIG_ENDIAN
 195         pTxD->BufferAddressPa = pAd->TxRing[index].pa_data_addr;
 196 #else
 197         pTxD->BufferAddressPa = SWAP32(pAd->TxRing[index].pa_data_addr);
 198 #endif
 199
 200         DBGPRINT(RT_DEBUG_INFO, "TxRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",
 201             index, (UINT)pAd->TxRing[index].va_addr, (UINT)pAd->TxRing[index].pa_addr, pAd->TxRing[index].size);
 202         DBGPRINT(RT_DEBUG_INFO, "TxRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",
 203             index, (UINT)pAd->TxRing[index].va_data_addr, (UINT)pAd->TxRing[index].pa_data_addr, pAd->TxRing[index].data_size);
 204     }
 205
 206     // 2. Allocate Prio Ring DMA descriptor and buffer memory
 207     // Allocate Ring descriptors DMA block
 208 #if 0   // mask by Victor Yu. 05-18-2006
 209     ring = pci_alloc_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);
 210 #else   // add by Victor Yu. 05-18-2006
 211         ring = (VOID *)dma_alloc_coherent(NULL, PRIO_RING_SIZE*RING_DESCRIPTOR_SIZE, &ring_dma, GFP_DMA|GFP_KERNEL);
 212 #endif
 213     if (!ring) {
 214         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");
 215         goto err_out_allocate_prioring;
 216     }
 217
 218     // Zero init ring descriptors
 219     memset(ring, 0, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE));
 220
 221     // Allocate Ring data DMA blocks
 222 #if 0   // mask by Victor Yu. 05-18-2006
 223     ring_data = pci_alloc_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE), &ring_data_dma);
 224 #else   // add by Victor Yu. 05-18-2006
 225         ring_data = (VOID *)dma_alloc_coherent(NULL, PRIO_RING_SIZE*PRIO_BUFFER_SIZE, &ring_data_dma, GFP_DMA|GFP_KERNEL);
 226 #endif
 227
 228     // If failed, release ring descriptors DMA block & exit
 229     if (!ring_data) {
 230 #if 0   // mask by Victor Yu. 05-18-2006
 231         pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);
 232 #else   // add by Victor Yu. 05-18-2006
 233         dma_free_coherent(NULL, PRIO_RING_SIZE*RING_DESCRIPTOR_SIZE, ring, ring_dma);
 234 #endif
 235         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");
 236         goto err_out_allocate_prioring;
 237     }
 238
 239     // Second with Prio ring & DMA buffer
 240     for (index = 0; index < PRIO_RING_SIZE; index++)
 241     {
 242         // Init Prio Ring Size, Va, Pa variables
 243         pAd->PrioRing[index].size = RING_DESCRIPTOR_SIZE;
 244         pAd->PrioRing[index].va_addr = ring;
 245         pAd->PrioRing[index].pa_addr = ring_dma;
 246         ring     += RING_DESCRIPTOR_SIZE;
 247         ring_dma += RING_DESCRIPTOR_SIZE;
 248
 249         // Init Prio DMA buffer
 250         pAd->PrioRing[index].data_size = PRIO_BUFFER_SIZE;
 251         pAd->PrioRing[index].va_data_addr = ring_data;
 252         pAd->PrioRing[index].pa_data_addr = ring_data_dma;
 253         ring_data     += PRIO_BUFFER_SIZE;
 254         ring_data_dma += PRIO_BUFFER_SIZE;
 255
 256         // Write TxD buffer address & allocated buffer length for priority ring
 257         pTxD = (PTXD_STRUC) pAd->PrioRing[index].va_addr;
 258 #ifndef BIG_ENDIAN
 259         pTxD->BufferAddressPa = pAd->PrioRing[index].pa_data_addr;
 260 #else
 261         pTxD->BufferAddressPa = SWAP32(pAd->PrioRing[index].pa_data_addr); // Scott: to LE
 262 #endif
 263
 264         DBGPRINT(RT_DEBUG_INFO, "PrioRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",
 265             index, (UINT)pAd->PrioRing[index].va_addr, (UINT)pAd->PrioRing[index].pa_addr, pAd->PrioRing[index].size);
 266         DBGPRINT(RT_DEBUG_INFO, "PrioRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",
 267             index, (UINT)pAd->PrioRing[index].va_data_addr, (UINT)pAd->PrioRing[index].pa_data_addr, pAd->PrioRing[index].data_size);
 268     }
 269
 270     // 3. Allocate Atim Ring DMA descriptor and buffer memory
 271     // Allocate Ring descriptors DMA block
 272 #if 0   // mask by Victor Yu. 05-18-2006
 273     ring = pci_alloc_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);
 274 #else   // add by Victor Yu. 05-18-2006
 275         ring = (VOID *)dma_alloc_coherent(NULL, ATIM_RING_SIZE*RING_DESCRIPTOR_SIZE, &ring_dma, GFP_DMA|GFP_KERNEL);
 276 #endif
 277     if (!ring) {
 278         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");
 279         goto err_out_allocate_atimring;
 280     }
 281
 282     // Zero init ring descriptors
 283     memset(ring, 0, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE));
 284
 285     // Allocate Ring data DMA blocks
 286 #if 0   // mask by Victor Yu. 05-18-2006
 287     ring_data = pci_alloc_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE), &ring_data_dma);
 288 #else   // add by Victor Yu. 05-18-2006
 289         ring_data = (VOID *)dma_alloc_coherent(NULL, ATIM_RING_SIZE*ATIM_BUFFER_SIZE, &ring_data_dma, GFP_DMA|GFP_KERNEL);
 290 #endif
 291
 292     // If failed, release ring descriptors DMA block & exit
 293     if (!ring_data) {
 294 #if 0   // mask by Victor Yu. 05-18-2006
 295         pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);
 296 #else   // add by Victor Yu. 05-18-2006
 297         dma_free_coherent(NULL, ATIM_RING_SIZE*RING_DESCRIPTOR_SIZE, ring, ring_dma);
 298 #endif
 299         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");
 300         goto err_out_allocate_atimring;
 301     }
 302
 303     // Atim ring & DMA buffer
 304     for (index = 0; index < ATIM_RING_SIZE; index++)
 305     {
 306         // Init Atim Ring Size, Va, Pa variables
 307         pAd->AtimRing[index].size = RING_DESCRIPTOR_SIZE;
 308         pAd->AtimRing[index].va_addr = ring;
 309         pAd->AtimRing[index].pa_addr = ring_dma;
 310         ring     += RING_DESCRIPTOR_SIZE;
 311         ring_dma += RING_DESCRIPTOR_SIZE;
 312
 313         // Init Atim DMA buffer
 314         pAd->AtimRing[index].data_size = ATIM_BUFFER_SIZE;
 315         pAd->AtimRing[index].va_data_addr = ring_data;
 316         pAd->AtimRing[index].pa_data_addr = ring_data_dma;
 317         ring_data     += ATIM_BUFFER_SIZE;
 318         ring_data_dma += ATIM_BUFFER_SIZE;
 319
 320         // Write TxD buffer address & allocated buffer length
 321         pTxD = (PTXD_STRUC) pAd->AtimRing[index].va_addr;
 322 #ifndef BIG_ENDIAN
 323         pTxD->BufferAddressPa = pAd->AtimRing[index].pa_data_addr;
 324 #else
 325         pTxD->BufferAddressPa = SWAP32(pAd->AtimRing[index].pa_data_addr); // Scott: to LE
 326 #endif
 327
 328         DBGPRINT(RT_DEBUG_INFO, "AtimRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",
 329             index, (UINT)pAd->AtimRing[index].va_addr, (UINT)pAd->AtimRing[index].pa_addr, pAd->AtimRing[index].size);
 330         DBGPRINT(RT_DEBUG_INFO, "AtimRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",
 331             index, (UINT)pAd->AtimRing[index].va_data_addr, (UINT)pAd->AtimRing[index].pa_data_addr, pAd->AtimRing[index].data_size);
 332     }
 333
 334     // 4. Allocate Rx Ring DMA descriptor and buffer memory
 335     // Allocate Ring descriptors DMA block
 336 #if 0   // mask by Victor Yu. 05-18-2006
 337     ring = pci_alloc_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE), &ring_dma);
 338 #else   // add by Victor Yu. 05-18-2006
 339         ring = (VOID *)dma_alloc_coherent(NULL, RX_RING_SIZE*RING_DESCRIPTOR_SIZE, &ring_dma, GFP_DMA|GFP_KERNEL);
 340 #endif
 341     if (!ring) {
 342         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");
 343         goto err_out_allocate_rxring;
 344     }
 345
 346     // Zero init ring descriptors
 347     memset(ring, 0, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE));
 348
 349     // Allocate Ring data DMA blocks
 350 #if 0   // mask by Victor Yu. 05-18-2006
 351     ring_data = pci_alloc_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RX_BUFFER_SIZE), &ring_data_dma);
 352 #else   // add by Victor Yu. 05-18-2006
 353         ring_data = (VOID *)dma_alloc_coherent(NULL, RX_RING_SIZE*RX_BUFFER_SIZE, &ring_data_dma, GFP_DMA|GFP_KERNEL);
 354 #endif
 355
 356     // If failed, release ring descriptors DMA block & exit
 357     if (!ring_data) {
 358 #if 0   // mask by Victor Yu. 05-18-2006
 359         pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE), ring, ring_dma);
 360 #else   // add by Victor Yu. 05-18-2006
 361         dma_free_coherent(NULL, RX_RING_SIZE*RING_DESCRIPTOR_SIZE, ring, ring_dma);
 362 #endif
 363         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");
 364         goto err_out_allocate_rxring;
 365     }
 366
 367     // Rx ring & DMA buffer
 368     for (index = 0; index < RX_RING_SIZE; index++)
 369     {
 370         // Init Rx Ring Size, Va, Pa variables
 371         pAd->RxRing[index].size = RING_DESCRIPTOR_SIZE;
 372         pAd->RxRing[index].va_addr = ring;
 373         pAd->RxRing[index].pa_addr = ring_dma;
 374         ring     += RING_DESCRIPTOR_SIZE;
 375         ring_dma += RING_DESCRIPTOR_SIZE;
 376
 377         // Init Rx DMA buffer
 378         pAd->RxRing[index].data_size = RX_BUFFER_SIZE;
 379         pAd->RxRing[index].va_data_addr = ring_data;
 380         pAd->RxRing[index].pa_data_addr = ring_data_dma;
 381         ring_data     += RX_BUFFER_SIZE;
 382         ring_data_dma += RX_BUFFER_SIZE;
 383
 384         // Write RxD buffer address & allocated buffer length
 385         pRxD = (PRXD_STRUC) pAd->RxRing[index].va_addr;
 386 #ifndef BIG_ENDIAN
 387         pRxD->BufferAddressPa = pAd->RxRing[index].pa_data_addr;
 388 #else
 389         pRxD->BufferAddressPa = SWAP32(pAd->RxRing[index].pa_data_addr); // Scott: to LE
 390 #endif
 391         // Rx owner bit assign to NIC immediately
 392         pRxD->Owner = DESC_OWN_NIC;
 393
 394 #ifdef BIG_ENDIAN
 395                 RTMPDescriptorEndianChange((PUCHAR)pRxD, TYPE_RXD); // Scott: to LE
 396 #endif
 397
 398         DBGPRINT(RT_DEBUG_INFO, "RxRing[%d] va = 0x%x, pa = 0x%x, size = 0x%x\n",
 399             index, (UINT)pAd->RxRing[index].va_addr, (UINT)pAd->RxRing[index].pa_addr, pAd->RxRing[index].size);
 400         DBGPRINT(RT_DEBUG_INFO, "RxRing[%d] va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",
 401             index, (UINT)pAd->RxRing[index].va_data_addr, (UINT)pAd->RxRing[index].pa_data_addr, pAd->RxRing[index].data_size);
 402     }
 403
 404     // 5. Allocate Beacon Ring DMA descriptor and buffer memory
 405     // Init Beacon Ring Size, Va, Pa variables
 406 #if 0   // mask by Victor Yu. 05-18-2006
 407     ring = pci_alloc_consistent(pAd->pPci_Dev, RING_DESCRIPTOR_SIZE, &ring_dma);
 408 #else   // add by Victor Yu. 05-18-2006
 409         ring = (VOID *)dma_alloc_coherent(NULL, RING_DESCRIPTOR_SIZE, &ring_dma, GFP_DMA|GFP_KERNEL);
 410 #endif
 411     if (!ring) {
 412         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring descriptor memory.\n");
 413         goto err_out_allocate_beaconring;
 414     }
 415
 416     // Zero init ring descriptors
 417     memset(ring, 0, (RING_DESCRIPTOR_SIZE));
 418
 419     // Allocate Ring data DMA blocks
 420 #if 0   // mask by Victor Yu. 05-18-2006
 421     ring_data = pci_alloc_consistent(pAd->pPci_Dev, BEACON_BUFFER_SIZE, &ring_data_dma);
 422 #else   // add by Victor Yu. 05-18-2006
 423         ring_data = (VOID *)dma_alloc_coherent(NULL, BEACON_BUFFER_SIZE, &ring_data_dma, GFP_DMA|GFP_KERNEL);
 424 #endif
 425
 426     // If failed, release ring descriptors DMA block & exit
 427     if (!ring_data) {
 428 #if 0   // mask by Victor Yu. 05-18-2006
 429         pci_free_consistent(pAd->pPci_Dev, RING_DESCRIPTOR_SIZE, ring, ring_dma);
 430 #else   // add by Victor Yu. 05-18-2006
 431         dma_free_coherent(NULL, RING_DESCRIPTOR_SIZE, ring, ring_dma);
 432 #endif
 433         DBGPRINT(RT_DEBUG_ERROR, "Could not allocate DMA ring buffer memory.\n");
 434         goto err_out_allocate_beaconring;
 435     }
 436
 437     pAd->BeaconRing.size = RING_DESCRIPTOR_SIZE;
 438     pAd->BeaconRing.va_addr = ring;
 439     pAd->BeaconRing.pa_addr = ring_dma;
 440
 441     // Init Beacon DMA buffer
 442     pAd->BeaconRing.data_size = BEACON_BUFFER_SIZE;
 443     pAd->BeaconRing.va_data_addr = ring_data;
 444     pAd->BeaconRing.pa_data_addr = ring_data_dma;
 445
 446     // Write RxD buffer address & allocated buffer length
 447     pTxD = (PTXD_STRUC) pAd->BeaconRing.va_addr;
 448 #ifndef BIG_ENDIAN
 449     pTxD->BufferAddressPa = pAd->BeaconRing.pa_data_addr;
 450 #else
 451     pTxD->BufferAddressPa = SWAP32(pAd->BeaconRing.pa_data_addr); // Scott: to LE
 452 #endif
 453
 454     DBGPRINT(RT_DEBUG_INFO, "BeaconRing va = 0x%x, pa = 0x%x, size = 0x%x\n",
 455             (UINT)pAd->BeaconRing.va_addr, (UINT)pAd->BeaconRing.pa_addr, pAd->BeaconRing.size);
 456     DBGPRINT(RT_DEBUG_INFO, "BeaconRing va_data = 0x%x, pa_data = 0x%x, size = 0x%x\n",
 457             (UINT)pAd->BeaconRing.va_data_addr, (UINT)pAd->BeaconRing.pa_data_addr, pAd->BeaconRing.data_size);
 458
 459     DBGPRINT(RT_DEBUG_INFO, "<-- RTMPAllocDMAMemory\n");
 460     return NDIS_STATUS_SUCCESS;
 461
 462
 463 err_out_allocate_beaconring:
 464 #if 0   // mask by Victor Yu. 05-18-2006
 465     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 466     pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RX_BUFFER_SIZE),
 467         pAd->RxRing[0].va_data_addr, pAd->RxRing[0].pa_data_addr);
 468     // Free ring descriptor second, the start address is the same as TxRing first elment
 469     pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE),
 470         pAd->RxRing[0].va_addr, pAd->RxRing[0].pa_addr);
 471 #else   // add by Victor Yu. 05-18-2006
 472         dma_free_coherent(NULL, RX_RING_SIZE*RX_BUFFER_SIZE, pAd->RxRing[0].va_data_addr, pAd->RxRing[0].pa_data_addr);
 473         dma_free_coherent(NULL, RX_RING_SIZE*RING_DESCRIPTOR_SIZE, pAd->RxRing[0].va_addr, pAd->RxRing[0].pa_addr);
 474 #endif
 475 err_out_allocate_rxring:
 476 #if 0   // mask by Victor Yu. 05-18-2006
 477     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 478     pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE),
 479         pAd->AtimRing[0].va_data_addr, pAd->AtimRing[0].pa_data_addr);
 480     // Free ring descriptor second, the start address is the same as TxRing first elment
 481     pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE),
 482         pAd->AtimRing[0].va_addr, pAd->AtimRing[0].pa_addr);
 483 #else   // add by Victor Yu. 05-18-2006
 484         dma_free_coherent(NULL, ATIM_RING_SIZE*ATIM_BUFFER_SIZE, pAd->AtimRing[0].va_data_addr, pAd->AtimRing[0].pa_data_addr);
 485         dma_free_coherent(NULL, ATIM_RING_SIZE*RING_DESCRIPTOR_SIZE, pAd->AtimRing[0].va_addr, pAd->AtimRing[0].pa_addr);
 486 #endif
 487 err_out_allocate_atimring:
 488 #if 0   // mask by Victor Yu. 05-18-2006
 489     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 490     pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE),
 491         pAd->PrioRing[0].va_data_addr, pAd->PrioRing[0].pa_data_addr);
 492     // Free ring descriptor second, the start address is the same as TxRing first elment
 493     pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE),
 494         pAd->PrioRing[0].va_addr, pAd->PrioRing[0].pa_addr);
 495 #else   // add by Victor Yu. 05-18-2006
 496         dma_free_coherent(NULL, PRIO_RING_SIZE*PRIO_BUFFER_SIZE, pAd->PrioRing[0].va_data_addr, pAd->PrioRing[0].pa_data_addr);
 497         dma_free_coherent(NULL, PRIO_RING_SIZE*RING_DESCRIPTOR_SIZE, pAd->PrioRing[0].va_addr, pAd->PrioRing[0].pa_addr);
 498 #endif
 499 err_out_allocate_prioring:
 500 #if 0   // mask by Victor Yu. 05-18-2006
 501     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 502     pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * TX_BUFFER_SIZE),
 503         pAd->TxRing[0].va_data_addr, pAd->TxRing[0].pa_data_addr);
 504     // Free ring descriptor second, the start address is the same as TxRing first elment
 505     pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE),
 506         pAd->TxRing[0].va_addr, pAd->TxRing[0].pa_addr);
 507 #else   // add by Victor Yu. 05-18-2006
 508         dma_free_coherent(NULL, TX_RING_SIZE*TX_BUFFER_SIZE, pAd->TxRing[0].va_data_addr, pAd->TxRing[0].pa_data_addr);
 509         dma_free_coherent(NULL, TX_RING_SIZE*RING_DESCRIPTOR_SIZE, pAd->TxRing[0].va_addr, pAd->TxRing[0].pa_addr);
 510 #endif
 511 err_out_allocate_txring:
 512     DBGPRINT(RT_DEBUG_ERROR, "<-- RTMPAllocDMAMemory (memory not allocate successfully!)\n");
 513
 514     return -ENOMEM;
 515 }
 516
 517 /*
 518     ========================================================================
 519
 520     Routine Description:
 521         Free all DMA memory.
 522
 523     Arguments:
 524         Adapter         Pointer to our adapter
 525
 526     Return Value:
 527         None
 528
 529     Note:
 530
 531     ========================================================================
 532 */
 533 VOID    RTMPFreeDMAMemory(
 534     IN  PRTMP_ADAPTER   pAd)
 535 {
 536     DBGPRINT(RT_DEBUG_INFO, "--> RTMPFreeDMAMemory\n");
 537
 538 #if 0   // mask by Victor Yu. 05-18-2006
 539     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 540     pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * TX_BUFFER_SIZE),
 541         pAd->TxRing[0].va_data_addr, pAd->TxRing[0].pa_data_addr);
 542     // Free ring descriptor second, the start address is the same as TxRing first elment
 543     pci_free_consistent(pAd->pPci_Dev, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE),
 544         pAd->TxRing[0].va_addr, pAd->TxRing[0].pa_addr);
 545
 546     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 547     pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE),
 548         pAd->PrioRing[0].va_data_addr, pAd->PrioRing[0].pa_data_addr);
 549     // Free ring descriptor second, the start address is the same as TxRing first elment
 550     pci_free_consistent(pAd->pPci_Dev, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE),
 551         pAd->PrioRing[0].va_addr, pAd->PrioRing[0].pa_addr);
 552
 553     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 554     pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE),
 555         pAd->AtimRing[0].va_data_addr, pAd->AtimRing[0].pa_data_addr);
 556     // Free ring descriptor second, the start address is the same as TxRing first elment
 557     pci_free_consistent(pAd->pPci_Dev, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE),
 558         pAd->AtimRing[0].va_addr, pAd->AtimRing[0].pa_addr);
 559
 560     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 561     pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RX_BUFFER_SIZE),
 562         pAd->RxRing[0].va_data_addr, pAd->RxRing[0].pa_data_addr);
 563     // Free ring descriptor second, the start address is the same as TxRing first elment
 564     pci_free_consistent(pAd->pPci_Dev, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE),
 565         pAd->RxRing[0].va_addr, pAd->RxRing[0].pa_addr);
 566
 567     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 568     pci_free_consistent(pAd->pPci_Dev, (BEACON_RING_SIZE * BEACON_BUFFER_SIZE),
 569         pAd->BeaconRing.va_data_addr, pAd->BeaconRing.pa_data_addr);
 570     // Free ring descriptor second, the start address is the same as TxRing first elment
 571     pci_free_consistent(pAd->pPci_Dev, (BEACON_RING_SIZE * RING_DESCRIPTOR_SIZE),
 572         pAd->BeaconRing.va_addr, pAd->BeaconRing.pa_addr);
 573 #else   // add by Victor Yu. 05-18-2006
 574     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 575     dma_free_coherent(NULL, (TX_RING_SIZE * TX_BUFFER_SIZE),
 576         pAd->TxRing[0].va_data_addr, pAd->TxRing[0].pa_data_addr);
 577     // Free ring descriptor second, the start address is the same as TxRing first elment
 578     dma_free_coherent(NULL, (TX_RING_SIZE * RING_DESCRIPTOR_SIZE),
 579         pAd->TxRing[0].va_addr, pAd->TxRing[0].pa_addr);
 580
 581     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 582     dma_free_coherent(NULL, (PRIO_RING_SIZE * PRIO_BUFFER_SIZE),
 583         pAd->PrioRing[0].va_data_addr, pAd->PrioRing[0].pa_data_addr);
 584     // Free ring descriptor second, the start address is the same as TxRing first elment
 585     dma_free_coherent(NULL, (PRIO_RING_SIZE * RING_DESCRIPTOR_SIZE),
 586         pAd->PrioRing[0].va_addr, pAd->PrioRing[0].pa_addr);
 587
 588     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 589     dma_free_coherent(NULL, (ATIM_RING_SIZE * ATIM_BUFFER_SIZE),
 590         pAd->AtimRing[0].va_data_addr, pAd->AtimRing[0].pa_data_addr);
 591     // Free ring descriptor second, the start address is the same as TxRing first elment
 592     dma_free_coherent(NULL, (ATIM_RING_SIZE * RING_DESCRIPTOR_SIZE),
 593         pAd->AtimRing[0].va_addr, pAd->AtimRing[0].pa_addr);
 594
 595     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 596     dma_free_coherent(NULL, (RX_RING_SIZE * RX_BUFFER_SIZE),
 597         pAd->RxRing[0].va_data_addr, pAd->RxRing[0].pa_data_addr);
 598     // Free ring descriptor second, the start address is the same as TxRing first elment
 599     dma_free_coherent(NULL, (RX_RING_SIZE * RING_DESCRIPTOR_SIZE),
 600         pAd->RxRing[0].va_addr, pAd->RxRing[0].pa_addr);
 601
 602     // Free data DMA blocks first, the start address is the same as TxRing first DMA data block
 603     dma_free_coherent(NULL, (BEACON_RING_SIZE * BEACON_BUFFER_SIZE),
 604         pAd->BeaconRing.va_data_addr, pAd->BeaconRing.pa_data_addr);
 605     // Free ring descriptor second, the start address is the same as TxRing first elment
 606     dma_free_coherent(NULL, (BEACON_RING_SIZE * RING_DESCRIPTOR_SIZE),
 607         pAd->BeaconRing.va_addr, pAd->BeaconRing.pa_addr);
 608 #endif
 609
 610 }
 611
 612 /*
 613     ========================================================================
 614
 615     Routine Description:
 616         Initialize transmit data structures
 617
 618     Arguments:
 619         Adapter                     Pointer to our adapter
 620
 621     Return Value:
 622         None
 623
 624     Note:
 625         Initialize all transmit releated private buffer, include those define
 626         in RTMP_ADAPTER structure and all private data structures.
 627
 628     ========================================================================
 629 */
 630 VOID    NICInitTransmit(
 631     IN  PRTMP_ADAPTER   pAdapter)
 632 {
 633     DBGPRINT(RT_DEBUG_TRACE, "--> NICInitTransmit\n");
 634
 635     // Initialize all Transmit releated queues
 636     InitializeQueueHeader(&pAdapter->TxSwQueue0);
 637     InitializeQueueHeader(&pAdapter->TxSwQueue1);
 638     InitializeQueueHeader(&pAdapter->TxSwQueue2);
 639     InitializeQueueHeader(&pAdapter->TxSwQueue3);
 640
 641     // Init Ring index pointer
 642     pAdapter->CurRxIndex           = 0;
 643     pAdapter->CurDecryptIndex      = 0;
 644     pAdapter->CurTxIndex           = 0;
 645     pAdapter->CurEncryptIndex      = 0;
 646     pAdapter->CurAtimIndex         = 0;
 647     pAdapter->CurPrioIndex         = 0;
 648     pAdapter->NextEncryptDoneIndex = 0;
 649     pAdapter->NextTxDoneIndex      = 0;
 650     pAdapter->NextAtimDoneIndex    = 0;
 651     pAdapter->NextPrioDoneIndex    = 0;
 652     pAdapter->NextDecryptDoneIndex = 0;
 653     pAdapter->PushMgmtIndex        = 0;
 654     pAdapter->PopMgmtIndex         = 0;
 655     pAdapter->MgmtQueueSize        = 0;
 656
 657     pAdapter->PrivateInfo.TxRingFullCnt       = 0;
 658
 659     DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitTransmit\n");
 660 }
 661
 662 inline  VOID    NICDisableInterrupt(
 663     IN  PRTMP_ADAPTER   pAd)
 664 {
 665     RTMP_IO_WRITE32(pAd, CSR8, 0xFFFF);
 666     RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE);
 667 }
 668
 669 inline  VOID    NICEnableInterrupt(
 670     IN  PRTMP_ADAPTER   pAd)
 671 {
 672     // 0xFF37 : Txdone & Rxdone, 0xFF07: Txdonw, Rxdone, PrioDone, AtimDone,
 673     RTMP_IO_WRITE32(pAd, CSR8, 0xFE14);
 674     RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE);
 675 }
 676
 677 /*
 678     ========================================================================
 679
 680     Routine Description:
 681         Read additional information from EEPROM, such as MAC address
 682
 683     Arguments:
 684         Adapter                     Pointer to our adapter
 685
 686     Return Value:
 687         NDIS_STATUS_SUCCESS
 688         NDIS_STATUS_FAILURE
 689
 690     Note:
 691
 692     ========================================================================
 693 */
 694 NDIS_STATUS NICReadAdapterInfo(
 695     IN  PRTMP_ADAPTER       pAd)
 696 {
 697     CSR3_STRUC      StaMacReg0;
 698     CSR4_STRUC      StaMacReg1;
 699     NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
 700
 701     //
 702     // Read MAC address from CSR3 & CSR4, these CSRs reflects real value
 703     // stored with EEPROM.
 704     //
 705     RTMP_IO_READ32(pAd, CSR3, &StaMacReg0.word);
 706     RTMP_IO_READ32(pAd, CSR4, &StaMacReg1.word);
 707     pAd->PermanentAddress[0] = StaMacReg0.field.Byte0;
 708     pAd->PermanentAddress[1] = StaMacReg0.field.Byte1;
 709     pAd->PermanentAddress[2] = StaMacReg0.field.Byte2;
 710     pAd->PermanentAddress[3] = StaMacReg0.field.Byte3;
 711     pAd->PermanentAddress[4] = StaMacReg1.field.Byte4;
 712     pAd->PermanentAddress[5] = StaMacReg1.field.Byte5;
 713     // Set Current address to permanet address.
 714     // TODO: put current address check within registery read out
 715     pAd->CurrentAddress[0] = pAd->PermanentAddress[0];
 716     pAd->CurrentAddress[1] = pAd->PermanentAddress[1];
 717     pAd->CurrentAddress[2] = pAd->PermanentAddress[2];
 718     pAd->CurrentAddress[3] = pAd->PermanentAddress[3];
 719     pAd->CurrentAddress[4] = pAd->PermanentAddress[4];
 720     pAd->CurrentAddress[5] = pAd->PermanentAddress[5];
 721
 722     return Status;
 723 }
 724
 725 /*
 726     ========================================================================
 727
 728     Routine Description:
 729         Read initial parameters from EEPROM
 730
 731     Arguments:
 732         Adapter                     Pointer to our adapter
 733
 734     Return Value:
 735         None
 736
 737     Note:
 738
 739     ========================================================================
 740 */
 741 VOID    NICReadEEPROMParameters(
 742     IN  PRTMP_ADAPTER   pAdapter)
 743 {
 744     ULONG           data;
 745     USHORT          i, value;
 746     UCHAR               TmpPhy;
 747     EEPROM_TX_PWR_STRUC Power;
 748     EEPROM_VERSION_STRUC    Version;
 749     EEPROM_ANTENNA_STRUC        Antenna;
 750
 751     DBGPRINT(RT_DEBUG_TRACE, "--> NICReadEEPROMParameters\n");
 752
 753     // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
 754     RTMP_IO_READ32(pAdapter, CSR21, &data);
 755
 756     if(data & 0x20)
 757         pAdapter->EEPROMAddressNum = 6;
 758     else
 759         pAdapter->EEPROMAddressNum = 8;
 760
 761     // if E2PROM version mismatch with driver's expectation, then skip
 762     // all subsequent E2RPOM retieval and set a system error bit to notify GUI
 763     Version.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_VERSION_OFFSET);
 764     if (Version.field.Version != VALID_EEPROM_VERSION)
 765     {
 766         DBGPRINT(RT_DEBUG_ERROR, "WRONG E2PROM VERSION %d, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION);
 767         pAdapter->PortCfg.SystemErrorBitmap |= 0x00000001;
 768         return;
 769     }
 770
 771     // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAdapter
 772     for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
 773     {
 774         value = RTMP_EEPROM_READ16(pAdapter, EEPROM_BBP_BASE_OFFSET + i*2);
 775
 776         pAdapter->EEPROMDefaultValue[i] = value;
 777     }
 778
 779 #if 1
 780     // We have to parse NIC configuration 0 at here.
 781         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
 782         // Therefore, we have to read TxAutoAgc control beforehand.
 783         // Read Tx AGC control bit
 784         Antenna.word = pAdapter->EEPROMDefaultValue[0];
 785         if (Antenna.field.DynamicTxAgcControl == 1)
 786                 pAdapter->PortCfg.bAutoTxAgc = TRUE;
 787         else
 788                 pAdapter->PortCfg.bAutoTxAgc = FALSE;
 789
 790     // Read Tx power value for all 14 channels
 791     // Value from 1 - 0x7f. Default value is 24.
 792     for (i = 0; i < NUM_EEPROM_TX_PARMS; i++)
 793     {
 794         Power.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_TX_PWR_OFFSET + i*2);
 795         pAdapter->PortCfg.ChannelTxPower[i * 2]     = ((Power.field.Byte0 > 32) ? 24 : Power.field.Byte0);
 796         pAdapter->PortCfg.ChannelTxPower[i * 2 + 1] = ((Power.field.Byte1 > 32) ? 24 : Power.field.Byte1);
 797     }
 798
 799     // Read Tx TSSI reference value, OK to reuse Power data structure
 800         for (i = 0; i < NUM_EEPROM_TX_PARMS; i++)
 801         {
 802                 Power.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_TSSI_REF_OFFSET + i * 2);
 803                 pAdapter->PortCfg.ChannelTssiRef[i * 2]     = Power.field.Byte0;
 804                 pAdapter->PortCfg.ChannelTssiRef[i * 2 + 1] = Power.field.Byte1;
 805                 // Disable TxAgc if the value is not right
 806                 if ((pAdapter->PortCfg.ChannelTssiRef[i * 2] == 0xff) ||
 807                         (pAdapter->PortCfg.ChannelTssiRef[i * 2 + 1] == 0xff))
 808                         pAdapter->PortCfg.bAutoTxAgc = FALSE;
 809         }
 810
 811         // Tx Tssi delta offset 0x24
 812         Power.word = RTMP_EEPROM_READ16(pAdapter, EEPROM_TSSI_DELTA_OFFSET);
 813         pAdapter->PortCfg.ChannelTssiDelta = Power.field.Byte0;
 814
 815 #endif
 816
 817     //CountryRegion byte offset = 0x35
 818     value = pAdapter->EEPROMDefaultValue[2] >> 8;
 819     if ((value <= 7))
 820     {
 821          pAdapter->PortCfg.CountryRegion = (UCHAR) value;
 822          TmpPhy = pAdapter->PortCfg.PhyMode;
 823          pAdapter->PortCfg.PhyMode = 0xff;
 824          RTMPSetPhyMode(pAdapter, TmpPhy);
 825     }
 826     DBGPRINT(RT_DEBUG_TRACE, "<-- NICReadEEPROMParameters\n");
 827 }
 828
 829 /*
 830     ========================================================================
 831
 832     Routine Description:
 833         Set default value from EEPROM
 834
 835     Arguments:
 836         Adapter                     Pointer to our adapter
 837
 838     Return Value:
 839         None
 840
 841     Note:
 842
 843     ========================================================================
 844 */
 845 VOID    NICInitAsicFromEEPROM(
 846     IN  PRTMP_ADAPTER   pAdapter)
 847 {
 848         ULONG                                   data, BbpCsr1;
 849         USHORT                                  i, value;
 850         UCHAR                                   TxValue,RxValue;
 851         EEPROM_ANTENNA_STRUC    Antenna;
 852         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
 853
 854         DBGPRINT(RT_DEBUG_TRACE, "--> NICInitAsicFromEEPROM\n");
 855
 856         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
 857         {
 858                 value = pAdapter->EEPROMDefaultValue[i];
 859
 860                 if((value != 0xFFFF) && (value != 0))
 861                 {
 862                         data = value | 0x18000;
 863                         RTMP_BBP_IO_WRITE32(pAdapter, data);
 864                 }
 865         }
 866
 867         Antenna.word = pAdapter->EEPROMDefaultValue[0];
 868
 869         if ((Antenna.word == 0xFFFF) || (Antenna.field.TxDefaultAntenna > 2) || (Antenna.field.RxDefaultAntenna > 2))
 870         {
 871         DBGPRINT(RT_DEBUG_TRACE, "E2PROM error(=0x%04x), hard code as 0x0002\n", Antenna.word);
 872         Antenna.word = 0x0002;
 873         }
 874
 875         pAdapter->PortCfg.NumberOfAntenna = 2;  // (UCHAR)Antenna.field.NumOfAntenna;
 876         pAdapter->PortCfg.CurrentTxAntenna = (UCHAR)Antenna.field.TxDefaultAntenna;
 877         pAdapter->PortCfg.CurrentRxAntenna = (UCHAR)Antenna.field.RxDefaultAntenna;
 878     pAdapter->PortCfg.RfType = (UCHAR) Antenna.field.RfType;
 879
 880         RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, BBP_Tx_Configure, &TxValue);
 881         RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, BBP_Rx_Configure, &RxValue);
 882         RTMP_IO_READ32(pAdapter, BBPCSR1, &BbpCsr1);
 883
 884         // Tx antenna select
 885     if(Antenna.field.TxDefaultAntenna == 1)       // Antenna A
 886     {
 887                 TxValue = (TxValue & 0xFC) | 0x00;
 888                 BbpCsr1 = (BbpCsr1 & 0xFFFCFFFC) | 0x00000000;
 889         }
 890         else if(Antenna.field.TxDefaultAntenna == 2)  // Antenna B
 891         {
 892                 TxValue = (TxValue & 0xFC) | 0x02;
 893                 BbpCsr1 = (BbpCsr1 & 0xFFFCFFFC) | 0x00020002;
 894         }
 895         else                                          // diverity - start from Antenna B
 896         {
 897                 TxValue = (TxValue & 0xFC) | 0x02;
 898                 BbpCsr1 = (BbpCsr1 & 0xFFFCFFFC) | 0x00020002;
 899         }
 900
 901         // Rx antenna select
 902         if(Antenna.field.RxDefaultAntenna == 1)       // Antenna A
 903                 RxValue = (RxValue & 0xFC) | 0x00;
 904         else if(Antenna.field.RxDefaultAntenna == 2)  // Antenna B
 905                 RxValue = (RxValue & 0xFC) | 0x02;
 906         else                                          // Antenna Diversity
 907                 RxValue = (RxValue & 0xFC) | 0x02;
 908
 909     // RT5222 needs special treatment to swap TX I/Q
 910     if (pAdapter->PortCfg.RfType == RFIC_5222)
 911     {
 912         BbpCsr1 |= 0x00040004;
 913         TxValue |= 0x04;         // TX I/Q flip
 914     }
 915     // RT2525E need to flip TX I/Q but not RX I/Q
 916     else if (pAdapter->PortCfg.RfType == RFIC_2525E)
 917     {
 918         BbpCsr1 |= 0x00040004;
 919         TxValue |= 0x04;         // TX I/Q flip
 920         RxValue &= 0xfb;         // RX I/Q no flip
 921     }
 922
 923         // Change to match microsoft definition, 0xff: diversity, 0: A, 1: B
 924         pAdapter->PortCfg.CurrentTxAntenna--;
 925         pAdapter->PortCfg.CurrentRxAntenna--;
 926
 927         RTMP_IO_WRITE32(pAdapter, BBPCSR1, BbpCsr1);
 928         RTMP_BBP_IO_WRITE32_BY_REG_ID(pAdapter, BBP_Tx_Configure, TxValue);
 929         RTMP_BBP_IO_WRITE32_BY_REG_ID(pAdapter, BBP_Rx_Configure, RxValue);
 930
 931     // 2003-12-16 software-based RX antenna diversity
 932     // pAdapter->PortCfg.CurrentRxAntenna = 0xff;   // Diversity ON
 933     AsicSetRxAnt(pAdapter);
 934
 935         if (Antenna.field.LedMode == LED_MODE_TXRX_ACTIVITY)
 936             pAdapter->PortCfg.LedMode = LED_MODE_TXRX_ACTIVITY;
 937     else if (Antenna.field.LedMode == LED_MODE_SINGLE)
 938         {
 939         pAdapter->PortCfg.LedMode = LED_MODE_SINGLE;
 940         ASIC_LED_ACT_ON(pAdapter);
 941     }
 942     else if (Antenna.field.LedMode == LED_MODE_ASUS)
 943         {
 944         pAdapter->PortCfg.LedMode = LED_MODE_ASUS;
 945                 RTMP_IO_WRITE32(pAdapter, LEDCSR, 0x0002461E);
 946     }
 947         else
 948             pAdapter->PortCfg.LedMode = LED_MODE_DEFAULT;
 949
 950         // Read Hardware controlled Radio state enable bit
 951     if (Antenna.field.HardwareRadioControl == 1)
 952         {
 953             pAdapter->PortCfg.bHardwareRadio = TRUE;
 954
 955             // Read GPIO pin0 as Hardware controlled radio state
 956             RTMP_IO_READ32(pAdapter, GPIOCSR, &data);
 957             if ((data & 0x01) == 0)
 958             {
 959                     pAdapter->PortCfg.bHwRadio = FALSE;
 960                     pAdapter->PortCfg.bRadio = FALSE;
 961                     RTMP_IO_WRITE32(pAdapter, PWRCSR0, 0x00000000);
 962                     RTMP_SET_FLAG(pAdapter, fRTMP_ADAPTER_RADIO_OFF);
 963                     if (pAdapter->PortCfg.LedMode == LED_MODE_ASUS)
 964                         {
 965                             // Turn bit 17 for Radio OFF
 966                             RTMP_IO_WRITE32(pAdapter, LEDCSR, 0x0000461E);
 967                     }
 968             }
 969     }
 970     else
 971             pAdapter->PortCfg.bHardwareRadio = FALSE;
 972
 973         NicConfig2.word = pAdapter->EEPROMDefaultValue[1];
 974         if (NicConfig2.word == 0xffff)
 975     {
 976         DBGPRINT(RT_DEBUG_TRACE, "++++++++++empty E2PROM, use default\n");
 977             NicConfig2.word = 0;    // empty E2PROM, use default
 978     }
 979         // for dynamic BBP R17:RX sensibility tuning
 980         {
 981             UCHAR r17;
 982             RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, 17, &r17);
 983         DBGPRINT(RT_DEBUG_TRACE, "+++++++++++++NicConfig2.field.DynamicBbpTuning=%d\n", NicConfig2.field.DynamicBbpTuning)
 984             pAdapter->PortCfg.BbpTuningEnable = (NicConfig2.field.DynamicBbpTuning==0)? 1:0;
 985             pAdapter->PortCfg.VgcLowerBound   = r17;
 986
 987         // 2004-3-4 per David's request, R7 starts at upper bound
 988         pAdapter->PortCfg.BbpTuning.VgcUpperBound = BBP_R17_DYNAMIC_UP_BOUND;
 989             r17 = pAdapter->PortCfg.BbpTuning.VgcUpperBound;
 990             pAdapter->PortCfg.LastR17Value = r17;
 991             RTMP_BBP_IO_WRITE32_BY_REG_ID(pAdapter, 17, r17);
 992
 993         // 2004-2-2 per David's request, lower R17 low-bound for very good quality NIC
 994             pAdapter->PortCfg.VgcLowerBound -= 6;
 995             DBGPRINT(RT_DEBUG_TRACE,"R17 tuning enable=%d, R17=0x%02x, range=<0x%02x, 0x%02x>\n",
 996                 pAdapter->PortCfg.BbpTuningEnable, r17, pAdapter->PortCfg.VgcLowerBound, pAdapter->PortCfg.BbpTuning.VgcUpperBound);
 997         }
 998
 999         DBGPRINT(RT_DEBUG_TRACE, "RF IC=%d, LED mode=%d\n", pAdapter->PortCfg.RfType, pAdapter->PortCfg.LedMode);
1000
1001         DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitAsicFromEEPROM\n");
1002 }
1003
1004 void NICInitializeAdapter(IN    PRTMP_ADAPTER   pAdapter)
1005 {
1006     TXCSR2_STRUC    TxCSR2;
1007     RXCSR1_STRUC    RxCSR1;
1008     ULONG           Value;
1009
1010     DBGPRINT(RT_DEBUG_TRACE, "--> NICInitializeAdapter\n");
1011
1012     // Init spin locks
1013     NdisAllocateSpinLock(&pAdapter->TxRingLock);
1014     NdisAllocateSpinLock(&pAdapter->PrioRingLock);
1015     NdisAllocateSpinLock(&pAdapter->AtimRingLock);
1016     NdisAllocateSpinLock(&pAdapter->RxRingLock);
1017     NdisAllocateSpinLock(&pAdapter->TxSwQueueLock);
1018     NdisAllocateSpinLock(&pAdapter->MemLock);
1019
1020     // Write TXCSR2 register
1021     TxCSR2.field.TxDSize = RING_DESCRIPTOR_SIZE;
1022     TxCSR2.field.NumTxD  = TX_RING_SIZE;
1023     TxCSR2.field.NumAtimD  = ATIM_RING_SIZE;
1024     TxCSR2.field.NumPrioD  = PRIO_RING_SIZE;
1025     RTMP_IO_WRITE32(pAdapter, TXCSR2, TxCSR2.word);
1026
1027     // Write TXCSR3 register
1028     Value = pAdapter->TxRing[0].pa_addr;
1029     RTMP_IO_WRITE32(pAdapter, TX_RING_BASE_REG, Value);
1030
1031     // Write TXCSR4 register
1032     Value = pAdapter->PrioRing[0].pa_addr;
1033     RTMP_IO_WRITE32(pAdapter, PRIO_RING_BASE_REG, Value);
1034
1035     // Write TXCSR5 register
1036     Value = pAdapter->AtimRing[0].pa_addr;
1037     RTMP_IO_WRITE32(pAdapter, ATIM_RING_BASE_REG, Value);
1038
1039     // Write TXCSR6 register
1040     Value = pAdapter->BeaconRing.pa_addr;
1041     RTMP_IO_WRITE32(pAdapter, BEACON_BASE_REG, Value);
1042
1043     // Write RXCSR1 register
1044     RxCSR1.field.RxDSize = RING_DESCRIPTOR_SIZE;
1045     RxCSR1.field.NumRxD  = RX_RING_SIZE;
1046     RTMP_IO_WRITE32(pAdapter, RXCSR1, RxCSR1.word);
1047
1048     // Write RXCSR2 register
1049     Value = pAdapter->RxRing[0].pa_addr;
1050     RTMP_IO_WRITE32(pAdapter, RX_RING_BASE_REG, Value);
1051
1052     // Write CSR1 for host ready
1053     // Move Host reay to end of ASIC initialization
1054     // to ensure no Rx will perform before ASIC init
1055     // RTMP_IO_WRITE32(pAdapter, CSR1, 0x4);
1056
1057     // Initialze ASIC for TX & Rx operation
1058     NICInitializeAsic(pAdapter);
1059
1060     DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitializeAdapter\n");
1061 }
1062
1063 void    NICInitializeAsic(IN    PRTMP_ADAPTER   pAdapter)
1064 {
1065     ULONG           Index;
1066     UCHAR           Value = 0xff;
1067
1068     DBGPRINT(RT_DEBUG_TRACE, "--> NICInitializeAsic\n");
1069
1070     // Initialize MAC register to default value
1071     for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1072     {
1073         RTMP_IO_WRITE32(pAdapter, MACRegTable[Index].Register, MACRegTable[Index].Value);
1074     }
1075
1076     // Set Host ready before kicking Rx
1077     RTMP_IO_WRITE32(pAdapter, CSR1, 0x1); // reset MAC state machine, requested by Kevin 2003-2-11
1078     RTMP_IO_WRITE32(pAdapter, CSR1, 0x4);
1079
1080     // Read BBP register, make sure BBP is up and running before write new data
1081     while ((Value == 0xff) || (Value == 0x00))
1082     {
1083         RTMP_BBP_IO_READ32_BY_REG_ID(pAdapter, BBP_Version, &Value);
1084         DBGPRINT(RT_DEBUG_TRACE, "Value = %d\n", Value);
1085     }
1086
1087     // Initialize BBP register to default value
1088     for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1089     {
1090         RTMP_BBP_IO_WRITE32(pAdapter, BBPRegTable[Index]);
1091     }
1092
1093     // Initialize RF register to default value
1094     AsicSwitchChannel(pAdapter, pAdapter->PortCfg.Channel);
1095     AsicLockChannel(pAdapter, pAdapter->PortCfg.Channel);
1096
1097     // Add radio off control
1098     if (pAdapter->PortCfg.bRadio == FALSE)
1099     {
1100         RTMP_IO_WRITE32(pAdapter, PWRCSR0, 0x00000000);
1101         RTMP_SET_FLAG(pAdapter, fRTMP_ADAPTER_RADIO_OFF);
1102     }
1103
1104     // Kick Rx
1105     RTMP_IO_WRITE32(pAdapter, RXCSR0, 0x7e);
1106     // Clear old FCS jitter before init ASIC
1107     RTMP_IO_READ32(pAdapter, CNT0, &Index);
1108     // Clear old Rx FIFO error jitter before init ASIC
1109     RTMP_IO_READ32(pAdapter, CNT4, &Index);
1110
1111     DBGPRINT(RT_DEBUG_TRACE, "<-- NICInitializeAsic\n");
1112 }
1113
1114 /*
1115     ========================================================================
1116
1117     Routine Description:
1118         Reset NIC Asics
1119
1120     Arguments:
1121         Adapter                     Pointer to our adapter
1122
1123     Return Value:
1124         None
1125
1126     Note:
1127         Reset NIC to initial state AS IS system boot up time.
1128
1129     ========================================================================
1130 */
1131 VOID    NICIssueReset(
1132     IN  PRTMP_ADAPTER   pAdapter)
1133 {
1134     CSR3_STRUC      StaMacReg0;
1135     CSR4_STRUC      StaMacReg1;
1136
1137     DBGPRINT(RT_DEBUG_TRACE, "--> NICIssueReset\n");
1138
1139     // Abort Tx, prevent ASIC from writing to Host memory
1140     RTMP_IO_WRITE32(pAdapter, TXCSR0, 0x08);
1141
1142     // Disable Rx, register value supposed will remain after reset
1143     RTMP_IO_WRITE32(pAdapter, RXCSR0, 0x01);
1144
1145     if (pAdapter->PortCfg.bLocalAdminMAC)
1146     {
1147         // Write Back Permanent MAC address to CSR3 & CSR4
1148         StaMacReg0.field.Byte0 = pAdapter->PermanentAddress[0];
1149         StaMacReg0.field.Byte1 = pAdapter->PermanentAddress[1];
1150         StaMacReg0.field.Byte2 = pAdapter->PermanentAddress[2];
1151         StaMacReg0.field.Byte3 = pAdapter->PermanentAddress[3];
1152         StaMacReg1.field.Byte4 = pAdapter->PermanentAddress[4];
1153         StaMacReg1.field.Byte5 = pAdapter->PermanentAddress[5];
1154         RTMP_IO_WRITE32(pAdapter, CSR3, StaMacReg0.word);
1155         RTMP_IO_WRITE32(pAdapter, CSR4, StaMacReg1.word);
1156     }
1157
1158     // Issue reset and clear from reset state
1159     RTMP_IO_WRITE32(pAdapter, CSR1, 0x01);
1160     RTMP_IO_WRITE32(pAdapter, CSR1, 0x00);
1161
1162     DBGPRINT(RT_DEBUG_TRACE, "<-- NICIssueReset\n");
1163 }
1164
1165 /*
1166     ========================================================================
1167
1168     Routine Description:
1169         Check ASIC registers and find any reason the system might hang
1170
1171     Arguments:
1172         Adapter                     Pointer to our adapter
1173
1174     Return Value:
1175         None
1176
1177     Note:
1178
1179
1180     ========================================================================
1181 */
1182 BOOLEAN NICCheckForHang(
1183     IN  PRTMP_ADAPTER   pAd)
1184 {
1185     // garbage collection
1186 //    if ((pAd->RalinkCounters.EncryptCount - pAd->RalinkCounters.TxDoneCount) == TX_RING_SIZE)
1187 //    {
1188 //        DBGPRINT(RT_DEBUG_WARNING,"\nNICCheckForHang --- Garbage Collection!!!\n\n");
1189 //    }
1190
1191     {
1192 #if 1   // add by Victor Yu. 05-23-2006
1193         unsigned long   flags;
1194         save_flags(flags);
1195         cli();
1196 #endif
1197         RTMPHandleTxRingTxDoneInterrupt(pAd);
1198         RTMPHandleEncryptionDoneInterrupt(pAd);
1199 #if 1   // add by Victor Yu. 05-23-2006
1200         restore_flags(flags);
1201 #endif
1202     }
1203
1204     return (FALSE);
1205 }
1206
1207 /*
1208     ========================================================================
1209
1210     Routine Description:
1211         Reset NIC from error
1212
1213     Arguments:
1214         Adapter                     Pointer to our adapter
1215
1216     Return Value:
1217         None
1218
1219     Note:
1220         Reset NIC from error state
1221
1222     ========================================================================
1223 */
1224 VOID    NICResetFromError(
1225     IN  PRTMP_ADAPTER   pAdapter)
1226 {
1227     // Reset BBP (according to alex, reset ASIC will force reset BBP
1228     // Therefore, skip the reset BBP
1229     // RTMP_IO_WRITE32(pAdapter, CSR1, 0x2);
1230     // Release BBP reset
1231     // RTMP_IO_WRITE32(pAdapter, CSR1, 0x0);
1232
1233     RTMP_IO_WRITE32(pAdapter, CSR1, 0x1);
1234     // Remove ASIC from reset state
1235     RTMP_IO_WRITE32(pAdapter, CSR1, 0x0);
1236
1237     // Init send data structures and related parameters
1238     NICInitTransmit(pAdapter);
1239
1240     NICInitializeAdapter(pAdapter);
1241     NICInitAsicFromEEPROM(pAdapter);
1242
1243     // Switch to current channel, since during reset process, the connection should remains on.
1244     AsicSwitchChannel(pAdapter, pAdapter->PortCfg.Channel);
1245     AsicLockChannel(pAdapter, pAdapter->PortCfg.Channel);
1246 }
1247 /*
1248     ========================================================================
1249
1250     Routine Description:
1251         Verify section is valid for Get key parameter.
1252
1253     Arguments:
1254         buffer                      Pointer to the buffer to start find the key section
1255         ptr                         pointer to section
1256
1257     Return Value:
1258         TRUE                        Success
1259         FALSE                       Fail
1260     ========================================================================
1261 */
1262 INT RTMPIsFindSection(
1263     IN  PUCHAR  ptr,
1264     IN  PUCHAR  buffer)
1265 {
1266     if(ptr == buffer)
1267         return TRUE;
1268     else if (ptr > buffer)
1269     {
1270         while (ptr > buffer)
1271         {
1272             ptr--;
1273             if( *ptr == 0x0a)
1274                 return TRUE;
1275             else if( (*ptr == ' ') || (*ptr == '\t'))
1276                 continue;
1277             else
1278                 return FALSE;
1279         }
1280         return TRUE;
1281     }
1282
1283     return FALSE;
1284 }
1285 /*
1286     ========================================================================
1287
1288     Routine Description:
1289         Find key section for Get key parameter.
1290
1291     Arguments:
1292         buffer                      Pointer to the buffer to start find the key section
1293         section                     the key of the secion to be find
1294
1295     Return Value:
1296         NULL                        Fail
1297         Others                      Success
1298     ========================================================================
1299 */
1300 PUCHAR  RTMPFindSection(
1301     IN  PCHAR   buffer,
1302     IN  PCHAR   section)
1303 {
1304     CHAR temp_buf[255];
1305     PUCHAR  ptr;
1306
1307     strcpy(temp_buf, "[");                  /*  and the opening bracket [  */
1308     strcat(temp_buf, section);
1309     strcat(temp_buf, "]");
1310
1311     if((ptr = rtstrstr(buffer, temp_buf)) != NULL)
1312     {
1313         if(RTMPIsFindSection(ptr, buffer))
1314             return (ptr+strlen("\n"));
1315         else
1316             return NULL;
1317     }
1318     else
1319         return NULL;
1320 }
1321  /**
1322   * strstr - Find the first substring in a %NUL terminated string
1323   * @s1: The string to be searched
1324   * @s2: The string to search for
1325   */
1326 char * rtstrstr(const char * s1,const char * s2)
1327 {
1328          int l1, l2;
1329
1330          l2 = strlen(s2);
1331          if (!l2)
1332                  return (char *) s1;
1333          l1 = strlen(s1);
1334          while (l1 >= l2) {
1335                  l1--;
1336                  if (!memcmp(s1,s2,l2))
1337                          return (char *) s1;
1338                  s1++;
1339          }
1340          return NULL;
1341 }
1342 /*
1343     ========================================================================
1344
1345     Routine Description:
1346         Get key parameter.
1347
1348     Arguments:
1349         section                     the key of the secion
1350         key                         Pointer to key string
1351         dest                        Pointer to destination
1352         destsize                    The datasize of the destination
1353         buffer                      Pointer to the buffer to start find the key
1354
1355     Return Value:
1356         TRUE                        Success
1357         FALSE                       Fail
1358
1359     Note:
1360         This routine get the value with the matched key (case case-sensitive)
1361     ========================================================================
1362 */
1363 INT RTMPGetKeyParameter(
1364     IN  PUCHAR  section,
1365     IN  PCHAR   key,
1366     OUT PCHAR   dest,
1367     IN  INT     destsize,
1368     IN  PCHAR   buffer)
1369 {
1370     char temp_buf1[600];
1371     char temp_buf2[600];
1372     char *start_ptr;
1373     char *end_ptr;
1374     char *ptr;
1375     char *too_far_ptr;
1376     char *offset;
1377     int  len;
1378
1379     //find section
1380     if((offset = RTMPFindSection(buffer, section)) == NULL)
1381         return (FALSE);
1382
1383     strcpy(temp_buf1, "\n");
1384     strcat(temp_buf1, key);
1385     strcat(temp_buf1, "=");
1386
1387     //search key
1388     if((start_ptr=rtstrstr(offset, temp_buf1))==NULL)
1389         return FALSE;
1390
1391     start_ptr+=strlen("\n");
1392     if((too_far_ptr=rtstrstr(offset+1, "["))==NULL)
1393        too_far_ptr=offset+strlen(offset);
1394
1395     if((end_ptr=rtstrstr(start_ptr, "\n"))==NULL)
1396        end_ptr=start_ptr+strlen(start_ptr);
1397
1398     if (too_far_ptr<start_ptr)
1399         return FALSE;
1400
1401     memcpy(temp_buf2, start_ptr, end_ptr-start_ptr);
1402     temp_buf2[end_ptr-start_ptr]='\0';
1403     len = strlen(temp_buf2);
1404     strcpy(temp_buf1, temp_buf2);
1405     if((start_ptr=rtstrstr(temp_buf1, "=")) == NULL)
1406         return FALSE;
1407
1408     strcpy(temp_buf2, start_ptr+1);
1409     ptr = temp_buf2;
1410     //trim space or tab
1411     while(*ptr != 0x00)
1412     {
1413         if( (*ptr == ' ') || (*ptr == '\t') )
1414             ptr++;
1415         else
1416            break;
1417     }
1418
1419     len = strlen(ptr);
1420     memset(dest, 0x00, destsize);
1421     strncpy(dest, ptr, len >= destsize ?  destsize: len);
1422
1423     return TRUE;
1424 }
1425 /*
1426     ========================================================================
1427
1428     Routine Description:
1429         In kernel mode read parameters from file
1430
1431     Arguments:
1432         src                     the location of the file.
1433         dest                        put the parameters to the destination.
1434         Length                  size to read.
1435
1436     Return Value:
1437         None
1438
1439     Note:
1440
1441     ========================================================================
1442 */
1443
1444 VOID RTMPReadParametersFromFile(
1445     IN  PRTMP_ADAPTER pAd)
1446 {
1447     PUCHAR                                  src;
1448     struct file                             *srcf;
1449     INT                                     retval, orgfsuid, orgfsgid;
1450     mm_segment_t                            orgfs;
1451     CHAR                                    buffer[MAX_INI_BUFFER_SIZE];
1452     CHAR                                    tmpbuf[255];
1453     UCHAR                                   keyMaterial[40];
1454     UCHAR                                   Channel;
1455     ULONG                                   ulInfo;
1456     RT_802_11_PREAMBLE                      Preamble;
1457     int                                     KeyLen;
1458     int                                     i;
1459     BOOLEAN                                 bIsHex = TRUE;
1460         ULONG   rate_mapping[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; //according to README
1461
1462     src = PROFILE_PATH;
1463
1464     // Save uid and gid used for filesystem access.
1465     // Set user and group to 0 (root)
1466     orgfsuid = current->fsuid;
1467     orgfsgid = current->fsgid;
1468     current->fsuid=current->fsgid = 0;
1469     orgfs = get_fs();
1470     set_fs(KERNEL_DS);
1471
1472     if (src && *src)
1473     {
1474         srcf = filp_open(src, O_RDONLY, 0);
1475         if (IS_ERR(srcf))
1476         {
1477             DBGPRINT(RT_DEBUG_TRACE, "--> Error %ld opening %s\n", -PTR_ERR(srcf),src);
1478         }
1479         else
1480         {
1481             /* The object must have a read method */
1482             if (srcf->f_op && srcf->f_op->read)
1483             {
1484                 memset(buffer, 0x00, MAX_INI_BUFFER_SIZE);
1485                 retval=srcf->f_op->read(srcf, buffer, MAX_INI_BUFFER_SIZE, &srcf->f_pos);
1486                 if (retval < 0)
1487                 {
1488                     DBGPRINT(RT_DEBUG_TRACE, "--> Read %s error %d\n", src, -retval);
1489                 }
1490                 else
1491                 {
1492                     // set file parameter to portcfg
1493                     //CountryRegion
1494                     if (RTMPGetKeyParameter("Default", "CountryRegion", tmpbuf, 255, buffer))
1495                     {
1496                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1497                         if ((ulInfo >= REGION_MIN) && (ulInfo <= REGION_MAX) )
1498                         {
1499                             pAd->PortCfg.CountryRegion = (UCHAR) ulInfo;
1500                             DBGPRINT(RT_DEBUG_TRACE, "%s::(CountryRegion=%d)\n", __FUNCTION__, pAd->PortCfg.CountryRegion);
1501                         }
1502                     }
1503                     //SSID
1504 #if 0
1505                     memset(tmpbuf, 0x00, 255);
1506                     if (RTMPGetKeyParameter("Default", "SSID", tmpbuf, 64, buffer))
1507                     {
1508                         pAd->PortCfg.SsidLen = (UCHAR) strlen(tmpbuf)/2;
1509             for (i=0; i<pAd->PortCfg.SsidLen; i++)
1510             {
1511                 if (tmpbuf[i*2]>='0' && tmpbuf[i*2]<='9')
1512                     tmpbuf[i]=(tmpbuf[i*2]-'0')*16;
1513                 else if (tmpbuf[i*2]>='a' && tmpbuf[i*2]<='z')
1514                     tmpbuf[i]=(tmpbuf[i*2]-'a'+10)*16;
1515                 else if (tmpbuf[i*2]>='A' && tmpbuf[i*2]<='Z')
1516                     tmpbuf[i]=(tmpbuf[i*2]-'A'+10)*16;
1517
1518                 if (tmpbuf[i*2+1]>='0' && tmpbuf[i*2+1]<='9')
1519                     tmpbuf[i]=tmpbuf[i]+(tmpbuf[i*2+1]-'0');
1520                 else if (tmpbuf[i*2+1]>='a' && tmpbuf[i*2+1]<='z')
1521                     tmpbuf[i]=tmpbuf[i]+(tmpbuf[i*2+1]-'a'+10);
1522                 else if (tmpbuf[i*2+1]>='A' && tmpbuf[i*2+1]<='Z')
1523                     tmpbuf[i]=tmpbuf[i]+(tmpbuf[i*2+1]-'A'+10);
1524             }
1525
1526             for (i=pAd->PortCfg.SsidLen; i<strlen(tmpbuf); i++)
1527                 tmpbuf[i]=0;
1528
1529                         memcpy(pAd->PortCfg.Ssid, tmpbuf, pAd->PortCfg.SsidLen);
1530
1531                         pAd->Mlme.CntlAux.SsidLen = pAd->PortCfg.SsidLen;
1532                         memcpy(pAd->Mlme.CntlAux.Ssid, tmpbuf, pAd->Mlme.CntlAux.SsidLen);
1533                         DBGPRINT(RT_DEBUG_TRACE, "%s::(SSID=%s Len=%d)\n", __FUNCTION__, tmpbuf, pAd->PortCfg.SsidLen);
1534                     }
1535 #else
1536                     memset(tmpbuf, 0x00, 255);
1537                     if (RTMPGetKeyParameter("Default", "SSID", tmpbuf, 32, buffer))
1538                     {
1539                         pAd->PortCfg.SsidLen = (UCHAR) strlen(tmpbuf);
1540                         memcpy(pAd->PortCfg.Ssid, tmpbuf, pAd->PortCfg.SsidLen);
1541
1542                         pAd->Mlme.CntlAux.SsidLen = pAd->PortCfg.SsidLen;
1543                         memcpy(pAd->Mlme.CntlAux.Ssid, tmpbuf, pAd->Mlme.CntlAux.SsidLen);
1544                         DBGPRINT(RT_DEBUG_TRACE, "%s::(SSID=%s Len=%d)\n", __FUNCTION__, tmpbuf, pAd->PortCfg.SsidLen);
1545                     }
1546 #endif
1547                     //NetworkType
1548                     if (RTMPGetKeyParameter("Default", "NetworkType", tmpbuf, 255, buffer))
1549                     {
1550                         pAd->bConfigChanged = TRUE;
1551                         if (strcmp(tmpbuf, "Adhoc") == 0)
1552                             pAd->PortCfg.BssType = BSS_INDEP;
1553                         else //Default Infrastructure mode
1554                             pAd->PortCfg.BssType = BSS_INFRA;
1555                         // Reset Ralink supplicant to not use, it will be set to start when UI set PMK key
1556                         pAd->PortCfg.WpaState = SS_NOTUSE;
1557                         DBGPRINT(RT_DEBUG_TRACE, "%s::(NetworkType=%d)\n", __FUNCTION__, pAd->PortCfg.BssType);
1558                     }
1559                     //WirelessMode
1560                     if (RTMPGetKeyParameter("Default", "WirelessMode", tmpbuf, 10, buffer))
1561                     {
1562                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1563                         if ((ulInfo == PHY_11BG_MIXED) || (ulInfo == PHY_11B) ||
1564                             (ulInfo == PHY_11A) || (ulInfo == PHY_11ABG_MIXED))
1565                         {
1566                             RTMPSetPhyMode(pAd, ulInfo);
1567                             DBGPRINT(RT_DEBUG_TRACE, "%s::(WirelessMode=%d)\n", __FUNCTION__, ulInfo);
1568                         }
1569                     }
1570                     //TxRate
1571                     if (RTMPGetKeyParameter("Default", "TxRate", tmpbuf, 10, buffer))
1572                     {
1573                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1574                         {
1575                             if (ulInfo == 0)
1576                                 RTMPSetDesiredRates(pAd, -1);
1577                             else
1578                                 RTMPSetDesiredRates(pAd, (LONG) (rate_mapping[ulInfo-1] * 1000000));
1579
1580                             DBGPRINT(RT_DEBUG_TRACE, "%s::(TxRate=%d)\n", __FUNCTION__, ulInfo);
1581                         }
1582                     }
1583                     //Channel
1584                     if (RTMPGetKeyParameter("Default", "Channel", tmpbuf, 10, buffer))
1585                     {
1586                         Channel = (UCHAR) simple_strtol(tmpbuf, 0, 10);
1587                         if (ChannelSanity(pAd, Channel) == TRUE)
1588                         {
1589                             pAd->PortCfg.Channel = Channel;
1590                             // If default profile in Registry is an ADHOC network, driver should use the specified channel
1591                             // number when starting IBSS the first time, because RaConfig is passive and will not set this
1592                             // via OID_802_11_CONFIGURATION upon driver bootup.
1593                             pAd->PortCfg.IbssConfig.Channel = pAd->PortCfg.Channel;
1594                             DBGPRINT(RT_DEBUG_TRACE, "%s::(Channel=%d)\n", __FUNCTION__, Channel);
1595                         }
1596                     }
1597                     //BGProtection
1598                     if (RTMPGetKeyParameter("Default", "BGProtection", tmpbuf, 10, buffer))
1599                     {
1600                         switch (simple_strtol(tmpbuf, 0, 10))
1601                         {
1602                             case 1: //Always On
1603                                 pAd->PortCfg.UseBGProtection = 1;
1604                                 break;
1605                             case 2: //Always OFF
1606                                 pAd->PortCfg.UseBGProtection = 2;
1607                                 break;
1608                             case 0: //AUTO
1609                             default:
1610                                 pAd->PortCfg.UseBGProtection = 0;
1611                                 break;
1612                         }
1613                         DBGPRINT(RT_DEBUG_TRACE, "%s::(BGProtection=%d)\n", __FUNCTION__, pAd->PortCfg.UseBGProtection);
1614                     }
1615                     //TxPreamble
1616                     if (RTMPGetKeyParameter("Default", "TxPreamble", tmpbuf, 10, buffer))
1617                     {
1618                         Preamble = simple_strtol(tmpbuf, 0, 10);
1619                         switch (Preamble)
1620                         {
1621                             case Rt802_11PreambleShort:
1622                                 pAd->PortCfg.WindowsTxPreamble = Preamble;
1623                                 MlmeSetTxPreamble(pAd, Rt802_11PreambleShort);
1624                                 break;
1625                             case Rt802_11PreambleLong:
1626                             case Rt802_11PreambleAuto:
1627                             default:
1628                                 // if user wants AUTO, initialize to LONG here, then change according to AP's
1629                                 // capability upon association.
1630                                 pAd->PortCfg.WindowsTxPreamble = Preamble;
1631                                 MlmeSetTxPreamble(pAd, Rt802_11PreambleLong);
1632                         }
1633                         DBGPRINT(RT_DEBUG_TRACE, "%s::(TxPreamble=%d)\n", __FUNCTION__, Preamble);
1634                     }
1635                     //RTSThreshold
1636                     if (RTMPGetKeyParameter("Default", "RTSThreshold", tmpbuf, 10, buffer))
1637                     {
1638                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1639
1640                         if((ulInfo > 0) && (ulInfo <= MAX_RTS_THRESHOLD))
1641                             pAd->PortCfg.RtsThreshold = (USHORT)ulInfo;
1642                         else
1643                             pAd->PortCfg.RtsThreshold = MAX_RTS_THRESHOLD;
1644
1645                         DBGPRINT(RT_DEBUG_TRACE, "%s::(RTSThreshold=%d)\n", __FUNCTION__, pAd->PortCfg.RtsThreshold);
1646                     }
1647                     //FragThreshold
1648                     if (RTMPGetKeyParameter("Default", "FragThreshold", tmpbuf, 10, buffer))
1649                     {
1650                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1651
1652                         if ( (ulInfo >= MIN_FRAG_THRESHOLD) && (ulInfo <= MAX_FRAG_THRESHOLD))
1653                             pAd->PortCfg.FragmentThreshold = (USHORT)ulInfo;
1654                         else
1655                             pAd->PortCfg.FragmentThreshold = MAX_FRAG_THRESHOLD;
1656
1657                         if (pAd->PortCfg.FragmentThreshold == MAX_FRAG_THRESHOLD)
1658                             pAd->PortCfg.bFragmentZeroDisable = TRUE;
1659                         else
1660                             pAd->PortCfg.bFragmentZeroDisable = FALSE;
1661
1662                         DBGPRINT(RT_DEBUG_TRACE, "%s::(FragThreshold=%d)\n", __FUNCTION__, ulInfo);
1663                     }
1664                     //AdhocModeRate
1665                     if (RTMPGetKeyParameter("Default", "AdhocModeRate", tmpbuf, 10, buffer))
1666                     {
1667                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1668
1669                         if (ulInfo == 1)
1670                             pAd->PortCfg.AdhocMode = 1;
1671                         else
1672                             pAd->PortCfg.AdhocMode = 0;
1673
1674                         DBGPRINT(RT_DEBUG_TRACE, "%s::(AdhocModeRate=%d)\n", __FUNCTION__, pAd->PortCfg.AdhocMode);
1675                     }
1676                     //TxBurst
1677                     if (RTMPGetKeyParameter("Default", "TxBurst", tmpbuf, 10, buffer))
1678                     {
1679                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1680
1681                         if (ulInfo == 1)
1682                             pAd->PortCfg.EnableTxBurst = TRUE;
1683                         else
1684                             pAd->PortCfg.EnableTxBurst = FALSE;
1685
1686                         DBGPRINT(RT_DEBUG_TRACE, "%s::(TxBurst=%d)\n", __FUNCTION__, pAd->PortCfg.EnableTxBurst);
1687                     }
1688                     //TurboRate
1689                     if (RTMPGetKeyParameter("Default", "TurboRate", tmpbuf, 10, buffer))
1690                     {
1691                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1692
1693                         if (ulInfo == 1)
1694                             pAd->PortCfg.EnableTurboRate = TRUE;
1695                         else
1696                             pAd->PortCfg.EnableTurboRate = FALSE;
1697
1698                         DBGPRINT(RT_DEBUG_TRACE, "%s::(TurboRate=%d)\n", __FUNCTION__, pAd->PortCfg.EnableTurboRate);
1699                     }
1700                     //ShortSlot
1701                     if (RTMPGetKeyParameter("Default", "ShortSlot", tmpbuf, 10, buffer))
1702                     {
1703                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1704
1705                         if (ulInfo == 1)
1706                             pAd->PortCfg.UseShortSlotTime = TRUE;
1707                         else
1708                             pAd->PortCfg.UseShortSlotTime = FALSE;
1709
1710                         DBGPRINT(RT_DEBUG_TRACE, "%s::(ShortSlot=%d)\n", __FUNCTION__, pAd->PortCfg.UseShortSlotTime);
1711                     }
1712                     //POWER_MODE
1713                     if (RTMPGetKeyParameter("Default", "PSMode", tmpbuf, 10, buffer))
1714                     {
1715                         if (pAd->PortCfg.BssType == BSS_INFRA)
1716                         {
1717                             if ((strcmp(tmpbuf, "MAX_PSP") == 0) || (strcmp(tmpbuf, "max_psp") == 0))
1718                             {
1719                                 // do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()
1720                                 // to exclude certain situations.
1721                                 //     MlmeSetPsmBit(pAdapter, PWR_SAVE);
1722                                 if (pAd->PortCfg.WindowsACCAMEnable == FALSE)
1723                                     pAd->PortCfg.WindowsPowerMode = Ndis802_11PowerModeMAX_PSP;
1724                                 pAd->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeMAX_PSP;
1725                                 pAd->PortCfg.RecvDtim = TRUE;  // FALSE;
1726                                 pAd->PortCfg.DefaultListenCount = 5;
1727                             }
1728                             else if ((strcmp(tmpbuf, "Fast_PSP") == 0) || (strcmp(tmpbuf, "fast_psp") == 0)
1729                                 || (strcmp(tmpbuf, "FAST_PSP") == 0))
1730                             {
1731                                 // do NOT turn on PSM bit here, wait until MlmeCheckForPsmChange()
1732                                 // to exclude certain situations.
1733                                 //     MlmeSetPsmBit(pAdapter, PWR_SAVE);
1734                                 pAd->PortCfg.RecvDtim = TRUE;
1735                                 if (pAd->PortCfg.WindowsACCAMEnable == FALSE)
1736                                     pAd->PortCfg.WindowsPowerMode = Ndis802_11PowerModeFast_PSP;
1737                                 pAd->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeFast_PSP;
1738                                 pAd->PortCfg.DefaultListenCount = 3;
1739                             }
1740                             else
1741                             { //Default Ndis802_11PowerModeCAM
1742                                 // clear PSM bit immediately
1743                                 MlmeSetPsmBit(pAd, PWR_ACTIVE);
1744                                 pAd->PortCfg.RecvDtim = TRUE;
1745                                 if (pAd->PortCfg.WindowsACCAMEnable == FALSE)
1746                                     pAd->PortCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
1747                                 pAd->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
1748                             }
1749                             DBGPRINT(RT_DEBUG_TRACE, "%s::(PSMode=%d)\n", __FUNCTION__, pAd->PortCfg.WindowsPowerMode);
1750                         }
1751                     }
1752                     //AuthMode
1753                     if (RTMPGetKeyParameter("Default", "AuthMode", tmpbuf, 10, buffer))
1754                     {
1755                         if ((strcmp(tmpbuf, "SHARED") == 0) || (strcmp(tmpbuf, "shared") == 0))
1756                             pAd->PortCfg.AuthMode = Ndis802_11AuthModeShared;
1757                         else if ((strcmp(tmpbuf, "WPAPSK") == 0) || (strcmp(tmpbuf, "wpapsk") == 0))
1758                             pAd->PortCfg.AuthMode = Ndis802_11AuthModeWPAPSK;
1759                         else if ((strcmp(tmpbuf, "WPANONE") == 0) || (strcmp(tmpbuf, "wpanone") == 0))
1760                             pAd->PortCfg.AuthMode = Ndis802_11AuthModeWPANone;
1761                         else
1762                             pAd->PortCfg.AuthMode = Ndis802_11AuthModeOpen;
1763
1764                         pAd->PortCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
1765                         DBGPRINT(RT_DEBUG_TRACE, "%s::(AuthMode=%d)\n", __FUNCTION__, pAd->PortCfg.AuthMode);
1766                     }
1767                     //EncrypType
1768                     if (RTMPGetKeyParameter("Default", "EncrypType", tmpbuf, 10, buffer))
1769                     {
1770                         if ((strcmp(tmpbuf, "WEP") == 0) || (strcmp(tmpbuf, "wep") == 0))
1771                             pAd->PortCfg.WepStatus = Ndis802_11WEPEnabled;
1772                         else if ((strcmp(tmpbuf, "TKIP") == 0) || (strcmp(tmpbuf, "tkip") == 0))
1773                             pAd->PortCfg.WepStatus = Ndis802_11Encryption2Enabled;
1774                         else if ((strcmp(tmpbuf, "AES") == 0) || (strcmp(tmpbuf, "aes") == 0))
1775                             pAd->PortCfg.WepStatus = Ndis802_11Encryption3Enabled;
1776                         else
1777                             pAd->PortCfg.WepStatus = Ndis802_11WEPDisabled;
1778
1779                         DBGPRINT(RT_DEBUG_TRACE, "%s::(EncrypType=%d)\n", __FUNCTION__, pAd->PortCfg.WepStatus);
1780                     }
1781                     //WPAPSK_KEY
1782                     if (RTMPGetKeyParameter("Default", "WPAPSK", tmpbuf, 255, buffer))
1783                     {
1784                         if ((strlen(tmpbuf) >= 8) && (strlen(tmpbuf) <= 64))
1785                         {
1786                             PasswordHash((char *)tmpbuf, pAd->PortCfg.Ssid, pAd->PortCfg.SsidLen, keyMaterial);
1787                             NdisMoveMemory(pAd->PortCfg.PskKey.Key, keyMaterial, 32);
1788                             // Use RaConfig as PSK agent.
1789                             // Start STA supplicant state machine
1790                             pAd->PortCfg.WpaState = SS_START;
1791 #if 0
1792                             DBGPRINT(RT_DEBUG_TRACE, "%s WPAPSK Key => \n", __FUNCTION__);
1793                             for (i = 0; i < 32; i++)
1794                             {
1795                                 DBGPRINT(RT_DEBUG_TRACE, "%02x:", pAd->PortCfg.PskKey.Key[i]);
1796                                 if (i%16 == 15)
1797                                     DBGPRINT(RT_DEBUG_TRACE, "\n");
1798                             }
1799                             DBGPRINT(RT_DEBUG_TRACE, "\n");
1800 #endif
1801                         }
1802                     }
1803                     //DefaultKeyID
1804                     if (RTMPGetKeyParameter("Default", "DefaultKeyID", tmpbuf, 10, buffer))
1805                     {
1806                         ulInfo = simple_strtol(tmpbuf, 0, 10);
1807                         if((ulInfo >= 1 ) && (ulInfo <= 4))
1808                             pAd->PortCfg.DefaultKeyId = (UCHAR) (ulInfo - 1 );
1809                         else
1810                             pAd->PortCfg.DefaultKeyId = 0;
1811
1812                         DBGPRINT(RT_DEBUG_TRACE, "%s::(DefaultKeyID=%d)\n", __FUNCTION__, pAd->PortCfg.DefaultKeyId);
1813                     }
1814                     //Key1Str
1815                     if (RTMPGetKeyParameter("Default", "Key1Str", tmpbuf, 26, buffer))
1816                     {
1817                         KeyLen = strlen(tmpbuf);
1818                         switch (KeyLen) {
1819                         case 0:
1820                         pAd->PortCfg.SharedKey[0].KeyLen = 0;
1821                                 break;
1822                         case 5: //wep 40 Ascii type
1823                                 pAd->PortCfg.SharedKey[0].KeyLen = KeyLen;
1824                                 memcpy(pAd->PortCfg.SharedKey[0].Key, tmpbuf, KeyLen);
1825                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1826                                 break;
1827                         case 10: //wep 40 Hex type
1828                                 for(i=0; i < KeyLen; i++) {
1829                                     if( !isxdigit(*(tmpbuf+i)) ) {
1830                                                         bIsHex = FALSE;
1831                                                         break;
1832                                     }
1833                                 }
1834
1835                                 if (bIsHex)
1836                                 {
1837                                     pAd->PortCfg.SharedKey[0].KeyLen = KeyLen / 2 ;
1838                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[0].Key, KeyLen / 2);
1839                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
1840                                 }
1841                                 break;
1842                         case 13: //wep 104 Ascii type
1843                                 pAd->PortCfg.SharedKey[0].KeyLen = KeyLen;
1844                                 memcpy(pAd->PortCfg.SharedKey[0].Key, tmpbuf, KeyLen);
1845                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1846                                 break;
1847                             case 26: //wep 104 Hex type
1848                                 for(i=0; i < KeyLen; i++)
1849                                 {
1850                                     if( !isxdigit(*(tmpbuf+i)) )
1851                                     {
1852                                         bIsHex = FALSE;
1853                                         break;
1854                                     }
1855                                 }
1856
1857                                 if (bIsHex)
1858                                 {
1859                                     pAd->PortCfg.SharedKey[0].KeyLen = KeyLen / 2 ;
1860                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[0].Key, KeyLen / 2);
1861                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key1=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
1862                                 }
1863                                 break;
1864                             default:
1865                                 pAd->PortCfg.SharedKey[0].KeyLen = 0;
1866                                 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid Key (=%s)\n", __FUNCTION__, tmpbuf);
1867                         }
1868                     }
1869                     //Key2Str
1870                     if (RTMPGetKeyParameter("Default", "Key2Str", tmpbuf, 26, buffer))
1871                     {
1872                         KeyLen = strlen(tmpbuf);
1873                         switch (KeyLen)
1874                         {
1875                             case 0:
1876                                 pAd->PortCfg.SharedKey[1].KeyLen = 0;
1877                                 break;
1878                             case 5: //wep 40 Ascii type
1879                                 pAd->PortCfg.SharedKey[1].KeyLen = KeyLen;
1880                                 memcpy(pAd->PortCfg.SharedKey[1].Key, tmpbuf, KeyLen);
1881                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1882                                 break;
1883                             case 10: //wep 40 Hex type
1884                                 for(i=0; i < KeyLen; i++)
1885                                 {
1886                                     if( !isxdigit(*(tmpbuf+i)) )
1887                                     {
1888                                         bIsHex = FALSE;
1889                                         break;
1890                                     }
1891                                 }
1892
1893                                 if (bIsHex)
1894                                 {
1895                                     pAd->PortCfg.SharedKey[1].KeyLen = KeyLen / 2 ;
1896                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[1].Key, KeyLen / 2);
1897                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
1898                                 }
1899                                 break;
1900                             case 13: //wep 104 Ascii type
1901                                 pAd->PortCfg.SharedKey[1].KeyLen = KeyLen;
1902                                 memcpy(pAd->PortCfg.SharedKey[1].Key, tmpbuf, KeyLen);
1903                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1904                                 break;
1905                             case 26: //wep 104 Hex type
1906                                 for(i=0; i < KeyLen; i++)
1907                                 {
1908                                     if( !isxdigit(*(tmpbuf+i)) )
1909                                     {
1910                                         bIsHex = FALSE;
1911                                         break;
1912                                     }
1913                                 }
1914
1915                                 if (bIsHex)
1916                                 {
1917                                     pAd->PortCfg.SharedKey[1].KeyLen = KeyLen / 2 ;
1918                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[1].Key, KeyLen / 2);
1919                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key2=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
1920                                 }
1921                                 break;
1922                             default:
1923                                 pAd->PortCfg.SharedKey[1].KeyLen = 0;
1924                                 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid argument (=%s)\n", __FUNCTION__, tmpbuf);
1925                         }
1926                     }
1927                     //Key3Str
1928                     if (RTMPGetKeyParameter("Default", "Key3Str", tmpbuf, 26, buffer))
1929                     {
1930                         KeyLen = strlen(tmpbuf);
1931                         switch (KeyLen)
1932                         {
1933                             case 0:
1934                                 pAd->PortCfg.SharedKey[2].KeyLen = 0;
1935                                 break;
1936                             case 5: //wep 40 Ascii type
1937                                 pAd->PortCfg.SharedKey[2].KeyLen = KeyLen;
1938                                 memcpy(pAd->PortCfg.SharedKey[2].Key, tmpbuf, KeyLen);
1939                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1940                                 break;
1941                             case 10: //wep 40 Hex type
1942                                 for(i=0; i < KeyLen; i++)
1943                                 {
1944                                     if( !isxdigit(*(tmpbuf+i)) )
1945                                     {
1946                                         bIsHex = FALSE;
1947                                         break;
1948                                     }
1949                                 }
1950
1951                                 if (bIsHex)
1952                                 {
1953                                     pAd->PortCfg.SharedKey[2].KeyLen = KeyLen / 2 ;
1954                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[2].Key, KeyLen / 2);
1955                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
1956                                 }
1957                                 break;
1958                             case 13: //wep 104 Ascii type
1959                                 pAd->PortCfg.SharedKey[2].KeyLen = KeyLen;
1960                                 memcpy(pAd->PortCfg.SharedKey[2].Key, tmpbuf, KeyLen);
1961                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1962                                 break;
1963                             case 26: //wep 104 Hex type
1964                                 for(i=0; i < KeyLen; i++)
1965                                 {
1966                                     if( !isxdigit(*(tmpbuf+i)) )
1967                                     {
1968                                         bIsHex = FALSE;
1969                                         break;
1970                                     }
1971                                 }
1972
1973                                 if (bIsHex)
1974                                 {
1975                                     pAd->PortCfg.SharedKey[2].KeyLen = KeyLen / 2 ;
1976                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[2].Key, KeyLen / 2);
1977                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key3=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
1978                                 }
1979                                 break;
1980                             default:
1981                                 pAd->PortCfg.SharedKey[2].KeyLen = 0;
1982                                 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid argument (=%s)\n", __FUNCTION__, tmpbuf);
1983                         }
1984                     }
1985                     //Key4Str
1986                     if (RTMPGetKeyParameter("Default", "Key4Str", tmpbuf, 26, buffer))
1987                     {
1988                         KeyLen = strlen(tmpbuf);
1989                         switch (KeyLen)
1990                         {
1991                             case 0:
1992                                 pAd->PortCfg.SharedKey[3].KeyLen = 0;
1993                                 break;
1994                             case 5: //wep 40 Ascii type
1995                                 pAd->PortCfg.SharedKey[3].KeyLen = KeyLen;
1996                                 memcpy(pAd->PortCfg.SharedKey[3].Key, tmpbuf, KeyLen);
1997                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
1998                                 break;
1999                             case 10: //wep 40 Hex type
2000                                 for(i=0; i < KeyLen; i++)
2001                                 {
2002                                     if( !isxdigit(*(tmpbuf+i)) )
2003                                     {
2004                                         bIsHex = FALSE;
2005                                         break;
2006                                     }
2007                                 }
2008
2009                                 if (bIsHex)
2010                                 {
2011                                     pAd->PortCfg.SharedKey[3].KeyLen = KeyLen / 2 ;
2012                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[3].Key, KeyLen / 2);
2013                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
2014                                 }
2015                                 break;
2016                             case 13: //wep 104 Ascii type
2017                                 pAd->PortCfg.SharedKey[3].KeyLen = KeyLen;
2018                                 memcpy(pAd->PortCfg.SharedKey[3].Key, tmpbuf, KeyLen);
2019                                 DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Ascii");
2020                                 break;
2021                             case 26: //wep 104 Hex type
2022                                 for(i=0; i < KeyLen; i++)
2023                                 {
2024                                     if( !isxdigit(*(tmpbuf+i)) )
2025                                     {
2026                                         bIsHex = FALSE;
2027                                         break;
2028                                     }
2029                                 }
2030
2031                                 if (bIsHex)
2032                                 {
2033                                     pAd->PortCfg.SharedKey[3].KeyLen = KeyLen / 2 ;
2034                                     AtoH(tmpbuf, pAd->PortCfg.SharedKey[3].Key, KeyLen / 2);
2035                                     DBGPRINT(RT_DEBUG_TRACE, "%s::(Key4=%s and type=%s)\n", __FUNCTION__, tmpbuf, "Hex");
2036                                 }
2037                                 break;
2038                             default:
2039                                 pAd->PortCfg.SharedKey[3].KeyLen = 0;
2040                                 DBGPRINT(RT_DEBUG_TRACE, "%s::Invalid argument (=%s)\n", __FUNCTION__, tmpbuf);
2041                         }
2042                     }
2043                 }
2044             }
2045             else
2046             {
2047                 DBGPRINT(RT_DEBUG_TRACE, "--> %s does not have a write method\n", src);
2048             }
2049
2050             retval=filp_close(srcf,NULL);
2051             if (retval)
2052             {
2053                 DBGPRINT(RT_DEBUG_TRACE, "--> Error %d closing %s\n", -retval, src);
2054             }
2055         }
2056     } //if (src && *src)
2057
2058     set_fs(orgfs);
2059     current->fsuid = orgfsuid;
2060     current->fsgid = orgfsgid;
2061 }
2062 /*
2063     ========================================================================
2064
2065     Routine Description:
2066         Reset NIC Asics
2067
2068     Arguments:
2069         Adapter                     Pointer to our adapter
2070
2071     Return Value:
2072         None
2073
2074     Note:
2075         Reset NIC to initial state AS IS system boot up time.
2076
2077     ========================================================================
2078 */
2079 VOID    RTMPRingCleanUp(
2080     IN  PRTMP_ADAPTER   pAdapter,
2081     IN  UCHAR           RingType)
2082 {
2083     ULONG           Count;
2084     PTXD_STRUC      pTxD;
2085     PRXD_STRUC      pRxD;
2086     PMGMT_STRUC     pMgmt;
2087     struct sk_buff  *skb;
2088
2089     Count = 0;
2090     switch (RingType)
2091     {
2092         case TX_RING:
2093             // We have to clean all descriptos in case some error happened with reset
2094             do
2095             {
2096                 pTxD  = (PTXD_STRUC) pAdapter->TxRing[pAdapter->NextTxDoneIndex].va_addr;
2097
2098                 pTxD->Owner = DESC_OWN_HOST;
2099                 pTxD->Valid = FALSE;
2100
2101                 pAdapter->NextTxDoneIndex++;
2102                 Count++;
2103                 if (pAdapter->NextTxDoneIndex >= TX_RING_SIZE)
2104                 {
2105                     pAdapter->NextTxDoneIndex = 0;
2106                 }
2107
2108             }   while (Count < TX_RING_SIZE);   // We have to scan all TX ring
2109
2110             // Check for packet in send tx wait waiting queue
2111             while (pAdapter->TxSwQueue0.Head != NULL)
2112             {
2113                 //  Packets queued, Remove all and return to upper layer
2114                 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue0);
2115                 // Release packet by calling send failure
2116                 RTMPFreeSkbBuffer(skb);
2117             }
2118             while (pAdapter->TxSwQueue1.Head != NULL)
2119             {
2120                 //  Packets queued, Remove all and return to upper layer
2121                 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue1);
2122                 // Release packet by calling send failure
2123                 RTMPFreeSkbBuffer(skb);
2124             }
2125             while (pAdapter->TxSwQueue2.Head != NULL)
2126             {
2127                 //  Packets queued, Remove all and return to upper layer
2128                 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue2);
2129                 // Release packet by calling send failure
2130                 RTMPFreeSkbBuffer(skb);
2131             }
2132             while (pAdapter->TxSwQueue3.Head != NULL)
2133             {
2134                 //  Packets queued, Remove all and return to upper layer
2135                 skb = (struct sk_buff *)RemoveHeadQueue(&pAdapter->TxSwQueue3);
2136                 // Release packet by calling send failure
2137                 RTMPFreeSkbBuffer(skb);
2138             }
2139             break;
2140
2141         case PRIO_RING:
2142             // We have to clean all descriptos in case some error happened with reset
2143             do
2144             {
2145                 pTxD  = (PTXD_STRUC) pAdapter->PrioRing[pAdapter->NextPrioDoneIndex].va_addr;
2146
2147                 // We just re-claim these ring spaces.
2148                 pTxD->Owner = DESC_OWN_HOST;
2149                 pTxD->Valid = FALSE;
2150
2151                 pAdapter->NextPrioDoneIndex++;
2152                 Count++;
2153                 if (pAdapter->NextPrioDoneIndex >= PRIO_RING_SIZE)
2154                 {
2155                     pAdapter->NextPrioDoneIndex = 0;
2156                 }
2157
2158             }   while (Count < PRIO_RING_SIZE);     // We have to scan all Priority Ring
2159
2160             // Clear managemt buffer ring
2161             while ((pAdapter->PushMgmtIndex != pAdapter->PopMgmtIndex) || (pAdapter->MgmtQueueSize != 0))
2162             {
2163                 pMgmt = (PMGMT_STRUC) &pAdapter->MgmtRing[pAdapter->PopMgmtIndex];
2164                 if (pMgmt->Valid == TRUE)
2165                 {
2166                     MlmeFreeMemory(pAdapter, pMgmt->pBuffer);
2167                     pMgmt->Valid = FALSE;
2168                     pAdapter->PopMgmtIndex++;
2169                     pAdapter->MgmtQueueSize--;
2170                     if (pAdapter->PopMgmtIndex >= MGMT_RING_SIZE)
2171                     {
2172                         pAdapter->PopMgmtIndex = 0;
2173                     }
2174                 }
2175             }
2176             pAdapter->RalinkCounters.MgmtRingFullCount = 0;
2177             break;
2178
2179         case RX_RING:
2180             // We have to clean all descriptos in case some error happened with reset
2181             do
2182             {
2183                 pRxD  = (PRXD_STRUC) pAdapter->RxRing[pAdapter->CurRxIndex].va_addr;
2184
2185                 // Re-initial Rx ring cell to owned by NIC.
2186                 pRxD->Owner = DESC_OWN_NIC;
2187
2188                 pAdapter->CurRxIndex++;
2189                 Count++;
2190                 if (pAdapter->CurRxIndex >= RX_RING_SIZE)
2191                 {
2192                     pAdapter->CurRxIndex = 0;
2193                 }
2194
2195             }   while (Count < RX_RING_SIZE);       // We have to scan all Rx Ring
2196             break;
2197
2198         default:
2199             break;
2200
2201     }
2202 }
2203
2204 /*
2205     ========================================================================
2206
2207     Routine Description:
2208         Compare two memory block
2209
2210     Arguments:
2211         Adapter                     Pointer to our adapter
2212
2213     Return Value:
2214         1:          memory are equal
2215         0:          memory are not equal
2216
2217     Note:
2218
2219     ========================================================================
2220 */
2221 ULONG   RTMPEqualMemory(
2222     IN  PVOID   pSrc1,
2223     IN  PVOID   pSrc2,
2224     IN  ULONG   Length)
2225 {
2226     PUCHAR  pMem1;
2227     PUCHAR  pMem2;
2228     ULONG   Index = 0;
2229
2230     pMem1 = (PUCHAR) pSrc1;
2231     pMem2 = (PUCHAR) pSrc2;
2232
2233     for (Index = 0; Index < Length; Index++)
2234     {
2235         if (pMem1[Index] != pMem2[Index])
2236         {
2237             break;
2238         }
2239     }
2240
2241     if (Index == Length)
2242     {
2243         return (1);
2244     }
2245     else
2246     {
2247         return (0);
2248         }
2249 }
2250
2251 /*
2252     ========================================================================
2253
2254     Routine Description:
2255         Compare two memory block
2256
2257     Arguments:
2258                 pSrc1           Pointer to first memory address
2259                 pSrc2           Pointer to second memory addres
2260
2261     Return Value:
2262         0:          memory is equal
2263         1:          pSrc1 memory is larger
2264         2:          pSrc2 memory is larger
2265
2266     Note:
2267
2268     ========================================================================
2269 */
2270 ULONG   RTMPCompareMemory(
2271     IN  PVOID   pSrc1,
2272     IN  PVOID   pSrc2,
2273     IN  ULONG   Length)
2274 {
2275     PUCHAR  pMem1;
2276     PUCHAR  pMem2;
2277     ULONG   Index = 0;
2278
2279     pMem1 = (PUCHAR) pSrc1;
2280     pMem2 = (PUCHAR) pSrc2;
2281
2282     for (Index = 0; Index < Length; Index++)
2283     {
2284         if (pMem1[Index] > pMem2[Index])
2285             return (1);
2286         else if (pMem1[Index] < pMem2[Index])
2287             return (2);
2288     }
2289
2290     // Equal
2291     return (0);
2292 }
2293
2294 /*
2295         ========================================================================
2296
2297         Routine Description:
2298                 Zero out memory block
2299
2300         Arguments:
2301                 pSrc1           Pointer to memory address
2302                 Length          Size
2303
2304         Return Value:
2305                 None
2306
2307         Note:
2308
2309         ========================================================================
2310 */
2311 VOID    NdisZeroMemory(
2312     IN  PVOID   pSrc,
2313     IN  ULONG   Length)
2314 {
2315 #if 0
2316     PUCHAR  pMem;
2317     ULONG   Index = 0;
2318
2319     pMem = (PUCHAR) pSrc;
2320
2321     for (Index = 0; Index < Length; Index++)
2322     {
2323         pMem[Index] = 0x00;
2324     }
2325 #else
2326     memset(pSrc, 0, Length);
2327 #endif
2328 }
2329
2330 VOID    NdisFillMemory(
2331     IN  PVOID   pSrc,
2332     IN  ULONG   Length,
2333     IN  UCHAR   Fill)
2334 {
2335 #if 0
2336     PUCHAR  pMem;
2337     ULONG   Index = 0;
2338
2339     pMem = (PUCHAR) pSrc;
2340
2341     for (Index = 0; Index < Length; Index++)
2342     {
2343         pMem[Index] = Fill;
2344     }
2345 #else
2346     memset(pSrc, Fill, Length);
2347 #endif
2348 }
2349
2350 /*
2351         ========================================================================
2352
2353         Routine Description:
2354                 Copy data from memory block 1 to memory block 2
2355
2356         Arguments:
2357                 pDest           Pointer to destination memory address
2358                 pSrc            Pointer to source memory address
2359                 Length          Copy size
2360
2361         Return Value:
2362                 None
2363
2364         Note:
2365
2366         ========================================================================
2367 */
2368 VOID    NdisMoveMemory(
2369     OUT PVOID   pDest,
2370     IN  PVOID   pSrc,
2371     IN  ULONG   Length)
2372 {
2373 #if 0
2374     PUCHAR  pMem1;
2375     PUCHAR  pMem2;
2376     ULONG   Index = 0;
2377
2378     pMem1 = (PUCHAR) pDest;
2379     pMem2 = (PUCHAR) pSrc;
2380
2381     for (Index = 0; Index < Length; Index++)
2382     {
2383         pMem1[Index] = pMem2[Index];
2384     }
2385 #endif
2386
2387 #ifdef RTMP_EMBEDDED
2388     if(Length <= 8)
2389         {
2390                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2391                 if(--Length == 0)       return;
2392                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2393                 if(--Length == 0)       return;
2394                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2395                 if(--Length == 0)       return;
2396                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2397                 if(--Length == 0)       return;
2398                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2399                 if(--Length == 0)       return;
2400                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2401                 if(--Length == 0)       return;
2402                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2403                 if(--Length == 0)       return;
2404                 *(((PUCHAR)pDest)++) = *(((PUCHAR)pSrc)++);
2405                 if(--Length == 0)       return;
2406         }
2407         else
2408             memcpy(pDest, pSrc, Length);
2409 #else
2410     memcpy(pDest, pSrc, Length);
2411 #endif
2412 }
2413
2414 /*
2415     ========================================================================
2416
2417     Routine Description:
2418         Initialize port configuration structure
2419
2420     Arguments:
2421         Adapter                     Pointer to our adapter
2422
2423     Return Value:
2424         None
2425
2426     Note:
2427
2428     ========================================================================
2429 */
2430 VOID    PortCfgInit(
2431     IN  PRTMP_ADAPTER pAdapter)
2432 {
2433     UINT i;
2434
2435     DBGPRINT(RT_DEBUG_TRACE, "--> PortCfgInit\n");
2436
2437     pAdapter->PortCfg.UseBGProtection = 0;    // 0: AUTO
2438
2439     pAdapter->PortCfg.CapabilityInfo = 0x0000;
2440     pAdapter->PortCfg.Psm = PWR_ACTIVE;
2441     pAdapter->PortCfg.BeaconPeriod = 100;     // in mSec
2442
2443     pAdapter->PortCfg.CfpMaxDuration = 0;     // never mind, decided by AP later
2444     pAdapter->PortCfg.CfpDurRemain = 0;       // never mind, decided by AP later
2445     pAdapter->PortCfg.CfpCount = 0;           // never mind, decided by AP later
2446     pAdapter->PortCfg.CfpPeriod = 0;          // never mind, decided by AP later
2447     pAdapter->PortCfg.AuthMode = Ndis802_11AuthModeOpen;
2448
2449     for(i = 0; i < SHARE_KEY_NO; i++) {
2450         pAdapter->PortCfg.SharedKey[i].KeyLen = 0;
2451     }
2452
2453     for(i = 0; i < PAIRWISE_KEY_NO; i++) {
2454         pAdapter->PortCfg.PairwiseKey[i].KeyLen = 0;
2455     }
2456
2457     for(i = 0; i < GROUP_KEY_NO; i++) {
2458         pAdapter->PortCfg.GroupKey[i].KeyLen = 0;
2459     }
2460
2461     pAdapter->PortCfg.WepStatus = Ndis802_11EncryptionDisabled;
2462     pAdapter->PortCfg.DefaultKeyId = 0;
2463     pAdapter->PortCfg.PrivacyFilter = Ndis802_11PrivFilterAcceptAll;
2464
2465     // 802.1x port control
2466     pAdapter->PortCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2467     pAdapter->PortCfg.LastMicErrorTime = 0;
2468     pAdapter->PortCfg.MicErrCnt        = 0;
2469     pAdapter->PortCfg.bBlockAssoc      = FALSE;
2470     pAdapter->PortCfg.WpaState         = SS_NOTUSE;
2471
2472     pAdapter->PortCfg.RtsThreshold = 2347;
2473     pAdapter->PortCfg.FragmentThreshold = 2346;
2474     pAdapter->PortCfg.bFragmentZeroDisable = FALSE;
2475
2476     pAdapter->PortCfg.CurrentTxAntenna = 0xff;  // diversity
2477     pAdapter->PortCfg.CurrentRxAntenna = 0xff;  // diversity
2478     pAdapter->PortCfg.NumberOfAntenna = 2;
2479
2480 //  pAdapter->PortCfg.TxPowerLevel[0] = 100;
2481 //  pAdapter->PortCfg.NumOfTxPowerLevel = 1;
2482     pAdapter->PortCfg.TxPower = 100; //mW
2483     pAdapter->PortCfg.TxPowerPercentage = 0xffffffff;  // AUTO
2484
2485     pAdapter->PortCfg.AntennaSupportTx = TRUE;
2486     pAdapter->PortCfg.AntennaSupportRx = TRUE;
2487     pAdapter->PortCfg.AntennaSupportDiversityRx = TRUE;
2488
2489     pAdapter->PortCfg.RecvDtim = TRUE;
2490     NdisZeroMemory(&pAdapter->PortCfg.Bssid, MAC_ADDR_LEN);
2491     NdisFillMemory(&pAdapter->PortCfg.Broadcast, MAC_ADDR_LEN, 0xff);
2492     pAdapter->PortCfg.Pss = PWR_ACTIVE;
2493     pAdapter->PortCfg.RssiTrigger = 0;
2494     pAdapter->PortCfg.LastRssi = 0;
2495     pAdapter->PortCfg.AvgRssi  = 0;
2496     pAdapter->PortCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2497     pAdapter->PortCfg.AtimWin = 0;
2498     pAdapter->PortCfg.Channel = 1;
2499
2500     pAdapter->PortCfg.Aid = 1;
2501
2502     pAdapter->PortCfg.DefaultListenCount = 3;//default listen count;
2503     pAdapter->PortCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_INDEP
2504
2505 // Scott: 2005-05-05
2506 // Enable OFDM in Adhoc mode. This might violate WiFi spec.
2507 //    pAdapter->PortCfg.AdhocMode = 0;
2508     pAdapter->PortCfg.AdhocMode = 1;
2509
2510     pAdapter->PortCfg.SsidLen = 0;
2511     NdisZeroMemory(pAdapter->PortCfg.Ssid, MAX_LEN_OF_SSID);  // NOT NULL-terminated
2512
2513     // global variables mXXXX used in MAC protocol state machines
2514     pAdapter->PortCfg.Mibss = FALSE;
2515     pAdapter->PortCfg.Massoc = FALSE;
2516     pAdapter->PortCfg.Mauth = FALSE;
2517
2518     // PHY specification
2519     pAdapter->PortCfg.PhyMode = 0xff;
2520 //  RTMPSetPhyMode(pAdapter, PHY_11BG_MIXED);   // default in 11BG mixed mode
2521 //  pAdapter->PortCfg.Channel = FirstChannel(pAdapter);
2522     pAdapter->PortCfg.Dsifs = 10;      // in units of usec
2523     pAdapter->PortCfg.TxPreambleInUsed = Rt802_11PreambleLong; // use Long preamble on TX by defaut
2524
2525     // user desired power mode
2526     pAdapter->PortCfg.WindowsPowerMode = Ndis802_11PowerModeCAM; // Ndis802_11PowerModeFast_PSP;
2527     pAdapter->PortCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM; // Ndis802_11PowerModeFast_PSP;
2528     pAdapter->PortCfg.WindowsTxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2529     pAdapter->PortCfg.WindowsACCAMEnable = FALSE;
2530 //    pAdapter->PortCfg.PacketFilter = NDIS_PACKET_TYPE_ALL_MULTICAST | NDIS_PACKET_TYPE_DIRECTED | NDIS_PACKET_TYPE_BROADCAST;
2531     pAdapter->bAcceptDirect = TRUE;
2532     pAdapter->bAcceptMulticast = FALSE;
2533     pAdapter->bAcceptBroadcast = TRUE;
2534     pAdapter->bAcceptAllMulticast = TRUE;
2535
2536     // parameters to be used when this STA starts a new ADHOC network
2537     pAdapter->PortCfg.IbssConfig.BeaconPeriod = 100;
2538     pAdapter->PortCfg.IbssConfig.AtimWin = 0;
2539     pAdapter->PortCfg.IbssConfig.Channel = 1;
2540     pAdapter->PortCfg.RfType = RFIC_2525;
2541     pAdapter->PortCfg.LedMode = LED_MODE_DEFAULT;
2542     RTMPInitTimer(pAdapter, &pAdapter->PortCfg.RfTuningTimer, AsicRfTuningExec);
2543
2544     pAdapter->PortCfg.IgnoredScanNumber = 0;
2545     pAdapter->bTxBusy = FALSE;
2546
2547     pAdapter->PortCfg.bHwRadio  = TRUE;
2548     pAdapter->PortCfg.bSwRadio  = TRUE;
2549     pAdapter->PortCfg.bRadio    = TRUE;
2550     pAdapter->PortCfg.bHardwareRadio = FALSE;       // Default is OFF
2551     pAdapter->PortCfg.bAutoTxAgc = FALSE;                       // Default is OFF
2552         pAdapter->PortCfg.bShowHiddenSSID = FALSE;
2553
2554     // Nitro mode control
2555     pAdapter->PortCfg.EnableTxBurst = 0;
2556     pAdapter->PortCfg.AutoReconnect = TRUE;
2557
2558     // Save the init time as last scan time, the system should do scan after 2 seconds.
2559     pAdapter->PortCfg.LastScanTime = 0;
2560
2561     // Default Config change flag
2562     pAdapter->bConfigChanged = FALSE;
2563
2564     pAdapter->PortCfg.bLocalAdminMAC = TRUE;
2565
2566     pAdapter->NeedSwapToLittleEndian = TRUE;
2567
2568     // dynamic BBP R17:sensibity tuning to overcome background noise
2569     pAdapter->PortCfg.BbpTuningEnable  = TRUE;  // overwritten by E2PROM setting
2570     pAdapter->PortCfg.VgcLowerBound    = 0x38;  // overwritten by E2PROM setting
2571     pAdapter->PortCfg.BbpTuning.FalseCcaLowerThreshold = 100;
2572     pAdapter->PortCfg.BbpTuning.FalseCcaUpperThreshold = 4;   // unit 128, 4*128 = 512
2573     pAdapter->PortCfg.BbpTuning.VgcDelta               = 1;
2574     pAdapter->PortCfg.BbpTuning.VgcUpperBound          = BBP_R17_DYNAMIC_UP_BOUND;
2575
2576 #ifdef RALINK_ATE
2577         memset(&pAdapter->ate, 0, sizeof(ATE_INFO));
2578         pAdapter->ate.Mode = ATE_STASTART;
2579         pAdapter->ate.TxCount = TX_RING_SIZE;
2580         pAdapter->ate.TxLength = PRIO_BUFFER_SIZE;
2581         pAdapter->ate.TxRate = RATE_11;
2582     pAdapter->ate.Channel = 1;
2583         memcpy(&pAdapter->ate.Addr1,"001122334455", ETH_LENGTH_OF_ADDRESS);
2584         memcpy(&pAdapter->ate.Addr2,"001122334455", ETH_LENGTH_OF_ADDRESS);
2585         memcpy(&pAdapter->ate.Addr3,"001122334455", ETH_LENGTH_OF_ADDRESS);
2586 #endif  //#ifdef RALINK_ATE
2587
2588     RTMP_IO_READ32(pAdapter, 0, &pAdapter->PortCfg.Rt2560Version);
2589
2590     DBGPRINT(RT_DEBUG_TRACE, "<-- PortCfgInit\n");
2591 }
2592
2593 UCHAR BtoH(char ch)
2594 {
2595     if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
2596     if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
2597     if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
2598     return(255);
2599 }
2600
2601 //
2602 //  FUNCTION: AtoH(char *, UCHAR *, int)
2603 //
2604 //  PURPOSE:  Converts ascii string to network order hex
2605 //
2606 //  PARAMETERS:
2607 //    src    - pointer to input ascii string
2608 //    dest   - pointer to output hex
2609 //    destlen - size of dest
2610 //
2611 //  COMMENTS:
2612 //
2613 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
2614 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
2615 //
2616
2617 void AtoH(char * src, UCHAR * dest, int destlen)
2618 {
2619     char *srcptr;
2620     PUCHAR destTemp;
2621
2622     srcptr = src;
2623     destTemp = (PUCHAR) dest;
2624
2625     while(destlen--)
2626     {
2627         *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
2628         *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
2629         destTemp++;
2630     }
2631 }
2632
2633 /*
2634         ========================================================================
2635
2636         Routine Description:
2637                 Init timer objects
2638
2639         Arguments:
2640                 pAdapter                        Pointer to our adapter
2641                 pTimer                          Timer structure
2642                 pTimerFunc                      Function to execute when timer expired
2643                 Repeat                          Ture for period timer
2644
2645         Return Value:
2646                 None
2647
2648         Note:
2649
2650         ========================================================================
2651 */
2652 VOID    RTMPInitTimer(
2653         IN      PRTMP_ADAPTER                   pAdapter,
2654         IN      PRALINK_TIMER_STRUCT    pTimer,
2655         IN      PVOID                                   pTimerFunc)
2656 {
2657         pTimer->State      = FALSE;
2658         init_timer(&pTimer->TimerObj);
2659         pTimer->TimerObj.data = (unsigned long)pAdapter;
2660         pTimer->TimerObj.function = pTimerFunc;
2661 }
2662
2663 /*
2664         ========================================================================
2665
2666         Routine Description:
2667                 Init timer objects
2668
2669         Arguments:
2670                 pTimer                          Timer structure
2671                 Value                           Timer value in milliseconds
2672
2673         Return Value:
2674                 None
2675
2676         Note:
2677
2678         ========================================================================
2679 */
2680 VOID    RTMPSetTimer(
2681     IN  PRTMP_ADAPTER           pAdapter,
2682         IN      PRALINK_TIMER_STRUCT    pTimer,
2683         IN      ULONG                                   Value)
2684 {
2685         pTimer->TimerValue = Value;
2686         pTimer->State      = FALSE;
2687         pTimer->TimerObj.expires = jiffies + (Value * HZ)/1000;
2688         add_timer(&pTimer->TimerObj);
2689 }
2690
2691 /*
2692         ========================================================================
2693
2694         Routine Description:
2695                 Cancel timer objects
2696
2697         Arguments:
2698                 Adapter                                         Pointer to our adapter
2699
2700         Return Value:
2701                 None
2702
2703         Note:
2704                 Reset NIC to initial state AS IS system boot up time.
2705
2706         ========================================================================
2707 */
2708 VOID    RTMPCancelTimer(
2709         IN      PRALINK_TIMER_STRUCT    pTimer)
2710 {
2711         del_timer_sync(&pTimer->TimerObj);
2712 }
2713