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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / net / sunlance.c
blob6e4bb5781fe9c6820ad44743bf74c419f4de3321
1 /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
2 * lance.c: Linux/Sparc/Lance driver
3 *
4 * Written 1995, 1996 by Miguel de Icaza
5 * Sources:
6 * The Linux depca driver
7 * The Linux lance driver.
8 * The Linux skeleton driver.
9 * The NetBSD Sparc/Lance driver.
10 * Theo de Raadt (deraadt@openbsd.org)
11 * NCR92C990 Lan Controller manual
12 *
13 * 1.4:
14 * Added support to run with a ledma on the Sun4m
15 *
16 * 1.5:
17 * Added multiple card detection.
18 *
19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
20 * (ecd@skynet.be)
21 *
22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
23 * (ecd@skynet.be)
24 *
25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
26 * (davem@caip.rutgers.edu)
27 *
28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
29 * this disables auto carrier detection on sun4m. Eddie C. Dost
30 * (ecd@skynet.be)
31 *
32 * 1.7:
33 * 6/26/96: Bug fix for multiple ledmas, miguel.
34 *
35 * 1.8:
36 * Stole multicast code from depca.c, fixed lance_tx.
37 *
38 * 1.9:
39 * 8/21/96: Fixed the multicast code (Pedro Roque)
40 *
41 * 8/28/96: Send fake packet in lance_open() if auto_select is true,
42 * so we can detect the carrier loss condition in time.
43 * Eddie C. Dost (ecd@skynet.be)
44 *
45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
47 *
48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
49 *
50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
51 * This was the sun4c killer. Shit, stupid bug.
52 * (ecd@skynet.be)
53 *
54 * 1.10:
55 * 1/26/97: Modularize driver. (ecd@skynet.be)
56 *
57 * 1.11:
58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
59 *
60 * 1.12:
61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
62 * Anton Blanchard (anton@progsoc.uts.edu.au)
63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
64 * David S. Miller (davem@redhat.com)
65 * 2.01:
66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
67 *
68 */
69
70 #undef DEBUG_DRIVER
71
72 static char version[] =
73 "sunlance.c:v2.02 24/Aug/03 Miguel de Icaza (miguel@nuclecu.unam.mx)\n";
74
75 static char lancestr[] = "LANCE";
76
77 #include <linux/config.h>
78 #include <linux/module.h>
79 #include <linux/kernel.h>
80 #include <linux/types.h>
81 #include <linux/fcntl.h>
82 #include <linux/interrupt.h>
83 #include <linux/ioport.h>
84 #include <linux/in.h>
85 #include <linux/slab.h>
86 #include <linux/string.h>
87 #include <linux/delay.h>
88 #include <linux/init.h>
89 #include <linux/crc32.h>
90 #include <linux/errno.h>
91 #include <linux/socket.h> /* Used for the temporal inet entries and routing */
92 #include <linux/route.h>
93 #include <linux/netdevice.h>
94 #include <linux/etherdevice.h>
95 #include <linux/skbuff.h>
96 #include <linux/ethtool.h>
97
98 #include <asm/system.h>
99 #include <asm/bitops.h>
100 #include <asm/io.h>
101 #include <asm/dma.h>
102 #include <asm/pgtable.h>
103 #include <asm/byteorder.h> /* Used by the checksum routines */
104 #include <asm/idprom.h>
105 #include <asm/sbus.h>
106 #include <asm/openprom.h>
107 #include <asm/oplib.h>
108 #include <asm/auxio.h> /* For tpe-link-test? setting */
109 #include <asm/irq.h>
110
111 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
112 #ifndef LANCE_LOG_TX_BUFFERS
113 #define LANCE_LOG_TX_BUFFERS 4
114 #define LANCE_LOG_RX_BUFFERS 4
115 #endif
116
117 #define LE_CSR0 0
118 #define LE_CSR1 1
119 #define LE_CSR2 2
120 #define LE_CSR3 3
121
122 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
123
124 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
125 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
126 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
127 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
128 #define LE_C0_MERR 0x0800 /* ME: Memory error */
129 #define LE_C0_RINT 0x0400 /* Received interrupt */
130 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
131 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
132 #define LE_C0_INTR 0x0080 /* Interrupt or error */
133 #define LE_C0_INEA 0x0040 /* Interrupt enable */
134 #define LE_C0_RXON 0x0020 /* Receiver on */
135 #define LE_C0_TXON 0x0010 /* Transmitter on */
136 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
137 #define LE_C0_STOP 0x0004 /* Stop the card */
138 #define LE_C0_STRT 0x0002 /* Start the card */
139 #define LE_C0_INIT 0x0001 /* Init the card */
140
141 #define LE_C3_BSWP 0x4 /* SWAP */
142 #define LE_C3_ACON 0x2 /* ALE Control */
143 #define LE_C3_BCON 0x1 /* Byte control */
144
145 /* Receive message descriptor 1 */
146 #define LE_R1_OWN 0x80 /* Who owns the entry */
147 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
148 #define LE_R1_FRA 0x20 /* FRA: Frame error */
149 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
150 #define LE_R1_CRC 0x08 /* CRC error */
151 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
152 #define LE_R1_SOP 0x02 /* Start of packet */
153 #define LE_R1_EOP 0x01 /* End of packet */
154 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
155
156 #define LE_T1_OWN 0x80 /* Lance owns the packet */
157 #define LE_T1_ERR 0x40 /* Error summary */
158 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
159 #define LE_T1_EONE 0x08 /* Error: one retry needed */
160 #define LE_T1_EDEF 0x04 /* Error: deferred */
161 #define LE_T1_SOP 0x02 /* Start of packet */
162 #define LE_T1_EOP 0x01 /* End of packet */
163 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
164
165 #define LE_T3_BUF 0x8000 /* Buffer error */
166 #define LE_T3_UFL 0x4000 /* Error underflow */
167 #define LE_T3_LCOL 0x1000 /* Error late collision */
168 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
169 #define LE_T3_RTY 0x0400 /* Error retry */
170 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
171
172 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
173 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
174 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
175 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
176
177 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
178 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
179 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
180 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
181
182 #define PKT_BUF_SZ 1544
183 #define RX_BUFF_SIZE PKT_BUF_SZ
184 #define TX_BUFF_SIZE PKT_BUF_SZ
185
186 struct lance_rx_desc {
187 u16 rmd0; /* low address of packet */
188 u8 rmd1_bits; /* descriptor bits */
189 u8 rmd1_hadr; /* high address of packet */
190 s16 length; /* This length is 2s complement (negative)!
191 * Buffer length
192 */
193 u16 mblength; /* This is the actual number of bytes received */
194 };
195
196 struct lance_tx_desc {
197 u16 tmd0; /* low address of packet */
198 u8 tmd1_bits; /* descriptor bits */
199 u8 tmd1_hadr; /* high address of packet */
200 s16 length; /* Length is 2s complement (negative)! */
201 u16 misc;
202 };
203
204 /* The LANCE initialization block, described in databook. */
205 /* On the Sparc, this block should be on a DMA region */
206 struct lance_init_block {
207 u16 mode; /* Pre-set mode (reg. 15) */
208 u8 phys_addr[6]; /* Physical ethernet address */
209 u32 filter[2]; /* Multicast filter. */
210
211 /* Receive and transmit ring base, along with extra bits. */
212 u16 rx_ptr; /* receive descriptor addr */
213 u16 rx_len; /* receive len and high addr */
214 u16 tx_ptr; /* transmit descriptor addr */
215 u16 tx_len; /* transmit len and high addr */
216
217 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
218 struct lance_rx_desc brx_ring[RX_RING_SIZE];
219 struct lance_tx_desc btx_ring[TX_RING_SIZE];
220
221 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
222 u8 pad[2]; /* align rx_buf for copy_and_sum(). */
223 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
224 };
225
226 #define libdesc_offset(rt, elem) \
227 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
228
229 #define libbuff_offset(rt, elem) \
230 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
231
232 struct lance_private {
233 void __iomem *lregs; /* Lance RAP/RDP regs. */
234 void __iomem *dregs; /* DMA controller regs. */
235 struct lance_init_block *init_block;
236
237 spinlock_t lock;
238
239 int rx_new, tx_new;
240 int rx_old, tx_old;
241
242 struct net_device_stats stats;
243 struct sbus_dma *ledma; /* If set this points to ledma */
244 char tpe; /* cable-selection is TPE */
245 char auto_select; /* cable-selection by carrier */
246 char burst_sizes; /* ledma SBus burst sizes */
247 char pio_buffer; /* init block in PIO space? */
248
249 unsigned short busmaster_regval;
250
251 void (*init_ring)(struct net_device *);
252 void (*rx)(struct net_device *);
253 void (*tx)(struct net_device *);
254
255 char *name;
256 dma_addr_t init_block_dvma;
257 struct net_device *dev; /* Backpointer */
258 struct lance_private *next_module;
259 struct sbus_dev *sdev;
260 struct timer_list multicast_timer;
261 };
262
263 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
264 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
265 lp->tx_old - lp->tx_new-1)
266
267 /* Lance registers. */
268 #define RDP 0x00UL /* register data port */
269 #define RAP 0x02UL /* register address port */
270 #define LANCE_REG_SIZE 0x04UL
271
272 #define STOP_LANCE(__lp) \
273 do { void __iomem *__base = (__lp)->lregs; \
274 sbus_writew(LE_CSR0, __base + RAP); \
275 sbus_writew(LE_C0_STOP, __base + RDP); \
276 } while (0)
277
278 int sparc_lance_debug = 2;
279
280 /* The Lance uses 24 bit addresses */
281 /* On the Sun4c the DVMA will provide the remaining bytes for us */
282 /* On the Sun4m we have to instruct the ledma to provide them */
283 /* Even worse, on scsi/ether SBUS cards, the init block and the
284 * transmit/receive buffers are addresses as offsets from absolute
285 * zero on the lebuffer PIO area. -DaveM
286 */
287
288 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
289
290 static struct lance_private *root_lance_dev;
291
292 /* Load the CSR registers */
293 static void load_csrs(struct lance_private *lp)
294 {
295 u32 leptr;
296
297 if (lp->pio_buffer)
298 leptr = 0;
299 else
300 leptr = LANCE_ADDR(lp->init_block_dvma);
301
302 sbus_writew(LE_CSR1, lp->lregs + RAP);
303 sbus_writew(leptr & 0xffff, lp->lregs + RDP);
304 sbus_writew(LE_CSR2, lp->lregs + RAP);
305 sbus_writew(leptr >> 16, lp->lregs + RDP);
306 sbus_writew(LE_CSR3, lp->lregs + RAP);
307 sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
308
309 /* Point back to csr0 */
310 sbus_writew(LE_CSR0, lp->lregs + RAP);
311 }
312
313 /* Setup the Lance Rx and Tx rings */
314 static void lance_init_ring_dvma(struct net_device *dev)
315 {
316 struct lance_private *lp = netdev_priv(dev);
317 struct lance_init_block *ib = lp->init_block;
318 dma_addr_t aib = lp->init_block_dvma;
319 __u32 leptr;
320 int i;
321
322 /* Lock out other processes while setting up hardware */
323 netif_stop_queue(dev);
324 lp->rx_new = lp->tx_new = 0;
325 lp->rx_old = lp->tx_old = 0;
326
327 /* Copy the ethernet address to the lance init block
328 * Note that on the sparc you need to swap the ethernet address.
329 */
330 ib->phys_addr [0] = dev->dev_addr [1];
331 ib->phys_addr [1] = dev->dev_addr [0];
332 ib->phys_addr [2] = dev->dev_addr [3];
333 ib->phys_addr [3] = dev->dev_addr [2];
334 ib->phys_addr [4] = dev->dev_addr [5];
335 ib->phys_addr [5] = dev->dev_addr [4];
336
337 /* Setup the Tx ring entries */
338 for (i = 0; i <= TX_RING_SIZE; i++) {
339 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
340 ib->btx_ring [i].tmd0 = leptr;
341 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
342 ib->btx_ring [i].tmd1_bits = 0;
343 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
344 ib->btx_ring [i].misc = 0;
345 }
346
347 /* Setup the Rx ring entries */
348 for (i = 0; i < RX_RING_SIZE; i++) {
349 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
350
351 ib->brx_ring [i].rmd0 = leptr;
352 ib->brx_ring [i].rmd1_hadr = leptr >> 16;
353 ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
354 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
355 ib->brx_ring [i].mblength = 0;
356 }
357
358 /* Setup the initialization block */
359
360 /* Setup rx descriptor pointer */
361 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
362 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
363 ib->rx_ptr = leptr;
364
365 /* Setup tx descriptor pointer */
366 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
367 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
368 ib->tx_ptr = leptr;
369 }
370
371 static void lance_init_ring_pio(struct net_device *dev)
372 {
373 struct lance_private *lp = netdev_priv(dev);
374 struct lance_init_block *ib = lp->init_block;
375 u32 leptr;
376 int i;
377
378 /* Lock out other processes while setting up hardware */
379 netif_stop_queue(dev);
380 lp->rx_new = lp->tx_new = 0;
381 lp->rx_old = lp->tx_old = 0;
382
383 /* Copy the ethernet address to the lance init block
384 * Note that on the sparc you need to swap the ethernet address.
385 */
386 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
387 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
388 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
389 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
390 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
391 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
392
393 /* Setup the Tx ring entries */
394 for (i = 0; i <= TX_RING_SIZE; i++) {
395 leptr = libbuff_offset(tx_buf, i);
396 sbus_writew(leptr, &ib->btx_ring [i].tmd0);
397 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
398 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
399
400 /* The ones required by tmd2 */
401 sbus_writew(0xf000, &ib->btx_ring [i].length);
402 sbus_writew(0, &ib->btx_ring [i].misc);
403 }
404
405 /* Setup the Rx ring entries */
406 for (i = 0; i < RX_RING_SIZE; i++) {
407 leptr = libbuff_offset(rx_buf, i);
408
409 sbus_writew(leptr, &ib->brx_ring [i].rmd0);
410 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
411 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
412 sbus_writew(-RX_BUFF_SIZE|0xf000,
413 &ib->brx_ring [i].length);
414 sbus_writew(0, &ib->brx_ring [i].mblength);
415 }
416
417 /* Setup the initialization block */
418
419 /* Setup rx descriptor pointer */
420 leptr = libdesc_offset(brx_ring, 0);
421 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
422 &ib->rx_len);
423 sbus_writew(leptr, &ib->rx_ptr);
424
425 /* Setup tx descriptor pointer */
426 leptr = libdesc_offset(btx_ring, 0);
427 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
428 &ib->tx_len);
429 sbus_writew(leptr, &ib->tx_ptr);
430 }
431
432 static void init_restart_ledma(struct lance_private *lp)
433 {
434 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
435
436 if (!(csr & DMA_HNDL_ERROR)) {
437 /* E-Cache draining */
438 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
439 barrier();
440 }
441
442 csr = sbus_readl(lp->dregs + DMA_CSR);
443 csr &= ~DMA_E_BURSTS;
444 if (lp->burst_sizes & DMA_BURST32)
445 csr |= DMA_E_BURST32;
446 else
447 csr |= DMA_E_BURST16;
448
449 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
450
451 if (lp->tpe)
452 csr |= DMA_EN_ENETAUI;
453 else
454 csr &= ~DMA_EN_ENETAUI;
455 udelay(20);
456 sbus_writel(csr, lp->dregs + DMA_CSR);
457 udelay(200);
458 }
459
460 static int init_restart_lance(struct lance_private *lp)
461 {
462 u16 regval = 0;
463 int i;
464
465 if (lp->dregs)
466 init_restart_ledma(lp);
467
468 sbus_writew(LE_CSR0, lp->lregs + RAP);
469 sbus_writew(LE_C0_INIT, lp->lregs + RDP);
470
471 /* Wait for the lance to complete initialization */
472 for (i = 0; i < 100; i++) {
473 regval = sbus_readw(lp->lregs + RDP);
474
475 if (regval & (LE_C0_ERR | LE_C0_IDON))
476 break;
477 barrier();
478 }
479 if (i == 100 || (regval & LE_C0_ERR)) {
480 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
481 i, regval);
482 if (lp->dregs)
483 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
484 return -1;
485 }
486
487 /* Clear IDON by writing a "1", enable interrupts and start lance */
488 sbus_writew(LE_C0_IDON, lp->lregs + RDP);
489 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
490
491 if (lp->dregs) {
492 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
493
494 csr |= DMA_INT_ENAB;
495 sbus_writel(csr, lp->dregs + DMA_CSR);
496 }
497
498 return 0;
499 }
500
501 static void lance_rx_dvma(struct net_device *dev)
502 {
503 struct lance_private *lp = netdev_priv(dev);
504 struct lance_init_block *ib = lp->init_block;
505 struct lance_rx_desc *rd;
506 u8 bits;
507 int len, entry = lp->rx_new;
508 struct sk_buff *skb;
509
510 for (rd = &ib->brx_ring [entry];
511 !((bits = rd->rmd1_bits) & LE_R1_OWN);
512 rd = &ib->brx_ring [entry]) {
513
514 /* We got an incomplete frame? */
515 if ((bits & LE_R1_POK) != LE_R1_POK) {
516 lp->stats.rx_over_errors++;
517 lp->stats.rx_errors++;
518 } else if (bits & LE_R1_ERR) {
519 /* Count only the end frame as a rx error,
520 * not the beginning
521 */
522 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
523 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
524 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
525 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
526 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
527 } else {
528 len = (rd->mblength & 0xfff) - 4;
529 skb = dev_alloc_skb(len + 2);
530
531 if (skb == NULL) {
532 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
533 dev->name);
534 lp->stats.rx_dropped++;
535 rd->mblength = 0;
536 rd->rmd1_bits = LE_R1_OWN;
537 lp->rx_new = RX_NEXT(entry);
538 return;
539 }
540
541 lp->stats.rx_bytes += len;
542
543 skb->dev = dev;
544 skb_reserve(skb, 2); /* 16 byte align */
545 skb_put(skb, len); /* make room */
546 eth_copy_and_sum(skb,
547 (unsigned char *)&(ib->rx_buf [entry][0]),
548 len, 0);
549 skb->protocol = eth_type_trans(skb, dev);
550 netif_rx(skb);
551 dev->last_rx = jiffies;
552 lp->stats.rx_packets++;
553 }
554
555 /* Return the packet to the pool */
556 rd->mblength = 0;
557 rd->rmd1_bits = LE_R1_OWN;
558 entry = RX_NEXT(entry);
559 }
560
561 lp->rx_new = entry;
562 }
563
564 static void lance_tx_dvma(struct net_device *dev)
565 {
566 struct lance_private *lp = netdev_priv(dev);
567 struct lance_init_block *ib = lp->init_block;
568 int i, j;
569
570 spin_lock(&lp->lock);
571
572 j = lp->tx_old;
573 for (i = j; i != lp->tx_new; i = j) {
574 struct lance_tx_desc *td = &ib->btx_ring [i];
575 u8 bits = td->tmd1_bits;
576
577 /* If we hit a packet not owned by us, stop */
578 if (bits & LE_T1_OWN)
579 break;
580
581 if (bits & LE_T1_ERR) {
582 u16 status = td->misc;
583
584 lp->stats.tx_errors++;
585 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
586 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
587
588 if (status & LE_T3_CLOS) {
589 lp->stats.tx_carrier_errors++;
590 if (lp->auto_select) {
591 lp->tpe = 1 - lp->tpe;
592 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
593 dev->name, lp->tpe?"TPE":"AUI");
594 STOP_LANCE(lp);
595 lp->init_ring(dev);
596 load_csrs(lp);
597 init_restart_lance(lp);
598 goto out;
599 }
600 }
601
602 /* Buffer errors and underflows turn off the
603 * transmitter, restart the adapter.
604 */
605 if (status & (LE_T3_BUF|LE_T3_UFL)) {
606 lp->stats.tx_fifo_errors++;
607
608 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
609 dev->name);
610 STOP_LANCE(lp);
611 lp->init_ring(dev);
612 load_csrs(lp);
613 init_restart_lance(lp);
614 goto out;
615 }
616 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
617 /*
618 * So we don't count the packet more than once.
619 */
620 td->tmd1_bits = bits & ~(LE_T1_POK);
621
622 /* One collision before packet was sent. */
623 if (bits & LE_T1_EONE)
624 lp->stats.collisions++;
625
626 /* More than one collision, be optimistic. */
627 if (bits & LE_T1_EMORE)
628 lp->stats.collisions += 2;
629
630 lp->stats.tx_packets++;
631 }
632
633 j = TX_NEXT(j);
634 }
635 lp->tx_old = j;
636 out:
637 if (netif_queue_stopped(dev) &&
638 TX_BUFFS_AVAIL > 0)
639 netif_wake_queue(dev);
640
641 spin_unlock(&lp->lock);
642 }
643
644 static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
645 {
646 u16 *p16 = (u16 *) skb->data;
647 u32 *p32;
648 u8 *p8;
649 void __iomem *pbuf = piobuf;
650
651 /* We know here that both src and dest are on a 16bit boundary. */
652 *p16++ = sbus_readw(pbuf);
653 p32 = (u32 *) p16;
654 pbuf += 2;
655 len -= 2;
656
657 while (len >= 4) {
658 *p32++ = sbus_readl(pbuf);
659 pbuf += 4;
660 len -= 4;
661 }
662 p8 = (u8 *) p32;
663 if (len >= 2) {
664 p16 = (u16 *) p32;
665 *p16++ = sbus_readw(pbuf);
666 pbuf += 2;
667 len -= 2;
668 p8 = (u8 *) p16;
669 }
670 if (len >= 1)
671 *p8 = sbus_readb(pbuf);
672 }
673
674 static void lance_rx_pio(struct net_device *dev)
675 {
676 struct lance_private *lp = netdev_priv(dev);
677 struct lance_init_block *ib = lp->init_block;
678 struct lance_rx_desc *rd;
679 unsigned char bits;
680 int len, entry;
681 struct sk_buff *skb;
682
683 entry = lp->rx_new;
684 for (rd = &ib->brx_ring [entry];
685 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
686 rd = &ib->brx_ring [entry]) {
687
688 /* We got an incomplete frame? */
689 if ((bits & LE_R1_POK) != LE_R1_POK) {
690 lp->stats.rx_over_errors++;
691 lp->stats.rx_errors++;
692 } else if (bits & LE_R1_ERR) {
693 /* Count only the end frame as a rx error,
694 * not the beginning
695 */
696 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
697 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
698 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
699 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
700 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
701 } else {
702 len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
703 skb = dev_alloc_skb(len + 2);
704
705 if (skb == NULL) {
706 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
707 dev->name);
708 lp->stats.rx_dropped++;
709 sbus_writew(0, &rd->mblength);
710 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
711 lp->rx_new = RX_NEXT(entry);
712 return;
713 }
714
715 lp->stats.rx_bytes += len;
716
717 skb->dev = dev;
718 skb_reserve (skb, 2); /* 16 byte align */
719 skb_put(skb, len); /* make room */
720 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
721 skb->protocol = eth_type_trans(skb, dev);
722 netif_rx(skb);
723 dev->last_rx = jiffies;
724 lp->stats.rx_packets++;
725 }
726
727 /* Return the packet to the pool */
728 sbus_writew(0, &rd->mblength);
729 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
730 entry = RX_NEXT(entry);
731 }
732
733 lp->rx_new = entry;
734 }
735
736 static void lance_tx_pio(struct net_device *dev)
737 {
738 struct lance_private *lp = netdev_priv(dev);
739 struct lance_init_block *ib = lp->init_block;
740 int i, j;
741
742 spin_lock(&lp->lock);
743
744 j = lp->tx_old;
745 for (i = j; i != lp->tx_new; i = j) {
746 struct lance_tx_desc *td = &ib->btx_ring [i];
747 u8 bits = sbus_readb(&td->tmd1_bits);
748
749 /* If we hit a packet not owned by us, stop */
750 if (bits & LE_T1_OWN)
751 break;
752
753 if (bits & LE_T1_ERR) {
754 u16 status = sbus_readw(&td->misc);
755
756 lp->stats.tx_errors++;
757 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
758 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
759
760 if (status & LE_T3_CLOS) {
761 lp->stats.tx_carrier_errors++;
762 if (lp->auto_select) {
763 lp->tpe = 1 - lp->tpe;
764 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
765 dev->name, lp->tpe?"TPE":"AUI");
766 STOP_LANCE(lp);
767 lp->init_ring(dev);
768 load_csrs(lp);
769 init_restart_lance(lp);
770 goto out;
771 }
772 }
773
774 /* Buffer errors and underflows turn off the
775 * transmitter, restart the adapter.
776 */
777 if (status & (LE_T3_BUF|LE_T3_UFL)) {
778 lp->stats.tx_fifo_errors++;
779
780 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
781 dev->name);
782 STOP_LANCE(lp);
783 lp->init_ring(dev);
784 load_csrs(lp);
785 init_restart_lance(lp);
786 goto out;
787 }
788 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
789 /*
790 * So we don't count the packet more than once.
791 */
792 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
793
794 /* One collision before packet was sent. */
795 if (bits & LE_T1_EONE)
796 lp->stats.collisions++;
797
798 /* More than one collision, be optimistic. */
799 if (bits & LE_T1_EMORE)
800 lp->stats.collisions += 2;
801
802 lp->stats.tx_packets++;
803 }
804
805 j = TX_NEXT(j);
806 }
807 lp->tx_old = j;
808
809 if (netif_queue_stopped(dev) &&
810 TX_BUFFS_AVAIL > 0)
811 netif_wake_queue(dev);
812 out:
813 spin_unlock(&lp->lock);
814 }
815
816 static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
817 {
818 struct net_device *dev = (struct net_device *)dev_id;
819 struct lance_private *lp = netdev_priv(dev);
820 int csr0;
821
822 sbus_writew(LE_CSR0, lp->lregs + RAP);
823 csr0 = sbus_readw(lp->lregs + RDP);
824
825 /* Acknowledge all the interrupt sources ASAP */
826 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
827 lp->lregs + RDP);
828
829 if ((csr0 & LE_C0_ERR) != 0) {
830 /* Clear the error condition */
831 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
832 LE_C0_CERR | LE_C0_MERR),
833 lp->lregs + RDP);
834 }
835
836 if (csr0 & LE_C0_RINT)
837 lp->rx(dev);
838
839 if (csr0 & LE_C0_TINT)
840 lp->tx(dev);
841
842 if (csr0 & LE_C0_BABL)
843 lp->stats.tx_errors++;
844
845 if (csr0 & LE_C0_MISS)
846 lp->stats.rx_errors++;
847
848 if (csr0 & LE_C0_MERR) {
849 if (lp->dregs) {
850 u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
851
852 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
853 dev->name, csr0, addr & 0xffffff);
854 } else {
855 printk(KERN_ERR "%s: Memory error, status %04x\n",
856 dev->name, csr0);
857 }
858
859 sbus_writew(LE_C0_STOP, lp->lregs + RDP);
860
861 if (lp->dregs) {
862 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
863
864 dma_csr |= DMA_FIFO_INV;
865 sbus_writel(dma_csr, lp->dregs + DMA_CSR);
866 }
867
868 lp->init_ring(dev);
869 load_csrs(lp);
870 init_restart_lance(lp);
871 netif_wake_queue(dev);
872 }
873
874 sbus_writew(LE_C0_INEA, lp->lregs + RDP);
875
876 return IRQ_HANDLED;
877 }
878
879 /* Build a fake network packet and send it to ourselves. */
880 static void build_fake_packet(struct lance_private *lp)
881 {
882 struct net_device *dev = lp->dev;
883 struct lance_init_block *ib = lp->init_block;
884 u16 *packet;
885 struct ethhdr *eth;
886 int i, entry;
887
888 entry = lp->tx_new & TX_RING_MOD_MASK;
889 packet = (u16 *) &(ib->tx_buf[entry][0]);
890 eth = (struct ethhdr *) packet;
891 if (lp->pio_buffer) {
892 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
893 sbus_writew(0, &packet[i]);
894 for (i = 0; i < 6; i++) {
895 sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
896 sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
897 }
898 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
899 sbus_writew(0, &ib->btx_ring[entry].misc);
900 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
901 } else {
902 memset(packet, 0, ETH_ZLEN);
903 for (i = 0; i < 6; i++) {
904 eth->h_dest[i] = dev->dev_addr[i];
905 eth->h_source[i] = dev->dev_addr[i];
906 }
907 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
908 ib->btx_ring[entry].misc = 0;
909 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
910 }
911 lp->tx_new = TX_NEXT(entry);
912 }
913
914 struct net_device *last_dev;
915
916 static int lance_open(struct net_device *dev)
917 {
918 struct lance_private *lp = netdev_priv(dev);
919 struct lance_init_block *ib = lp->init_block;
920 int status = 0;
921
922 last_dev = dev;
923
924 STOP_LANCE(lp);
925
926 if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ,
927 lancestr, (void *) dev)) {
928 printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq));
929 return -EAGAIN;
930 }
931
932 /* On the 4m, setup the ledma to provide the upper bits for buffers */
933 if (lp->dregs) {
934 u32 regval = lp->init_block_dvma & 0xff000000;
935
936 sbus_writel(regval, lp->dregs + DMA_TEST);
937 }
938
939 /* Set mode and clear multicast filter only at device open,
940 * so that lance_init_ring() called at any error will not
941 * forget multicast filters.
942 *
943 * BTW it is common bug in all lance drivers! --ANK
944 */
945 if (lp->pio_buffer) {
946 sbus_writew(0, &ib->mode);
947 sbus_writel(0, &ib->filter[0]);
948 sbus_writel(0, &ib->filter[1]);
949 } else {
950 ib->mode = 0;
951 ib->filter [0] = 0;
952 ib->filter [1] = 0;
953 }
954
955 lp->init_ring(dev);
956 load_csrs(lp);
957
958 netif_start_queue(dev);
959
960 status = init_restart_lance(lp);
961 if (!status && lp->auto_select) {
962 build_fake_packet(lp);
963 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
964 }
965
966 return status;
967 }
968
969 static int lance_close(struct net_device *dev)
970 {
971 struct lance_private *lp = netdev_priv(dev);
972
973 netif_stop_queue(dev);
974 del_timer_sync(&lp->multicast_timer);
975
976 STOP_LANCE(lp);
977
978 free_irq(dev->irq, (void *) dev);
979 return 0;
980 }
981
982 static int lance_reset(struct net_device *dev)
983 {
984 struct lance_private *lp = netdev_priv(dev);
985 int status;
986
987 STOP_LANCE(lp);
988
989 /* On the 4m, reset the dma too */
990 if (lp->dregs) {
991 u32 csr, addr;
992
993 printk(KERN_ERR "resetting ledma\n");
994 csr = sbus_readl(lp->dregs + DMA_CSR);
995 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
996 udelay(200);
997 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
998
999 addr = lp->init_block_dvma & 0xff000000;
1000 sbus_writel(addr, lp->dregs + DMA_TEST);
1001 }
1002 lp->init_ring(dev);
1003 load_csrs(lp);
1004 dev->trans_start = jiffies;
1005 status = init_restart_lance(lp);
1006 return status;
1007 }
1008
1009 static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
1010 {
1011 void __iomem *piobuf = dest;
1012 u32 *p32;
1013 u16 *p16;
1014 u8 *p8;
1015
1016 switch ((unsigned long)src & 0x3) {
1017 case 0:
1018 p32 = (u32 *) src;
1019 while (len >= 4) {
1020 sbus_writel(*p32, piobuf);
1021 p32++;
1022 piobuf += 4;
1023 len -= 4;
1024 }
1025 src = (char *) p32;
1026 break;
1027 case 1:
1028 case 3:
1029 p8 = (u8 *) src;
1030 while (len >= 4) {
1031 u32 val;
1032
1033 val = p8[0] << 24;
1034 val |= p8[1] << 16;
1035 val |= p8[2] << 8;
1036 val |= p8[3];
1037 sbus_writel(val, piobuf);
1038 p8 += 4;
1039 piobuf += 4;
1040 len -= 4;
1041 }
1042 src = (char *) p8;
1043 break;
1044 case 2:
1045 p16 = (u16 *) src;
1046 while (len >= 4) {
1047 u32 val = p16[0]<<16 | p16[1];
1048 sbus_writel(val, piobuf);
1049 p16 += 2;
1050 piobuf += 4;
1051 len -= 4;
1052 }
1053 src = (char *) p16;
1054 break;
1055 };
1056 if (len >= 2) {
1057 u16 val = src[0] << 8 | src[1];
1058 sbus_writew(val, piobuf);
1059 src += 2;
1060 piobuf += 2;
1061 len -= 2;
1062 }
1063 if (len >= 1)
1064 sbus_writeb(src[0], piobuf);
1065 }
1066
1067 static void lance_piozero(void __iomem *dest, int len)
1068 {
1069 void __iomem *piobuf = dest;
1070
1071 if ((unsigned long)piobuf & 1) {
1072 sbus_writeb(0, piobuf);
1073 piobuf += 1;
1074 len -= 1;
1075 if (len == 0)
1076 return;
1077 }
1078 if (len == 1) {
1079 sbus_writeb(0, piobuf);
1080 return;
1081 }
1082 if ((unsigned long)piobuf & 2) {
1083 sbus_writew(0, piobuf);
1084 piobuf += 2;
1085 len -= 2;
1086 if (len == 0)
1087 return;
1088 }
1089 while (len >= 4) {
1090 sbus_writel(0, piobuf);
1091 piobuf += 4;
1092 len -= 4;
1093 }
1094 if (len >= 2) {
1095 sbus_writew(0, piobuf);
1096 piobuf += 2;
1097 len -= 2;
1098 }
1099 if (len >= 1)
1100 sbus_writeb(0, piobuf);
1101 }
1102
1103 static void lance_tx_timeout(struct net_device *dev)
1104 {
1105 struct lance_private *lp = netdev_priv(dev);
1106
1107 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
1108 dev->name, sbus_readw(lp->lregs + RDP));
1109 lance_reset(dev);
1110 netif_wake_queue(dev);
1111 }
1112
1113 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
1114 {
1115 struct lance_private *lp = netdev_priv(dev);
1116 struct lance_init_block *ib = lp->init_block;
1117 int entry, skblen, len;
1118
1119 skblen = skb->len;
1120
1121 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
1122
1123 spin_lock_irq(&lp->lock);
1124
1125 lp->stats.tx_bytes += len;
1126
1127 entry = lp->tx_new & TX_RING_MOD_MASK;
1128 if (lp->pio_buffer) {
1129 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
1130 sbus_writew(0, &ib->btx_ring[entry].misc);
1131 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
1132 if (len != skblen)
1133 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
1134 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
1135 } else {
1136 ib->btx_ring [entry].length = (-len) | 0xf000;
1137 ib->btx_ring [entry].misc = 0;
1138 memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
1139 if (len != skblen)
1140 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
1141 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
1142 }
1143
1144 lp->tx_new = TX_NEXT(entry);
1145
1146 if (TX_BUFFS_AVAIL <= 0)
1147 netif_stop_queue(dev);
1148
1149 /* Kick the lance: transmit now */
1150 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
1151
1152 /* Read back CSR to invalidate the E-Cache.
1153 * This is needed, because DMA_DSBL_WR_INV is set.
1154 */
1155 if (lp->dregs)
1156 sbus_readw(lp->lregs + RDP);
1157
1158 spin_unlock_irq(&lp->lock);
1159
1160 dev->trans_start = jiffies;
1161 dev_kfree_skb(skb);
1162
1163 return 0;
1164 }
1165
1166 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1167 {
1168 struct lance_private *lp = netdev_priv(dev);
1169
1170 return &lp->stats;
1171 }
1172
1173 /* taken from the depca driver */
1174 static void lance_load_multicast(struct net_device *dev)
1175 {
1176 struct lance_private *lp = netdev_priv(dev);
1177 struct lance_init_block *ib = lp->init_block;
1178 u16 *mcast_table = (u16 *) &ib->filter;
1179 struct dev_mc_list *dmi = dev->mc_list;
1180 char *addrs;
1181 int i;
1182 u32 crc;
1183
1184 /* set all multicast bits */
1185 if (dev->flags & IFF_ALLMULTI) {
1186 if (lp->pio_buffer) {
1187 sbus_writel(0xffffffff, &ib->filter[0]);
1188 sbus_writel(0xffffffff, &ib->filter[1]);
1189 } else {
1190 ib->filter [0] = 0xffffffff;
1191 ib->filter [1] = 0xffffffff;
1192 }
1193 return;
1194 }
1195 /* clear the multicast filter */
1196 if (lp->pio_buffer) {
1197 sbus_writel(0, &ib->filter[0]);
1198 sbus_writel(0, &ib->filter[1]);
1199 } else {
1200 ib->filter [0] = 0;
1201 ib->filter [1] = 0;
1202 }
1203
1204 /* Add addresses */
1205 for (i = 0; i < dev->mc_count; i++) {
1206 addrs = dmi->dmi_addr;
1207 dmi = dmi->next;
1208
1209 /* multicast address? */
1210 if (!(*addrs & 1))
1211 continue;
1212 crc = ether_crc_le(6, addrs);
1213 crc = crc >> 26;
1214 if (lp->pio_buffer) {
1215 u16 tmp = sbus_readw(&mcast_table[crc>>4]);
1216 tmp |= 1 << (crc & 0xf);
1217 sbus_writew(tmp, &mcast_table[crc>>4]);
1218 } else {
1219 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1220 }
1221 }
1222 }
1223
1224 static void lance_set_multicast(struct net_device *dev)
1225 {
1226 struct lance_private *lp = netdev_priv(dev);
1227 struct lance_init_block *ib = lp->init_block;
1228 u16 mode;
1229
1230 if (!netif_running(dev))
1231 return;
1232
1233 if (lp->tx_old != lp->tx_new) {
1234 mod_timer(&lp->multicast_timer, jiffies + 4);
1235 netif_wake_queue(dev);
1236 return;
1237 }
1238
1239 netif_stop_queue(dev);
1240
1241 STOP_LANCE(lp);
1242 lp->init_ring(dev);
1243
1244 if (lp->pio_buffer)
1245 mode = sbus_readw(&ib->mode);
1246 else
1247 mode = ib->mode;
1248 if (dev->flags & IFF_PROMISC) {
1249 mode |= LE_MO_PROM;
1250 if (lp->pio_buffer)
1251 sbus_writew(mode, &ib->mode);
1252 else
1253 ib->mode = mode;
1254 } else {
1255 mode &= ~LE_MO_PROM;
1256 if (lp->pio_buffer)
1257 sbus_writew(mode, &ib->mode);
1258 else
1259 ib->mode = mode;
1260 lance_load_multicast(dev);
1261 }
1262 load_csrs(lp);
1263 init_restart_lance(lp);
1264 netif_wake_queue(dev);
1265 }
1266
1267 static void lance_set_multicast_retry(unsigned long _opaque)
1268 {
1269 struct net_device *dev = (struct net_device *) _opaque;
1270
1271 lance_set_multicast(dev);
1272 }
1273
1274 static void lance_free_hwresources(struct lance_private *lp)
1275 {
1276 if (lp->lregs)
1277 sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
1278 if (lp->init_block != NULL) {
1279 if (lp->pio_buffer) {
1280 sbus_iounmap(lp->init_block,
1281 sizeof(struct lance_init_block));
1282 } else {
1283 sbus_free_consistent(lp->sdev,
1284 sizeof(struct lance_init_block),
1285 lp->init_block,
1286 lp->init_block_dvma);
1287 }
1288 }
1289 }
1290
1291 /* Ethtool support... */
1292 static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1293 {
1294 struct lance_private *lp = netdev_priv(dev);
1295
1296 strcpy(info->driver, "sunlance");
1297 strcpy(info->version, "2.02");
1298 sprintf(info->bus_info, "SBUS:%d",
1299 lp->sdev->slot);
1300 }
1301
1302 static u32 sparc_lance_get_link(struct net_device *dev)
1303 {
1304 /* We really do not keep track of this, but this
1305 * is better than not reporting anything at all.
1306 */
1307 return 1;
1308 }
1309
1310 static struct ethtool_ops sparc_lance_ethtool_ops = {
1311 .get_drvinfo = sparc_lance_get_drvinfo,
1312 .get_link = sparc_lance_get_link,
1313 };
1314
1315 static int __init sparc_lance_init(struct sbus_dev *sdev,
1316 struct sbus_dma *ledma,
1317 struct sbus_dev *lebuffer)
1318 {
1319 static unsigned version_printed;
1320 struct net_device *dev;
1321 struct lance_private *lp;
1322 int i;
1323
1324 dev = alloc_etherdev(sizeof(struct lance_private) + 8);
1325 if (!dev)
1326 return -ENOMEM;
1327
1328 lp = netdev_priv(dev);
1329
1330 if (sparc_lance_debug && version_printed++ == 0)
1331 printk (KERN_INFO "%s", version);
1332
1333 spin_lock_init(&lp->lock);
1334
1335 /* Copy the IDPROM ethernet address to the device structure, later we
1336 * will copy the address in the device structure to the lance
1337 * initialization block.
1338 */
1339 for (i = 0; i < 6; i++)
1340 dev->dev_addr[i] = idprom->id_ethaddr[i];
1341
1342 /* Get the IO region */
1343 lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
1344 LANCE_REG_SIZE, lancestr);
1345 if (lp->lregs == 0UL) {
1346 printk(KERN_ERR "SunLance: Cannot map registers.\n");
1347 goto fail;
1348 }
1349
1350 lp->sdev = sdev;
1351 if (lebuffer) {
1352 lp->init_block =
1353 sbus_ioremap(&lebuffer->resource[0], 0,
1354 sizeof(struct lance_init_block), "lebuffer");
1355 if (lp->init_block == NULL) {
1356 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
1357 goto fail;
1358 }
1359 lp->init_block_dvma = 0;
1360 lp->pio_buffer = 1;
1361 lp->init_ring = lance_init_ring_pio;
1362 lp->rx = lance_rx_pio;
1363 lp->tx = lance_tx_pio;
1364 } else {
1365 lp->init_block =
1366 sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
1367 &lp->init_block_dvma);
1368 if (lp->init_block == NULL ||
1369 lp->init_block_dvma == 0) {
1370 printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
1371 goto fail;
1372 }
1373 lp->pio_buffer = 0;
1374 lp->init_ring = lance_init_ring_dvma;
1375 lp->rx = lance_rx_dvma;
1376 lp->tx = lance_tx_dvma;
1377 }
1378 lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
1379 "busmaster-regval",
1380 (LE_C3_BSWP | LE_C3_ACON |
1381 LE_C3_BCON));
1382
1383 lp->name = lancestr;
1384 lp->ledma = ledma;
1385
1386 lp->burst_sizes = 0;
1387 if (lp->ledma) {
1388 char prop[6];
1389 unsigned int sbmask;
1390 u32 csr;
1391
1392 /* Find burst-size property for ledma */
1393 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
1394 "burst-sizes", 0);
1395
1396 /* ledma may be capable of fast bursts, but sbus may not. */
1397 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
1398 "burst-sizes", DMA_BURSTBITS);
1399 lp->burst_sizes &= sbmask;
1400
1401 /* Get the cable-selection property */
1402 memset(prop, 0, sizeof(prop));
1403 prom_getstring(ledma->sdev->prom_node, "cable-selection",
1404 prop, sizeof(prop));
1405 if (prop[0] == 0) {
1406 int topnd, nd;
1407
1408 printk(KERN_INFO "SunLance: using auto-carrier-detection.\n");
1409
1410 /* Is this found at /options .attributes in all
1411 * Prom versions? XXX
1412 */
1413 topnd = prom_getchild(prom_root_node);
1414
1415 nd = prom_searchsiblings(topnd, "options");
1416 if (!nd)
1417 goto no_link_test;
1418
1419 if (!prom_node_has_property(nd, "tpe-link-test?"))
1420 goto no_link_test;
1421
1422 memset(prop, 0, sizeof(prop));
1423 prom_getstring(nd, "tpe-link-test?", prop,
1424 sizeof(prop));
1425
1426 if (strcmp(prop, "true")) {
1427 printk(KERN_NOTICE "SunLance: warning: overriding option "
1428 "'tpe-link-test?'\n");
1429 printk(KERN_NOTICE "SunLance: warning: mail any problems "
1430 "to ecd@skynet.be\n");
1431 auxio_set_lte(AUXIO_LTE_ON);
1432 }
1433 no_link_test:
1434 lp->auto_select = 1;
1435 lp->tpe = 0;
1436 } else if (!strcmp(prop, "aui")) {
1437 lp->auto_select = 0;
1438 lp->tpe = 0;
1439 } else {
1440 lp->auto_select = 0;
1441 lp->tpe = 1;
1442 }
1443
1444 lp->dregs = ledma->regs;
1445
1446 /* Reset ledma */
1447 csr = sbus_readl(lp->dregs + DMA_CSR);
1448 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1449 udelay(200);
1450 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1451 } else
1452 lp->dregs = 0;
1453
1454 /* This should never happen. */
1455 if ((unsigned long)(lp->init_block->brx_ring) & 0x07) {
1456 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
1457 goto fail;
1458 }
1459
1460 lp->dev = dev;
1461 SET_MODULE_OWNER(dev);
1462 dev->open = &lance_open;
1463 dev->stop = &lance_close;
1464 dev->hard_start_xmit = &lance_start_xmit;
1465 dev->tx_timeout = &lance_tx_timeout;
1466 dev->watchdog_timeo = 5*HZ;
1467 dev->get_stats = &lance_get_stats;
1468 dev->set_multicast_list = &lance_set_multicast;
1469 dev->ethtool_ops = &sparc_lance_ethtool_ops;
1470
1471 dev->irq = sdev->irqs[0];
1472
1473 dev->dma = 0;
1474
1475 /* We cannot sleep if the chip is busy during a
1476 * multicast list update event, because such events
1477 * can occur from interrupts (ex. IPv6). So we
1478 * use a timer to try again later when necessary. -DaveM
1479 */
1480 init_timer(&lp->multicast_timer);
1481 lp->multicast_timer.data = (unsigned long) dev;
1482 lp->multicast_timer.function = &lance_set_multicast_retry;
1483
1484 if (register_netdev(dev)) {
1485 printk(KERN_ERR "SunLance: Cannot register device.\n");
1486 goto fail;
1487 }
1488
1489 lp->next_module = root_lance_dev;
1490 root_lance_dev = lp;
1491
1492 printk(KERN_INFO "%s: LANCE ", dev->name);
1493
1494 for (i = 0; i < 6; i++)
1495 printk("%2.2x%c", dev->dev_addr[i],
1496 i == 5 ? ' ': ':');
1497 printk("\n");
1498
1499 return 0;
1500
1501 fail:
1502 if (lp != NULL)
1503 lance_free_hwresources(lp);
1504 free_netdev(dev);
1505 return -ENODEV;
1506 }
1507
1508 /* On 4m, find the associated dma for the lance chip */
1509 static inline struct sbus_dma *find_ledma(struct sbus_dev *sdev)
1510 {
1511 struct sbus_dma *p;
1512
1513 for_each_dvma(p) {
1514 if (p->sdev == sdev)
1515 return p;
1516 }
1517 return NULL;
1518 }
1519
1520 #ifdef CONFIG_SUN4
1521
1522 #include <asm/sun4paddr.h>
1523 #include <asm/machines.h>
1524
1525 /* Find all the lance cards on the system and initialize them */
1526 static int __init sparc_lance_probe(void)
1527 {
1528 static struct sbus_dev sdev;
1529 static int called;
1530
1531 root_lance_dev = NULL;
1532
1533 if (called)
1534 return -ENODEV;
1535 called++;
1536
1537 if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
1538 (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
1539 memset(&sdev, 0, sizeof(sdev));
1540 sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
1541 sdev.irqs[0] = 6;
1542 return sparc_lance_init(&sdev, 0, 0);
1543 }
1544 return -ENODEV;
1545 }
1546
1547 #else /* !CONFIG_SUN4 */
1548
1549 /* Find all the lance cards on the system and initialize them */
1550 static int __init sparc_lance_probe(void)
1551 {
1552 struct sbus_bus *bus;
1553 struct sbus_dev *sdev = NULL;
1554 struct sbus_dma *ledma = NULL;
1555 static int called;
1556 int cards = 0, v;
1557
1558 root_lance_dev = NULL;
1559
1560 if (called)
1561 return -ENODEV;
1562 called++;
1563
1564 for_each_sbus (bus) {
1565 for_each_sbusdev (sdev, bus) {
1566 if (strcmp(sdev->prom_name, "le") == 0) {
1567 cards++;
1568 if ((v = sparc_lance_init(sdev, NULL, NULL)))
1569 return v;
1570 continue;
1571 }
1572 if (strcmp(sdev->prom_name, "ledma") == 0) {
1573 cards++;
1574 ledma = find_ledma(sdev);
1575 if ((v = sparc_lance_init(sdev->child,
1576 ledma, NULL)))
1577 return v;
1578 continue;
1579 }
1580 if (strcmp(sdev->prom_name, "lebuffer") == 0){
1581 cards++;
1582 if ((v = sparc_lance_init(sdev->child,
1583 NULL, sdev)))
1584 return v;
1585 continue;
1586 }
1587 } /* for each sbusdev */
1588 } /* for each sbus */
1589 if (!cards)
1590 return -ENODEV;
1591 return 0;
1592 }
1593 #endif /* !CONFIG_SUN4 */
1594
1595 static void __exit sparc_lance_cleanup(void)
1596 {
1597 struct lance_private *lp;
1598
1599 while (root_lance_dev) {
1600 lp = root_lance_dev->next_module;
1601
1602 unregister_netdev(root_lance_dev->dev);
1603 lance_free_hwresources(root_lance_dev);
1604 free_netdev(root_lance_dev->dev);
1605 root_lance_dev = lp;
1606 }
1607 }
1608
1609 module_init(sparc_lance_probe);
1610 module_exit(sparc_lance_cleanup);
1611 MODULE_LICENSE("GPL");
MOXA 2.6.9 from sdlinux-moxaart.tgz