include/asm-nios2nommu/uart_struct.h

   1
   2 // UART Registers
   3 typedef volatile struct
   4         {
   5         int np_uartrxdata;      // Read-only, 8-bit
   6         int np_uarttxdata;      // Write-only, 8-bit
   7         int np_uartstatus;      // Read-only, 8-bit
   8         int np_uartcontrol;     // Read/Write, 9-bit
   9         int np_uartdivisor;     // Read/Write, 16-bit, optional
  10         int np_uartendofpacket; // Read/Write, end-of-packet character
  11         } np_uart;
  12
  13 // UART Status Register Bits
  14 enum
  15         {
  16         np_uartstatus_eop_bit  = 12,
  17         np_uartstatus_cts_bit  = 11,
  18         np_uartstatus_dcts_bit = 10,
  19         np_uartstatus_e_bit    = 8,
  20         np_uartstatus_rrdy_bit = 7,
  21         np_uartstatus_trdy_bit = 6,
  22         np_uartstatus_tmt_bit  = 5,
  23         np_uartstatus_toe_bit  = 4,
  24         np_uartstatus_roe_bit  = 3,
  25         np_uartstatus_brk_bit  = 2,
  26         np_uartstatus_fe_bit   = 1,
  27         np_uartstatus_pe_bit   = 0,
  28
  29         np_uartstatus_eop_mask  = (1<<12),
  30         np_uartstatus_cts_mask  = (1<<11),
  31         np_uartstatus_dcts_mask = (1<<10),
  32         np_uartstatus_e_mask    = (1<<8),
  33         np_uartstatus_rrdy_mask = (1<<7),
  34         np_uartstatus_trdy_mask = (1<<6),
  35         np_uartstatus_tmt_mask  = (1<<5),
  36         np_uartstatus_toe_mask  = (1<<4),
  37         np_uartstatus_roe_mask  = (1<<3),
  38         np_uartstatus_brk_mask  = (1<<2),
  39         np_uartstatus_fe_mask   = (1<<1),
  40         np_uartstatus_pe_mask   = (1<<0)
  41         };
  42
  43 // UART Control Register Bits
  44 enum
  45         {
  46         np_uartcontrol_ieop_bit  = 12,
  47         np_uartcontrol_rts_bit   = 11,
  48         np_uartcontrol_idcts_bit = 10,
  49         np_uartcontrol_tbrk_bit  = 9,
  50         np_uartcontrol_ie_bit    = 8,
  51         np_uartcontrol_irrdy_bit = 7,
  52         np_uartcontrol_itrdy_bit = 6,
  53         np_uartcontrol_itmt_bit  = 5,
  54         np_uartcontrol_itoe_bit  = 4,
  55         np_uartcontrol_iroe_bit  = 3,
  56         np_uartcontrol_ibrk_bit  = 2,
  57         np_uartcontrol_ife_bit   = 1,
  58         np_uartcontrol_ipe_bit   = 0,
  59
  60         np_uartcontrol_ieop_mask  = (1<<12),
  61         np_uartcontrol_rts_mask   = (1<<11),
  62         np_uartcontrol_idcts_mask = (1<<10),
  63         np_uartcontrol_tbrk_mask  = (1<<9),
  64         np_uartcontrol_ie_mask    = (1<<8),
  65         np_uartcontrol_irrdy_mask = (1<<7),
  66         np_uartcontrol_itrdy_mask = (1<<6),
  67         np_uartcontrol_itmt_mask  = (1<<5),
  68         np_uartcontrol_itoe_mask  = (1<<4),
  69         np_uartcontrol_iroe_mask  = (1<<3),
  70         np_uartcontrol_ibrk_mask  = (1<<2),
  71         np_uartcontrol_ife_mask   = (1<<1),
  72         np_uartcontrol_ipe_mask   = (1<<0)
  73         };
  74
  75 // UART Routines
  76 int nr_uart_rxchar(np_uart *uartBase);        // 0 for default UART
  77 void nr_uart_txcr(void);
  78 void nr_uart_txchar(int c,np_uart *uartBase); // 0 for default UART
  79 void nr_uart_txhex(int x);                     // 16 or 32 bits
  80 void nr_uart_txhex16(short x);
  81 void nr_uart_txhex32(long x);
  82 void nr_uart_txstring(char *s);
  83