include/asm-arm/arch-s5c7375/irqs.h

   1 /*
   2  *  linux/include/asm-arm/arch-s5c7375/irqs.h
   3  *
   4  *  Copyright (C) 2003 SAMSUNG ELECTRONIS
   5  *                        Hyok S. Choi <hyok.choi@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #ifndef __S5C7375_irqs_h
  23 #define __S5C7375_irqs_h                        1
  24
  25         #define iSRAMBase    0x06000000    // internal SRAM base address
  26         #define iSRAMTop     0x06001FFC    // top address of interanl SRAM
  27         #define SDRAMBase    0x00000000
  28         #define SDRAMTop     0x003FFFFC
  29
  30 #define SHORTNUMOFINT
  31         /* the number of interrupt source */
  32   #ifdef SHORTNUMOFINT
  33         #define NumOfInt        16
  34   #else
  35         #define NumOfInt        32
  36   #endif
  37         /* for compatibility for linux */
  38         #define NR_IRQS (NumOfInt)
  39
  40         /* Interrupt Vector table address */
  41 #ifdef SHORTNUMOFINT
  42         #define IntVectorTable          iSRAMTop-(NumOfInt << 3)  //internal SRAM area
  43 #else
  44         #define IntVectorTable          iSRAMTop-(NumOfInt << 2)  //internal SRAM area
  45 #endif
  46         #define IntVectorTableEnd       iSRAMTop
  47         //#define IntVectorTable          SDRAMTop-(NumOfInt << 2)  //SDRAM area
  48         //#define IntVectorTableEnd       SDRAMTop
  49
  50         /*
  51          * Interrupt Vector Table
  52          */
  53
  54         #define pIVT_TIMER0     (*(volatile unsigned *)(IntVectorTable))
  55         #define pIVT_TIMER2     (*(volatile unsigned *)(IntVectorTable+0x04))
  56         #define pIVT_TIMER3     (*(volatile unsigned *)(IntVectorTable+0x08))
  57         #define pIVT_USB        (*(volatile unsigned *)(IntVectorTable+0x0C))
  58         #define pIVT_TIMER4     (*(volatile unsigned *)(IntVectorTable+0x10))    // ADD BY HIS
  59         #define pIVT_DMA        (*(volatile unsigned *)(IntVectorTable+0x14))
  60         #define pIVT_TIMER1     (*(volatile unsigned *)(IntVectorTable+0x18))
  61         #define pIVT_I2C        (*(volatile unsigned *)(IntVectorTable+0x1C))
  62         #define pIVT_COMMRX     (*(volatile unsigned *)(IntVectorTable+0x20))
  63         #define pIVT_COMMTX     (*(volatile unsigned *)(IntVectorTable+0x24))
  64         #define pIVT_GPIO       (*(volatile unsigned *)(IntVectorTable+0x28))
  65         #define pIVT_EXT0       (*(volatile unsigned *)(IntVectorTable+0x2C))
  66         #define pIVT_EXT1       (*(volatile unsigned *)(IntVectorTable+0x30))
  67         #define pIVT_EXT2       (*(volatile unsigned *)(IntVectorTable+0x34))
  68         #define pIVT_EXT3       (*(volatile unsigned *)(IntVectorTable+0x38))
  69
  70
  71         /*
  72          *  define the interrupt source corresponing to each interrupt register bits
  73          */
  74
  75         #define INT_TIMER0      0x00000001
  76         #define INT_TIMER2      0x00000002
  77         #define INT_TIMER3      0x00000004
  78         #define INT_USB         0x00000008
  79         #define INT_TIMER4      0x00000010
  80         #define INT_DMA         0x00000020
  81         #define INT_TIMER1      0x00000040
  82         #define INT_I2C         0x00000080
  83         #define INT_COMMRX      0x00000100
  84         #define INT_COMMTX      0x00000200
  85         #define INT_GPIO        0x00000400
  86         #define INT_EXT0        0x00000800
  87         #define INT_EXT1        0x00001000
  88         #define INT_EXT2        0x00002000
  89         #define INT_EXT3        0x00004000
  90
  91         #define INT_N_TIMER0            0
  92         #define INT_N_TIMER2      1
  93         #define INT_N_TIMER3      2
  94         #define INT_N_USB               3
  95         #define INT_N_TIMER4      4
  96         #define INT_N_DMA               5
  97         #define INT_N_TIMER1      6
  98         #define INT_N_I2C               7
  99         #define INT_N_COMMRX            8
 100         #define INT_N_COMMTX    9
 101         #define INT_N_GPIO              10
 102         #define INT_N_EXT0              11
 103         #define INT_N_EXT1              12
 104         #define INT_N_EXT2              13
 105         #define INT_N_EXT3              14
 106
 107
 108
 109         #define EnableFIQ()     (rINTCON = ((rINTCON) & (0x0E)))
 110         #define DisableFIQ()    (rINTCON = ((rINTCON) | (0x01)))
 111
 112         #define EnableIRQ()     (rINTCON = ((rINTCON )& (0x0D)))
 113         #define DisableIRQ()    (rINTCON = ((rINTCON) | (0x02)))
 114
 115         #define EnableGMask()   (rINTCON = ((rINTCON) | (0x08)))
 116         #define DisableGMask()  (rINTCON = ((rINTCON) & (0x07)))
 117
 118         #define EnableInt(x)    (rINTMSK = ((rINTMSK) & (~(x))))
 119         #define DisableInt(x)   (rINTMSK = ((rINTMSK) | (x)))
 120
 121
 122 //      #define OS_TIMER        INT_TIMER4 // used in irq.c?
 123
 124 #endif /* End of __irqs_h */