include/asm-arm/arch-ks8695/ks8695-pci.h

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License as published by
   4  * the Free Software Foundation; either version 2 of the License, or
   5  * (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  15  */
  16 #ifndef __ASM_ARCH_PLATFORM_PCI_H
  17 #define __ASM_ARCH_PLATFORM_PCI_H 1
  18
  19 /* PCI memory related defines */
  20 #define KS8695P_PCIBG_MEM_BASE      0x60000000  /* memory base for bridge*/
  21 #define KS8695P_PCI_MEM_BASE        0x60000000UL/* memory base in PCI space */
  22 #define KS8695P_PCI_MEM_SIZE        0x20000000UL/* 512M, can be extended */
  23 #define KS8695P_PCI_MEM_MASK        0xE0000000  /* 512M */
  24
  25 /* PCI IO related defines */
  26 #define KS8695P_PCIBG_IO_BASE       0x10000000  /* io base for bridge */
  27 #define KS8695P_PCI_IO_BASE         0x10000000
  28 #define KS8695P_PCI_IO_SIZE         0x00010000  /* 64K */
  29 #define KS8695P_PCI_IO_MASK         0xFF800000  /* 64K range */
  30
  31 /* new registers specific to KS8695P */
  32 /* PCI related */
  33 #define KS8695_CRCFID           0x2000
  34 #define KS8695_CRCFCS           0x2004
  35 #define KS8695_CRCFRV           0x2008
  36 #define KS8695_CRCFLT           0x200c
  37 #define KS8695_CRCBMA           0x2010
  38 #define KS8695_CRCBA0           0x2014
  39 #define KS8695_CRCSID           0x202c
  40 #define KS8695_CRCFIT           0x203c
  41
  42 /* bridge configuration related registers */
  43 #define KS8695_PBCA             0x2100
  44 #define KS8695_PBCD             0x2104
  45
  46 /* bridge mode related registers */
  47 #define KS8695_PBM              0x2200
  48 #define KS8695_PBCS             0x2204
  49 #define KS8695_PMBA             0x2208
  50 #define KS8695_PMBAC            0x220c
  51 #define KS8695_PMBAM            0x2210
  52 #define KS8695_PMBAT            0x2214
  53 #define KS8695_PIOBA            0x2218
  54 #define KS8695_PIOBAC           0x221c
  55 #define KS8695_PIOBAM           0x2220
  56 #define KS8695_PIOBAT           0x2224
  57
  58 /* bits for registers */
  59 /* 0x2200 */
  60 #define PBM_BRIDGE_MODE         0x80000000
  61
  62 /* 0x2204 */
  63 #define PBCS_SW_RESET           0x80000000
  64
  65 /* 0x220c */
  66 #define PMBAC_TRANS_ENABLE      0x80000000
  67
  68 #endif /* __ASM_ARCH_PLATFORM_PCI_H */