2 * linux/drivers/serial/serial_dm270.c
4 * Driver for DM270 serial ports
6 * Copyright (c) 2004 Chee Tim Loh <lohct@pacific.net.sg>
8 * Based on drivers/char/serial_s3c4510b.c
9 * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
10 * Curt Brune <curt@cucy.com>
12 * Based on drivers/char/serial_amba.c
13 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 #include <linux/module.h>
31 #include <linux/errno.h>
32 #include <linux/signal.h>
33 #include <linux/sched.h>
34 #include <linux/interrupt.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/major.h>
38 #include <linux/string.h>
39 #include <linux/fcntl.h>
40 #include <linux/ptrace.h>
41 #include <linux/ioport.h>
43 #include <linux/slab.h>
44 #include <linux/init.h>
45 #include <linux/circ_buf.h>
46 #include <linux/serial.h>
47 #include <linux/console.h>
48 #include <linux/sysrq.h>
49 #include <linux/serial_core.h>
51 #include <asm/system.h>
53 #include <asm/mach/irq.h>
54 #include <asm/uaccess.h>
55 #include <asm/bitops.h>
56 #include <asm/arch/hardware.h>
59 #define UART_DRIVER_NAME "TI TMS320DM270 Internal UART"
60 #define UART_TYPE "DM270_UART"
61 #define UART_DEFAULT_BAUD 38400
62 #define UART_ISR_PASS_LIMIT 256
64 #define CONSOLE_DEFAULT_BAUD 38400 /* 38,400 buad */
65 #define CONSOLE_DEFAULT_BITS 8 /* 8 data bits */
66 #define CONSOLE_DEFAULT_PARITY 'n' /* no parity */
67 #define CONSOLE_DEFAULT_FLOW 'n' /* no flow control */
69 struct dm270_uart_port
{
70 struct uart_port uport
;
72 /* unsigned short dtrr_break_flag;*/
75 static void dm270_uart_stop_tx(struct uart_port
*uport
, unsigned int tty_stop
);
79 ** Platform specific functions
80 ** Note: These definitions and routines will surely need to change if porting
81 ** this driver to another platform.
85 static inline unsigned short
86 dm270_uart_hwin(struct uart_port
*uport
, unsigned long offset
)
88 return inw(uport
->iobase
+ offset
);
92 dm270_uart_hwout(struct uart_port
*uport
, unsigned long offset
, unsigned short value
)
94 outw(value
, uport
->iobase
+ offset
);
98 dm270_uart_hwreset(struct uart_port
*uport
)
102 /* Disable clock to UART. */
103 reg
= inw(DM270_CLKC_MOD2
);
104 outw((reg
& ~(DM270_CLKC_MOD2_CUAT
<< uport
->line
)), DM270_CLKC_MOD2
);
106 /* Select CLK_ARM as UART clock source */
107 reg
= inw(DM270_CLKC_CLKC
);
108 outw((reg
& ~(DM270_CLKC_CLKC_CUAS
<< uport
->line
)), DM270_CLKC_CLKC
);
110 /* Enable clock to UART. */
111 reg
= inw(DM270_CLKC_MOD2
);
112 outw((reg
| (DM270_CLKC_MOD2_CUAT
<< uport
->line
)), DM270_CLKC_MOD2
);
114 if (uport
->line
== 1) {
115 #ifndef CONFIG_SERIAL_DM270_BOOT_CTRL_UART1
116 /* Configure GIO23 & GIO24 as RXD1 & TXD1 respectively */
117 reg
= inw(DM270_GIO_FSEL0
);
118 outw(reg
| DM270_GIO_FSEL_RXD1
, DM270_GIO_FSEL0
);
119 reg
= inw(DM270_GIO_FSEL1
);
120 outw(reg
| DM270_GIO_FSEL_TXD1
, DM270_GIO_FSEL1
);
126 dm270_uart_disable_tx_int(struct uart_port
*uport
)
128 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
130 dm270_uport
->msr
&= ~DM270_UART_MSR_TFTIE
;
131 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
135 dm270_uart_disable_rx_int(struct uart_port
*uport
)
137 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
139 dm270_uport
->msr
&= ~(DM270_UART_MSR_TOIC_MASK
| DM270_UART_MSR_REIE
|
140 DM270_UART_MSR_RFTIE
);
141 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
145 dm270_uart_enable_tx_int(struct uart_port
*uport
)
147 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
149 dm270_uport
->msr
|= DM270_UART_MSR_TFTIE
;
150 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
154 dm270_uart_enable_rx_int(struct uart_port
*uport
)
156 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
158 dm270_uport
->msr
= (dm270_uport
->msr
& ~DM270_UART_MSR_TOIC_MASK
) |
159 (DM270_UART_MSR_TIMEOUT_7
| DM270_UART_MSR_REIE
|
160 DM270_UART_MSR_RFTIE
);
161 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
165 dm270_uart_disable_ints(struct uart_port
*uport
, unsigned short *msr
)
167 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
169 *msr
= dm270_uport
->msr
& (DM270_UART_MSR_TOIC_MASK
| DM270_UART_MSR_REIE
|
170 DM270_UART_MSR_TFTIE
| DM270_UART_MSR_RFTIE
);
171 dm270_uport
->msr
&= ~(DM270_UART_MSR_TOIC_MASK
| DM270_UART_MSR_REIE
|
172 DM270_UART_MSR_TFTIE
| DM270_UART_MSR_RFTIE
);
173 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
177 dm270_uart_restore_ints(struct uart_port
*uport
, unsigned short msr
)
179 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
181 dm270_uport
->msr
= (dm270_uport
->msr
& ~(DM270_UART_MSR_TOIC_MASK
| DM270_UART_MSR_REIE
|
182 DM270_UART_MSR_TFTIE
| DM270_UART_MSR_RFTIE
)) |
183 (msr
& (DM270_UART_MSR_TOIC_MASK
| DM270_UART_MSR_REIE
|
184 DM270_UART_MSR_TFTIE
| DM270_UART_MSR_RFTIE
));
185 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
189 dm270_uart_clear_fifos(struct uart_port
*uport
)
191 dm270_uart_hwout(uport
, DM270_UART_TFCR
,
192 dm270_uart_hwin(uport
, DM270_UART_TFCR
) | DM270_UART_TFCR_CLEAR
);
193 dm270_uart_hwout(uport
, DM270_UART_RFCR
,
194 dm270_uart_hwin(uport
, DM270_UART_RFCR
) |
195 (DM270_UART_RFCR_RESET
| DM270_UART_RFCR_CLEAR
));
199 dm270_uart_disable_breaks(struct uart_port
*uport
)
201 dm270_uart_hwout(uport
, DM270_UART_LCR
,
202 dm270_uart_hwin(uport
, DM270_UART_LCR
) & ~DM270_UART_LCR_BOC
);
206 dm270_uart_enable_breaks(struct uart_port
*uport
)
208 dm270_uart_hwout(uport
, DM270_UART_LCR
,
209 dm270_uart_hwin(uport
, DM270_UART_LCR
) | DM270_UART_LCR_BOC
);
213 dm270_uart_set_rate(struct uart_port
*uport
, unsigned int rate
)
215 dm270_uart_hwout(uport
, DM270_UART_BRSR
, DM270_UART_BRSR_VAL(rate
));
219 dm270_uart_set_mode(struct uart_port
*uport
, unsigned short mode
)
221 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
223 dm270_uport
->msr
= (dm270_uport
->msr
& ~(DM270_UART_MSR_CLS
| DM270_UART_MSR_SBLS
|
224 DM270_UART_MSR_PSB
| DM270_UART_MSR_PEB
)) | mode
;
225 dm270_uart_hwout(uport
, DM270_UART_MSR
, dm270_uport
->msr
);
229 dm270_uart_set_rx_trigger(struct uart_port
*uport
, unsigned short val
)
231 dm270_uart_hwout(uport
, DM270_UART_RFCR
, (dm270_uart_hwin(uport
, DM270_UART_RFCR
) &
232 ~(DM270_UART_RFCR_RTL_MASK
| DM270_UART_RFCR_RESET
|
233 DM270_UART_RFCR_CLEAR
)) | val
);
237 dm270_uart_set_tx_trigger(struct uart_port
*uport
, unsigned short val
)
239 dm270_uart_hwout(uport
, DM270_UART_TFCR
, (dm270_uart_hwin(uport
, DM270_UART_TFCR
) &
240 ~(DM270_UART_TFCR_TTL_MASK
| DM270_UART_TFCR_CLEAR
)) |
245 dm270_uart_char_out(struct uart_port
*uport
, u8 val
)
247 dm270_uart_hwout(uport
, DM270_UART_DTRR
, val
);
250 static inline unsigned char
251 dm270_uart_char_in(struct uart_port
*uport
, unsigned short *status
)
255 dtrr
= dm270_uart_hwin(uport
, DM270_UART_DTRR
);
256 *status
= (dtrr
& 0xff00);
257 return ((unsigned char)(dtrr
& 0x00ff));
261 dm270_uart_error_condition(unsigned short status
)
263 return ((status
^ DM270_UART_DTRR_RVF
) &
264 (DM270_UART_DTRR_RVF
| DM270_UART_DTRR_BF
| DM270_UART_DTRR_FE
|
265 DM270_UART_DTRR_ORF
| DM270_UART_DTRR_PEF
));
269 dm270_uart_break_condition(unsigned short status
)
271 return (status
& DM270_UART_DTRR_BF
);
275 dm270_uart_parity_error(unsigned short status
)
277 return (status
& DM270_UART_DTRR_PEF
);
281 dm270_uart_framing_error(unsigned short status
)
283 return (status
& DM270_UART_DTRR_FE
);
287 dm270_uart_overrun_error(unsigned short status
)
289 return (status
& DM270_UART_DTRR_ORF
);
293 dm270_uart_received_word_invalid(unsigned short status
)
295 return (status
& DM270_UART_DTRR_RVF
);
298 static inline unsigned short
299 dm270_uart_tx_fifo_empty(struct uart_port
*uport
)
301 return (dm270_uart_hwin(uport
, DM270_UART_SR
) & DM270_UART_SR_TREF
);
304 static inline unsigned short
305 dm270_uart_room_in_tx_fifo(struct uart_port
*uport
)
307 return ((dm270_uart_hwin(uport
, DM270_UART_TFCR
) & DM270_UART_TFCR_TWC_MASK
) < DM270_UART_TXFIFO_BYTESIZE
);
310 static inline unsigned short
311 dm270_uart_rx_fifo_has_content(struct uart_port
*uport
)
313 return (dm270_uart_hwin(uport
, DM270_UART_SR
) & DM270_UART_SR_RFNEF
);
317 dm270_uart_save_registers(struct uart_port
*uport
)
319 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
321 dm270_uport
->msr
= dm270_uart_hwin(uport
, DM270_UART_MSR
);
326 ** interrupt functions
331 dm270_uart_rx_chars(struct uart_port
*uport
, struct pt_regs
*ptregs
)
333 struct tty_struct
*tty
= uport
->info
->tty
;
334 unsigned short status
;
339 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
342 ch
= dm270_uart_char_in(uport
, &status
);
343 *tty
->flip
.char_buf_ptr
= ch
;
344 *tty
->flip
.flag_buf_ptr
= TTY_NORMAL
;
347 if (dm270_uart_error_condition(status
)) {
348 /* For statistics only */
349 if (dm270_uart_break_condition(status
)) {
350 status
&= ~(DM270_UART_DTRR_FE
| DM270_UART_DTRR_PEF
);
352 /* We do the SysRQ and SAK checking
353 * here because otherwise the break
354 * may get masked by ignore_status_mask
355 * or read_status_mask.
357 if (uart_handle_break(uport
))
359 } else if (dm270_uart_parity_error(status
)) {
360 uport
->icount
.parity
++;
361 } else if (dm270_uart_framing_error(status
)) {
362 uport
->icount
.frame
++;
364 if (dm270_uart_overrun_error(status
))
365 uport
->icount
.overrun
++;
367 /* Now check to see if character should be
368 * ignored, and mask off conditions which
371 status
&= uport
->read_status_mask
;
373 #ifdef CONFIG_SERIAL_DM270_CONSOLE
374 if (uport
->line
== uport
->cons
->index
) {
375 /* Recover the break flag from console xmit */
376 status
|= dm270_uport
->dtrr_break_flag
;
377 dm270_uport
->dtrr_break_flag
= 0;
381 if (dm270_uart_break_condition(status
)) {
382 *tty
->flip
.flag_buf_ptr
= TTY_BREAK
;
383 } else if (dm270_uart_parity_error(status
)) {
384 *tty
->flip
.flag_buf_ptr
= TTY_PARITY
;
385 } else if (dm270_uart_framing_error(status
)) {
386 *tty
->flip
.flag_buf_ptr
= TTY_FRAME
;
389 if (uart_handle_sysrq_char(uport
, ch
, ptregs
))
391 if ((status
& uport
->ignore_status_mask
) == 0) {
392 tty
->flip
.flag_buf_ptr
++;
393 tty
->flip
.char_buf_ptr
++;
396 if (dm270_uart_overrun_error(status
) &&
397 (tty
->flip
.count
< TTY_FLIPBUF_SIZE
)) {
399 * Overrun is special, since it's reported
400 * immediately, and doesn't affect the current
403 *tty
->flip
.flag_buf_ptr
= TTY_OVERRUN
;
404 tty
->flip
.flag_buf_ptr
++;
405 tty
->flip
.char_buf_ptr
++;
409 } while (dm270_uart_rx_fifo_has_content(uport
) && (max_count
-- > 0));
411 tty_flip_buffer_push(tty
);
415 dm270_uart_tx_chars(struct uart_port
*uport
)
417 struct circ_buf
*xmit
= &uport
->info
->xmit
;
421 dm270_uart_char_out(uport
, uport
->x_char
);
427 if (uart_circ_empty(xmit
) || uart_tx_stopped(uport
)) {
428 dm270_uart_stop_tx(uport
, 0);
432 /* Send while we still have data & room in the fifo */
433 count
= uport
->fifosize
;
435 dm270_uart_char_out(uport
, xmit
->buf
[xmit
->tail
++]);
436 xmit
->tail
&= (UART_XMIT_SIZE
- 1);
438 if (uart_circ_empty(xmit
))
440 } while (--count
> 0);
442 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
443 uart_write_wakeup(uport
);
445 if (uart_circ_empty(xmit
))
446 dm270_uart_stop_tx(uport
, 0);
450 dm270_uart_interrupt(int irq
, void *dev_id
, struct pt_regs
*ptregs
)
452 struct uart_port
*uport
= dev_id
;
453 unsigned short status
;
454 int pass_counter
= 0;
456 status
= dm270_uart_hwin(uport
, DM270_UART_SR
);
457 while (status
& (DM270_UART_SR_RFNEF
| DM270_UART_SR_TFEF
)) {
458 if (status
& DM270_UART_SR_RFNEF
)
459 dm270_uart_rx_chars(uport
, ptregs
);
461 if (status
& DM270_UART_SR_TFEF
)
462 dm270_uart_tx_chars(uport
);
464 if (pass_counter
++ > UART_ISR_PASS_LIMIT
) {
468 status
= dm270_uart_hwin(uport
, DM270_UART_SR
);
476 ** struct uart_ops functions
481 dm270_uart_tx_empty(struct uart_port
*uport
)
483 return dm270_uart_tx_fifo_empty(uport
);
487 dm270_uart_set_mctrl(struct uart_port
*uport
, unsigned int mctrl
)
493 dm270_uart_get_mctrl(struct uart_port
*uport
)
499 dm270_uart_stop_tx(struct uart_port
*uport
, unsigned int tty_stop
)
501 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
503 if (dm270_uport
->msr
& DM270_UART_MSR_TFTIE
) {
504 dm270_uart_disable_tx_int(uport
);
509 dm270_uart_start_tx(struct uart_port
*uport
, unsigned int tty_start
)
511 struct dm270_uart_port
*dm270_uport
= (struct dm270_uart_port
*)uport
;
513 if (!(dm270_uport
->msr
& DM270_UART_MSR_TFTIE
)) {
514 dm270_uart_enable_tx_int(uport
);
518 static void dm270_uart_send_xchar(struct uart_port
*uport
, char ch
)
522 dm270_uart_enable_tx_int(uport
);
527 dm270_uart_stop_rx(struct uart_port
*uport
)
529 dm270_uart_disable_rx_int(uport
);
532 static void dm270_uart_enable_ms(struct uart_port
*uport
)
538 dm270_uart_break_ctl(struct uart_port
*uport
, int break_state
)
542 spin_lock_irqsave(&uport
->lock
, flags
);
544 if (break_state
== -1)
545 dm270_uart_enable_breaks(uport
);
547 dm270_uart_disable_breaks(uport
);
549 spin_unlock_irqrestore(&uport
->lock
, flags
);
553 dm270_uart_startup(struct uart_port
*uport
)
558 dm270_uart_hwreset(uport
);
559 dm270_uart_save_registers(uport
);
560 dm270_uart_disable_ints(uport
, &junk
);
561 dm270_uart_clear_fifos(uport
);
562 dm270_uart_disable_breaks(uport
);
563 dm270_uart_set_rate(uport
, UART_DEFAULT_BAUD
);
564 dm270_uart_set_tx_trigger(uport
, DM270_UART_TFCR_TRG_1
);
565 dm270_uart_set_rx_trigger(uport
, DM270_UART_RFCR_TRG_16
);
567 /* Allocate the IRQ */
568 retval
= request_irq(uport
->irq
, dm270_uart_interrupt
, SA_INTERRUPT
,
573 /* Finally, enable interrupts */
574 dm270_uart_enable_rx_int(uport
);
579 dm270_uart_shutdown(struct uart_port
*uport
)
584 free_irq(uport
->irq
, uport
);
586 dm270_uart_disable_ints(uport
, &junk
); /* disable all intrs */
587 dm270_uart_disable_breaks(uport
); /* disable break condition */
588 dm270_uart_clear_fifos(uport
); /* reset FIFO's */
592 dm270_uart_set_termios(struct uart_port
*uport
, struct termios
*termios
, struct termios
*old
)
598 /* Byte size and parity */
599 switch (termios
->c_cflag
& CSIZE
) {
601 cval
= DM270_UART_MSR_7_DBITS
;
605 cval
= DM270_UART_MSR_8_DBITS
;
609 if (termios
->c_cflag
& CSTOPB
) {
610 cval
|= DM270_UART_MSR_2_SBITS
;
612 cval
|= DM270_UART_MSR_1_SBITS
;
614 if (termios
->c_cflag
& PARENB
) {
615 if (termios
->c_cflag
& PARODD
) {
616 cval
|= DM270_UART_MSR_ODD_PARITY
;
618 cval
|= DM270_UART_MSR_EVEN_PARITY
;
620 } else if (termios
->c_cflag
& PARODD
) {
621 cval
|= DM270_UART_MSR_ODD_PARITY
;
623 cval
|= DM270_UART_MSR_NO_PARITY
;
626 baud
= uart_get_baud_rate(uport
, termios
, old
, 0, uport
->uartclk
/16);
632 * Ok, we're now changing the port state. Do it with
633 * interrupts disabled.
635 spin_lock_irqsave(&uport
->lock
, flags
);
637 /* Update the per-port timeout */
638 uart_update_timeout(uport
, termios
->c_cflag
, baud
);
640 uport
->read_status_mask
= (DM270_UART_DTRR_ORF
| DM270_UART_DTRR_RVF
);
641 if (termios
->c_iflag
& INPCK
)
642 uport
->read_status_mask
|= (DM270_UART_DTRR_PEF
| DM270_UART_DTRR_FE
);
643 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
644 uport
->read_status_mask
|= DM270_UART_DTRR_BF
;
646 /* Characters to ignore */
647 uport
->ignore_status_mask
= 0;
648 if (termios
->c_iflag
& IGNPAR
)
649 uport
->ignore_status_mask
|= (DM270_UART_DTRR_PEF
| DM270_UART_DTRR_FE
);
650 if (termios
->c_iflag
& IGNBRK
) {
651 uport
->ignore_status_mask
|= DM270_UART_DTRR_BF
;
653 * If we're ignoring parity and break indicators,
654 * ignore overruns too (for real raw support).
656 if (termios
->c_iflag
& IGNPAR
)
657 uport
->ignore_status_mask
|= DM270_UART_DTRR_ORF
;
660 /* Ignore all characters if CREAD is not set */
661 if ((termios
->c_cflag
& CREAD
) == 0)
662 uport
->ignore_status_mask
|= DM270_UART_DTRR_RVF
;
664 dm270_uart_set_rate(uport
, baud
);
665 dm270_uart_set_mode(uport
, cval
);
668 * We should always set the receive FIFO trigger to the lowest value
669 * because we don't poll.
671 dm270_uart_set_rx_trigger(uport
, DM270_UART_RFCR_TRG_1
);
673 spin_unlock_irqrestore(&uport
->lock
, flags
);
677 dm270_uart_pm(struct uart_port
*uport
, unsigned int state
, unsigned int oldstate
)
683 dm270_uart_set_wake(struct uart_port
*uport
, unsigned int state
)
689 dm270_uart_type(struct uart_port
*uport
)
696 dm270_uart_release_port(struct uart_port
*uport
)
702 dm270_uart_request_port(struct uart_port
*uport
)
708 dm270_uart_config_port(struct uart_port
*uport
, int config
)
713 static int dm270_uart_verify_port(struct uart_port
*uport
, struct serial_struct
*serial
)
715 if (serial
->port
!= uport
->iobase
|| serial
->irq
!= uport
->irq
||
716 serial
->baud_base
< 9600 || serial
->xmit_fifo_size
<= 0 ||
717 serial
->io_type
!= uport
->iotype
|| serial
->type
!= uport
->type
||
718 serial
->line
!= uport
->line
)
723 static int dm270_uart_ioctl(struct uart_port
*uport
, unsigned int cmd
, unsigned long arg
)
728 static struct uart_ops dm270_uart_ops
= {
729 tx_empty
: dm270_uart_tx_empty
,
730 set_mctrl
: dm270_uart_set_mctrl
,
731 get_mctrl
: dm270_uart_get_mctrl
,
732 stop_tx
: dm270_uart_stop_tx
,
733 start_tx
: dm270_uart_start_tx
,
734 send_xchar
: dm270_uart_send_xchar
,
735 stop_rx
: dm270_uart_stop_rx
,
736 enable_ms
: dm270_uart_enable_ms
,
737 break_ctl
: dm270_uart_break_ctl
,
738 startup
: dm270_uart_startup
,
739 shutdown
: dm270_uart_shutdown
,
740 set_termios
: dm270_uart_set_termios
,
742 set_wake
: dm270_uart_set_wake
,
743 type
: dm270_uart_type
,
744 release_port
: dm270_uart_release_port
,
745 request_port
: dm270_uart_request_port
,
746 config_port
: dm270_uart_config_port
,
747 verify_port
: dm270_uart_verify_port
,
748 ioctl
: dm270_uart_ioctl
,
751 static struct uart_port dm270_uart_ports
[UART_NR
] = {
753 iobase
: DM270_UART0_BASE
,
754 irq
: DM270_INTERRUPT_UART0
,
755 uartclk
: CONFIG_ARM_CLK
,
756 fifosize
: DM270_UART_TXFIFO_BYTESIZE
,
759 ops
: &dm270_uart_ops
,
763 iobase
: DM270_UART1_BASE
,
764 irq
: DM270_INTERRUPT_UART1
,
765 uartclk
: CONFIG_ARM_CLK
,
766 fifosize
: DM270_UART_TXFIFO_BYTESIZE
,
769 ops
: &dm270_uart_ops
,
774 #ifdef CONFIG_SERIAL_DM270_CONSOLE
775 /************** console driver *****************/
778 * This block is enabled when the user has used `make xconfig`
779 * to enable kernel printk() to come out the serial port.
780 * The register_console(&dm270_console) call below is what hooks in
781 * our serial output routine here with the kernel's printk output.
785 * Wait for transmitter & holding register to empty
789 dm270_console_wait_for_xmitr(struct uart_port
*uport
)
793 for (tmp
= 1000000 ; tmp
> 0 ; tmp
--)
794 if (dm270_uart_room_in_tx_fifo(uport
))
799 * Print a string to the serial port trying not to disturb
800 * any possible real use of the port...
802 * The console_lock must be held when we get here.
806 dm270_console_write(struct console
*co
, const char *s
, unsigned int count
)
808 struct uart_port
*uport
= &dm270_uart_ports
[co
->index
];
812 /* First save the MSR then disable the interrupts */
813 dm270_uart_disable_ints(uport
, &msr
);
815 /* Now, do each character */
816 for (ii
= 0; ii
< count
; ii
++, s
++) {
817 dm270_console_wait_for_xmitr(uport
);
819 * Send the character out.
820 * If a LF, also do CR...
822 dm270_uart_char_out(uport
, *s
);
825 dm270_console_wait_for_xmitr(uport
);
826 dm270_uart_char_out(uport
, 13);
831 * Finally, wait for transmitter & holding register to empty
832 * and restore the MSR
834 dm270_console_wait_for_xmitr(uport
);
835 dm270_uart_restore_ints(uport
, msr
);
839 * Setup initial baud/bits/parity/flow control
843 dm270_console_setup(struct console
*co
, char *options
)
845 struct uart_port
*uport
;
846 int baud
= CONSOLE_DEFAULT_BAUD
;
847 int bits
= CONSOLE_DEFAULT_BITS
;
848 int parity
= CONSOLE_DEFAULT_PARITY
;
849 int flow
= CONSOLE_DEFAULT_FLOW
;
853 * Check whether an invalid uart number has been specified, and
854 * if so, search for the first available port that does have
857 uport
= uart_get_console(dm270_uart_ports
, UART_NR
, co
);
860 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
862 dm270_uart_hwreset(uport
);
863 dm270_uart_save_registers(uport
);
864 dm270_uart_disable_ints(uport
, &junk
);
865 dm270_uart_clear_fifos(uport
);
866 dm270_uart_disable_breaks(uport
);
867 dm270_uart_set_tx_trigger(uport
, DM270_UART_TFCR_TRG_1
);
869 return uart_set_options(uport
, co
, baud
, parity
, bits
, flow
);
872 extern struct uart_driver dm270_uart_driver
;
874 static struct console dm270_console
= {
876 write
: dm270_console_write
,
877 device
: uart_console_device
,
878 setup
: dm270_console_setup
,
879 flags
: CON_PRINTBUFFER
,
881 data
: &dm270_uart_driver
,
885 dm270_console_init(void)
887 register_console(&dm270_console
);
891 console_initcall(dm270_console_init
);
893 #endif /* CONFIG_SERIAL_DM270_CONSOLE */
895 static struct uart_driver dm270_uart_driver
= {
897 driver_name
: UART_DRIVER_NAME
,
903 #ifdef CONFIG_SERIAL_DM270_CONSOLE
904 cons
: &dm270_console
,
909 dm270_uart_init(void)
914 retval
= uart_register_driver(&dm270_uart_driver
);
918 for (ii
= 0; ii
< UART_NR
; ii
++) {
919 retval
= uart_add_one_port(&dm270_uart_driver
, &dm270_uart_ports
[ii
]);
928 dm270_uart_exit(void)
932 for (ii
= 0; ii
< UART_NR
; ii
++) {
933 uart_remove_one_port(&dm270_uart_driver
, &dm270_uart_ports
[ii
]);
936 uart_unregister_driver(&dm270_uart_driver
);
939 module_init(dm270_uart_init
);
940 module_exit(dm270_uart_exit
);
942 MODULE_AUTHOR("Chee Tim Loh <lohct@pacific.net.sg>");
943 MODULE_DESCRIPTION("DM270 UART driver");
944 MODULE_LICENSE("GPL");