2 i2c-mcf5282.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
4 Copyright (c) 2005, Derek CL Cheung <derek.cheung@sympatico.ca>
5 <http://www3.sympatico.ca/derek.cheung>
7 Copyright (c) 2006, emlix and Freescale
8 Sebastian Hess <sh@emlix.com>
9 Yaroslav Vinogradov <yaroslav.vinogradov@freescale.com>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 Initial Release - developed on uClinux with 2.6.9 kernel
30 Modified to be more generic and added support for
33 This I2C adaptor supports the ColdFire 5282 CPU I2C module. Since most Coldfire
34 CPUs' I2C module use the same register set (e.g., MCF5249), the code is very
35 portable and re-usable to other Coldfire CPUs.
37 The transmission frequency is set at about 100KHz for the 5282Lite CPU board with
38 8MHz crystal. If the CPU board uses different system clock frequency, you should
39 change the following line:
40 static int __init i2c_coldfire_init(void)
43 // Set transmission frequency 0x15 = ~100kHz
44 *MCF_I2C_I2FDR = 0x15;
48 Remember to perform a dummy read to set the ColdFire CPU's I2C module for read before
49 reading the actual byte from a device
51 The I2C_SM_BUS_BLOCK_DATA function are not yet ready but most lm_senors do not care
55 #include <linux/init.h>
56 #include <linux/module.h>
57 #include <linux/kernel.h>
58 #include <linux/errno.h>
59 #include <linux/i2c.h>
60 #include <linux/delay.h>
61 #include <linux/string.h>
62 #include <asm/coldfire.h>
63 #include <asm/mcfsim.h>
64 #include <asm/types.h>
68 static struct i2c_algorithm coldfire_algorithm
= {
69 /*.name = "ColdFire I2C algorithm",
70 .id = I2C_ALGO_SMBUS,*/
71 .smbus_xfer
= coldfire_i2c_access
,
72 .master_xfer
= coldfire_i2c_master
,
73 .functionality
= coldfire_func
,
77 static struct i2c_adapter coldfire_adapter
= {
79 .class = I2C_CLASS_HWMON
,
80 .algo
= &coldfire_algorithm
,
81 .name
= "ColdFire I2C adapter",
88 static inline int coldfire_do_first_start(__u16 addr
,__u16 flags
)
92 * Generate a stop and put the I2C module into slave mode
94 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_MSTA
;
97 * Generate a new Start signal
99 err
= coldfire_i2c_start(flags
& I2C_M_RD
? I2C_SMBUS_READ
: I2C_SMBUS_WRITE
,
104 lastop
= flags
& I2C_M_RD
; /* Ensure everything for new start */
110 * read one byte data from the I2C bus
112 static int coldfire_read_data(u8
* const rxData
, const enum I2C_ACK_TYPE ackType
) {
116 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_MTX
; /* master receive mode */
119 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_TXAK
; /* generate NA */
121 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_TXAK
; /* generate ACK */
124 /* read data from the I2C bus */
125 *rxData
= *MCF_I2C_I2DR
;
127 /* printk(">>> %s I2DR data is %.2x \n", __FUNCTION__, *rxData); */
129 /* wait for data transfer to complete */
131 while (timeout
-- && !(*MCF_I2C_I2SR
& MCF_I2C_I2SR_IIF
))
134 printk("%s - I2C IIF never set. Timeout is %d \n", __FUNCTION__
, timeout
);
137 /* reset the interrupt bit */
138 *MCF_I2C_I2SR
&= ~MCF_I2C_I2SR_IIF
;
149 * write one byte data onto the I2C bus
151 static int coldfire_write_data(const u8 txData
) {
157 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_MTX
; /* I2C module into TX mode */
158 *MCF_I2C_I2DR
= txData
; /* send the data */
160 /* wait for data transfer to complete */
161 /* rely on the interrupt handling bit */
163 while (timeout
-- && !(*MCF_I2C_I2SR
& MCF_I2C_I2SR_IIF
))
166 printk("%s - I2C IIF never set. Timeout is %d \n", __FUNCTION__
, timeout
);
169 /* reset the interrupt bit */
170 *MCF_I2C_I2SR
&= ~MCF_I2C_I2SR_IIF
;
183 * Generate I2C start or repeat start signal
184 * Combine the 7 bit target_address and the R/W bit and put it onto the I2C bus
186 static int coldfire_i2c_start(const char read_write
, const u16 target_address
, const enum I2C_START_TYPE start_type
) {
190 // printk(">>> %s START TYPE %s \n", __FUNCTION__, start_type == FIRST_START ? "FIRST_START" : "REPEAT_START");
192 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_IEN
;
194 if (start_type
== FIRST_START
) {
195 /* Make sure the I2C bus is idle */
196 timeout
= 500; /* 500us timeout */
197 while (timeout
-- && (*MCF_I2C_I2SR
& MCF_I2C_I2SR_IBB
))
200 printk("%s - I2C bus always busy in the past 500us timeout is %d \n", __FUNCTION__
, timeout
);
203 /* generate a START and put the I2C module into MASTER TX mode*/
204 *MCF_I2C_I2CR
|= (MCF_I2C_I2CR_MSTA
| MCF_I2C_I2CR_MTX
);
206 /* wait for bus busy to be set */
208 while (timeout
-- && !(*MCF_I2C_I2SR
& MCF_I2C_I2SR_IBB
))
211 printk("%s - I2C bus is never busy after START. Timeout is %d \n", __FUNCTION__
, timeout
);
216 /* this is repeat START */
217 udelay(500); /* need some delay before repeat start */
218 *MCF_I2C_I2CR
|= (MCF_I2C_I2CR_MSTA
| MCF_I2C_I2CR_RSTA
);
222 /* combine the R/W bit and the 7 bit target address and put it onto the I2C bus */
223 *MCF_I2C_I2DR
= ((target_address
& 0x7F) << 1) | (read_write
== I2C_SMBUS_WRITE
? 0x00 : 0x01);
225 /* wait for bus transfer to complete */
226 /* when one byte transfer is completed, IIF set at the faling edge of the 9th clock */
228 while (timeout
-- && !(*MCF_I2C_I2SR
& MCF_I2C_I2SR_IIF
))
231 printk("%s - I2C IIF never set. Timeout is %d \n", __FUNCTION__
, timeout
);
235 /* reset the interrupt bit */
236 *MCF_I2C_I2SR
&= ~MCF_I2C_I2SR_IIF
;
246 * 5282 SMBUS supporting functions
249 static s32
coldfire_i2c_access(struct i2c_adapter
*adap
, u16 addr
,
250 unsigned short flags
, char read_write
,
251 u8 command
, int size
, union i2c_smbus_data
*data
)
254 u8 rxData
, tempRxData
[2];
257 case I2C_SMBUS_QUICK
:
258 rc
= coldfire_i2c_start(read_write
, addr
, FIRST_START
); /* generate START */
261 rc
= coldfire_i2c_start(read_write
, addr
, FIRST_START
);
262 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_TXAK
; /* generate NA */
263 if (read_write
== I2C_SMBUS_WRITE
)
264 rc
+= coldfire_write_data(command
);
266 coldfire_read_data(&rxData
, NACK
); /* dummy read */
267 rc
+= coldfire_read_data(&rxData
, NACK
);
270 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_TXAK
; /* reset ACK bit */
272 case I2C_SMBUS_BYTE_DATA
:
273 rc
= coldfire_i2c_start(I2C_SMBUS_WRITE
, addr
, FIRST_START
);
274 rc
+= coldfire_write_data(command
);
275 if (read_write
== I2C_SMBUS_WRITE
)
276 rc
+= coldfire_write_data(data
->byte
);
278 /* This is SMBus READ Byte Data Request. Perform REPEAT START */
279 rc
+= coldfire_i2c_start(I2C_SMBUS_READ
, addr
, REPEAT_START
);
280 coldfire_read_data(&rxData
, ACK
); /* dummy read */
281 /* Disable Acknowledge, generate STOP after next byte transfer */
282 rc
+= coldfire_read_data(&rxData
, NACK
);
285 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_TXAK
; /* reset to normal ACk */
287 case I2C_SMBUS_PROC_CALL
:
288 case I2C_SMBUS_WORD_DATA
:
289 dev_info(&adap
->dev
, "size = I2C_SMBUS_WORD_DATA \n");
290 rc
= coldfire_i2c_start(I2C_SMBUS_WRITE
, addr
, FIRST_START
);
291 rc
+= coldfire_write_data(command
);
292 if (read_write
== I2C_SMBUS_WRITE
) {
293 rc
+= coldfire_write_data(data
->word
& 0x00FF);
294 rc
+= coldfire_write_data((data
->word
& 0x00FF) >> 8);
296 /* This is SMBUS READ WORD request. Peform REPEAT START */
297 rc
+= coldfire_i2c_start(I2C_SMBUS_READ
, addr
, REPEAT_START
);
298 coldfire_read_data(&rxData
, ACK
); /* dummy read */
299 /* Disable Acknowledge, generate STOP after next byte transfer */
300 /* read the MS byte from the device */
301 rc
+= coldfire_read_data(&rxData
, NACK
);
302 tempRxData
[1] = rxData
;
303 /* read the LS byte from the device */
304 rc
+= coldfire_read_data(&rxData
, NACK
);
305 tempRxData
[0] = rxData
;
306 /* the host driver expect little endian convention. Swap the byte */
307 data
->word
= (tempRxData
[0] << 8) | tempRxData
[1];
309 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_TXAK
;
311 case I2C_SMBUS_BLOCK_DATA
:
312 /* this is not ready yet!!!
313 if (read_write == I2C_SMBUS_WRITE) {
314 dev_info(&adap->dev, "data = %.4x\n", data->word);
315 len = data->block[0];
320 for (i = 1; i <= len; i++)
321 dev_info(&adap->dev, "data->block[%d] = %.2x\n", i, data->block[i]);
325 printk("Unsupported I2C size \n");
330 /* Generate a STOP and put I2C module into slave mode */
331 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_MSTA
;
333 /* restore interrupt */
334 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_IIEN
;
344 * List the SMBUS functions supported by this I2C adaptor
345 * Also tell the I2C Subsystem that we are able of master_xfer()
347 static u32
coldfire_func(struct i2c_adapter
*adapter
)
349 return(I2C_FUNC_SMBUS_QUICK
|
350 I2C_FUNC_SMBUS_BYTE
|
351 I2C_FUNC_SMBUS_PROC_CALL
|
352 I2C_FUNC_SMBUS_BYTE_DATA
|
353 I2C_FUNC_SMBUS_WORD_DATA
|
355 I2C_FUNC_SMBUS_BLOCK_DATA
);
358 static int coldfire_i2c_master(struct i2c_adapter
*adap
,struct i2c_msg
*msgs
,
369 /* disable the IRQ, we are doing polling */
370 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_IIEN
;
372 dev_dbg(&adap
->dev
,"Num of actions: %d\n", num
);
374 for (i
= 0; !err
&& i
< num
; i
++) {
380 dev_dbg(&adap
->dev
,"p->len == 0!\n");
384 * Generate a new Start, if the target address differs from the last target,
385 * generate a stop in this case first
387 if(p
->addr
!= lastaddr
)
389 err
= coldfire_do_first_start(p
->addr
,p
->flags
);
392 dev_dbg(&adap
->dev
,"First Init failed!\n");
397 else if((p
->flags
& I2C_M_RD
) != lastop
)
400 * If the Operational Mode changed, we need to do this here ...
402 dev_dbg(&adap
->dev
,"%s(): Direction changed, was: %d; is now: %d\n",
403 __FUNCTION__
,lastop
,p
->flags
& I2C_M_RD
);
405 /* Last op was an read, now it's write: complete stop and reinit */
406 if (lastop
& I2C_M_RD
)
408 dev_dbg(&adap
->dev
,"%s(): The device is in read state, we must reset!\n",
410 if((err
= coldfire_do_first_start(p
->addr
,p
->flags
)))
415 dev_dbg(&adap
->dev
,"%s(): We switchted to read mode\n",__FUNCTION__
);
416 if((err
= coldfire_i2c_start((p
->flags
& I2C_M_RD
) ? I2C_SMBUS_READ
: I2C_SMBUS_WRITE
,
417 p
->addr
, REPEAT_START
)))
421 lastop
= p
->flags
& I2C_M_RD
; /* Save the last op */
424 if (p
->flags
& I2C_M_RD
)
427 * When ever we get here, a new session was activated, so
430 coldfire_read_data(&dummyRead
, ACK
);
432 * read p->len -1 bytes with ACK to the slave,
433 * read the last byte without the ACK, to inform him about the
437 while(!err
&& (ic
< p
->len
-1 ))
439 err
= coldfire_read_data(p
->buf
+ic
, ACK
);
443 err
= coldfire_read_data(p
->buf
+ic
, NACK
);
444 dev_dbg(&coldfire_adapter
.dev
,"read: %2x\n", p
->buf
[ic
]);
449 dev_dbg(&coldfire_adapter
.dev
,"writing: 0x %2x %2x\n", p
->buf
[0], p
->buf
[1]);
452 * Write data to the slave
454 for(ic
=0; !err
&& ic
< p
->len
; ic
++)
456 err
= coldfire_write_data(p
->buf
[ic
]);
459 dev_dbg(&coldfire_adapter
.dev
,"Failed to write data\n");
466 * Put the device into slave mode to enable the STOP Generation (the RTC needs this)
468 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_MSTA
;
470 *MCF_I2C_I2CR
&= ~MCF_I2C_I2CR_TXAK
; /* reset the ACK bit */
472 /* restore interrupt */
473 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_IIEN
;
475 /* Return the number of messages processed, or the error code. */
483 * Initalize the 5282 I2C module
484 * Disable the 5282 I2C interrupt capability. Just use callback
487 static int __init
i2c_coldfire_init(void)
492 #if defined(CONFIG_M532x)
494 * Initialize the GPIOs for I2C
496 MCF_GPIO_PAR_FECI2C
|= (0
497 | MCF_GPIO_PAR_FECI2C_PAR_SDA(3)
498 | MCF_GPIO_PAR_FECI2C_PAR_SCL(3));
500 /* Initialize PASP0 and PASP1 to I2C functions, 5282 user guide 26-19 */
501 /* Port AS Pin Assignment Register (PASPAR) */
502 /* PASPA1 = 11 = AS1 pin is I2C SDA */
503 /* PASPA0 = 11 = AS0 pin is I2C SCL */
504 *MCF_GPIO_PASPAR
|= 0x000F; /* u16 declaration */
508 /* Set transmission frequency 0x15 = ~100kHz */
509 *MCF_I2C_I2FDR
= 0x15;
511 /* set the 5282 I2C slave address thought we never use it */
512 *MCF_I2C_I2ADR
= 0x6A;
514 /* Enable I2C module and if IBB is set, do the special initialzation */
515 /* procedures as are documented at the 5282 User Guide page 24-11 */
516 *MCF_I2C_I2CR
|= MCF_I2C_I2CR_IEN
;
517 if ((*MCF_I2C_I2SR
& MCF_I2C_I2SR_IBB
) == 1) {
518 printk("%s - do special 5282 I2C init procedures \n", __FUNCTION__
);
519 *MCF_I2C_I2CR
= 0x00;
520 *MCF_I2C_I2CR
= 0xA0;
521 dummyRead
= *MCF_I2C_I2DR
;
522 *MCF_I2C_I2SR
= 0x00;
523 *MCF_I2C_I2CR
= 0x00;
526 /* default I2C mode is - slave and receive */
527 *MCF_I2C_I2CR
&= ~(MCF_I2C_I2CR_MSTA
| MCF_I2C_I2CR_MTX
);
529 retval
= i2c_add_adapter(&coldfire_adapter
);
532 printk("%s - return code is: %d \n", __FUNCTION__
, retval
);
539 * I2C module exit function
542 static void __exit
i2c_coldfire_exit(void)
544 /* disable I2C and Interrupt */
545 *MCF_I2C_I2CR
&= ~(MCF_I2C_I2CR_IEN
| MCF_I2C_I2CR_IIEN
);
546 i2c_del_adapter(&coldfire_adapter
);
551 MODULE_AUTHOR("Derek CL Cheung <derek.cheung@sympatico.ca>");
552 MODULE_DESCRIPTION("MCF5282 I2C adaptor");
553 MODULE_LICENSE("GPL");
555 module_init(i2c_coldfire_init
);
556 module_exit(i2c_coldfire_exit
);