arch/arm/mm/proc-arm9tdmi.S

   1 /*
   2  *  linux/arch/arm/mm/proc-arm9tdmi.S
   3  *
   4  *  Copyright (C) 1997-2000 Russell King
   5  *  Copyright (C) 2003 Hyok S. Choi <hyok.choi@samsung.com>
   6  *  Copyright (C) 2004-2005 Tobias Lorenz <tobias.lorenz@gmx.net>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  *  for ARM9TDMI and the compatibles.
  13  */
  14 #include <linux/linkage.h>
  15 #include <linux/init.h>
  16 #include <asm/assembler.h>
  17 #include <asm/pgtable.h>
  18 #include <asm/procinfo.h>
  19 #include <asm/ptrace.h>
  20 #include <asm/errno.h>
  21
  22 ENTRY(cpu_arm9tdmi_dcache_clean_area)
  23                 mov     pc, lr
  24
  25 /*
  26  * Function: arm9tdmi_data_abort ()
  27  *
  28  * Params  : r2 = address of aborted instruction
  29  *         : sp = pointer to registers
  30  *
  31  * Purpose : obtain information about current aborted instruction
  32  *
  33  * Returns : r0 = address of abort
  34  *         : r1 = FSR
  35  */
  36
  37 ENTRY(cpu_arm9tdmi_data_abort)
  38         ldr     r8, [r0]                        @ read arm instruction
  39         tst     r8, #1 << 20                    @ L = 1 -> write?
  40         orreq   r1, r1, #1 << 8                 @ yes.
  41         and     r7, r8, #15 << 24
  42         add     pc, pc, r7, lsr #22             @ Now branch to the relevant processing routine
  43         nop
  44
  45 /* 0 */ b       .data_unknown
  46 /* 1 */ mov     pc, lr                          @ swp
  47 /* 2 */ b       .data_unknown
  48 /* 3 */ b       .data_unknown
  49 /* 4 */ b       .data_arm_lateldrpostconst      @ ldr   rd, [rn], #m
  50 /* 5 */ b       .data_arm_lateldrpreconst       @ ldr   rd, [rn, #m]
  51 /* 6 */ b       .data_arm_lateldrpostreg        @ ldr   rd, [rn], rm
  52 /* 7 */ b       .data_arm_lateldrprereg         @ ldr   rd, [rn, rm]
  53 /* 8 */ b       .data_arm_ldmstm                @ ldm*a rn, <rlist>
  54 /* 9 */ b       .data_arm_ldmstm                @ ldm*b rn, <rlist>
  55 /* a */ b       .data_unknown
  56 /* b */ b       .data_unknown
  57 /* c */ mov     pc, lr                          @ ldc   rd, [rn], #m    @ Same as ldr   rd, [rn], #m
  58 /* d */ mov     pc, lr                          @ ldc   rd, [rn, #m]
  59 /* e */ b       .data_unknown
  60 /* f */
  61 .data_unknown:  @ Part of jumptable
  62         mov     r0, r2
  63         mov     r1, r8
  64         mov     r2, sp
  65         bl      baddataabort
  66         b       ret_from_exception
  67
  68 .data_arm_ldmstm:
  69         tst     r8, #1 << 21                    @ check writeback bit
  70         moveq   pc, lr                          @ no writeback -> no fixup
  71         mov     r7, #0x11
  72         orr     r7, r7, #0x1100
  73         and     r6, r8, r7
  74         and     r2, r8, r7, lsl #1
  75         add     r6, r6, r2, lsr #1
  76         and     r2, r8, r7, lsl #2
  77         add     r6, r6, r2, lsr #2
  78         and     r2, r8, r7, lsl #3
  79         add     r6, r6, r2, lsr #3
  80         add     r6, r6, r6, lsr #8
  81         add     r6, r6, r6, lsr #4
  82         and     r6, r6, #15                     @ r6 = no. of registers to transfer.
  83         and     r5, r8, #15 << 16               @ Extract 'n' from instruction
  84         ldr     r7, [sp, r5, lsr #14]           @ Get register 'Rn'
  85         tst     r8, #1 << 23                    @ Check U bit
  86         subne   r7, r7, r6, lsl #2              @ Undo increment
  87         addeq   r7, r7, r6, lsl #2              @ Undo decrement
  88         str     r7, [sp, r5, lsr #14]           @ Put register 'Rn'
  89         mov     pc, lr
  90
  91 .data_arm_apply_r6_and_rn:
  92         and     r5, r8, #15 << 16               @ Extract 'n' from instruction
  93         ldr     r7, [sp, r5, lsr #14]           @ Get register 'Rn'
  94         tst     r8, #1 << 23                    @ Check U bit
  95         subne   r7, r7, r6                      @ Undo incrmenet
  96         addeq   r7, r7, r6                      @ Undo decrement
  97         str     r7, [sp, r5, lsr #14]           @ Put register 'Rn'
  98         mov     pc, lr
  99
 100 .data_arm_lateldrpreconst:
 101         tst     r8, #1 << 21                    @ check writeback bit
 102         moveq   pc, lr                          @ no writeback -> no fixup
 103 .data_arm_lateldrpostconst:
 104         movs    r2, r8, lsl #20                 @ Get offset
 105         moveq   pc, lr                          @ zero -> no fixup
 106         and     r5, r8, #15 << 16               @ Extract 'n' from instruction
 107         ldr     r7, [sp, r5, lsr #14]           @ Get register 'Rn'
 108         tst     r8, #1 << 23                    @ Check U bit
 109         subne   r7, r7, r2, lsr #20             @ Undo increment
 110         addeq   r7, r7, r2, lsr #20             @ Undo decrement
 111         str     r7, [sp, r5, lsr #14]           @ Put register 'Rn'
 112         mov     pc, lr
 113
 114 .data_arm_lateldrprereg:
 115         tst     r8, #1 << 21                    @ check writeback bit
 116         moveq   pc, lr                          @ no writeback -> no fixup
 117 .data_arm_lateldrpostreg:
 118         and     r7, r8, #15                     @ Extract 'm' from instruction
 119         ldr     r6, [sp, r7, lsl #2]            @ Get register 'Rm'
 120         mov     r5, r8, lsr #7                  @ get shift count
 121         ands    r5, r5, #31
 122         and     r7, r8, #0x70                   @ get shift type
 123         orreq   r7, r7, #8                      @ shift count = 0
 124         add     pc, pc, r7
 125         nop
 126
 127         mov     r6, r6, lsl r5                  @ 0: LSL #!0
 128         b       .data_arm_apply_r6_and_rn
 129         b       .data_arm_apply_r6_and_rn       @ 1: LSL #0
 130         nop
 131         b       .data_unknown                   @ 2: MUL?
 132         nop
 133         b       .data_unknown                   @ 3: MUL?
 134         nop
 135         mov     r6, r6, lsr r5                  @ 4: LSR #!0
 136         b       .data_arm_apply_r6_and_rn
 137         mov     r6, r6, lsr #32                 @ 5: LSR #32
 138         b       .data_arm_apply_r6_and_rn
 139         b       .data_unknown                   @ 6: MUL?
 140         nop
 141         b       .data_unknown                   @ 7: MUL?
 142         nop
 143         mov     r6, r6, asr r5                  @ 8: ASR #!0
 144         b       .data_arm_apply_r6_and_rn
 145         mov     r6, r6, asr #32                 @ 9: ASR #32
 146         b       .data_arm_apply_r6_and_rn
 147         b       .data_unknown                   @ A: MUL?
 148         nop
 149         b       .data_unknown                   @ B: MUL?
 150         nop
 151         mov     r6, r6, ror r5                  @ C: ROR #!0
 152         b       .data_arm_apply_r6_and_rn
 153         mov     r6, r6, rrx                     @ D: RRX
 154         b       .data_arm_apply_r6_and_rn
 155         b       .data_unknown                   @ E: MUL?
 156         nop
 157         b       .data_unknown                   @ F: MUL?
 158
 159 /*
 160  * Function: arm9tdmi_proc_init (void)
 161  *         : arm9tdmi_proc_fin (void)
 162  *
 163  * Notes   : This processor does not require these
 164  */
 165 ENTRY(cpu_arm9tdmi_proc_init)
 166                 mov     pc, lr
 167
 168 ENTRY(cpu_arm9tdmi_proc_fin)
 169                 mov     r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
 170                 msr     cpsr_c, r0
 171                 mov     pc, lr
 172
 173 ENTRY(cpu_arm9tdmi_do_idle)
 174                 mov     pc, lr
 175
 176 /*
 177  * Function: arm9tdmi_switch_mm(unsigned long pgd_phys)
 178  * Params  : pgd_phys   Physical address of page table
 179  * Purpose : Perform a task switch, saving the old processes state, and restoring
 180  *           the new.
 181  */
 182 ENTRY(cpu_arm9tdmi_switch_mm)
 183                 mov     pc, lr
 184
 185 /*
 186  * Function: _arm9tdmi_reset
 187  * Params  : r0 = address to jump to
 188  * Notes   : This sets up everything for a reset
 189  */
 190 ENTRY(cpu_arm9tdmi_reset)
 191                 mov     pc, r0
 192
 193                 __INIT
 194
 195                 .type   __arm9tdmi_setup, #function
 196 __arm9tdmi_setup:
 197                 mov     r0, #0x7c                       @ . .... .LDP WC..
 198                 mov     pc, lr
 199                 .size   __arm9tdmi_setup, . - __arm9tdmi_setup
 200
 201                 __INITDATA
 202
 203 /*
 204  * Purpose : Function pointers used to access above functions - all calls
 205  *           come through these
 206  */
 207                 .type   arm9tdmi_processor_functions, #object
 208 ENTRY(arm9tdmi_processor_functions)
 209                 .word   cpu_arm9tdmi_data_abort
 210                 .word   cpu_arm9tdmi_proc_init
 211                 .word   cpu_arm9tdmi_proc_fin
 212                 .word   cpu_arm9tdmi_reset
 213                 .word   cpu_arm9tdmi_do_idle
 214                 .word   cpu_arm9tdmi_dcache_clean_area
 215                 .word   cpu_arm9tdmi_switch_mm
 216                 .size   arm9tdmi_processor_functions, . - arm9tdmi_processor_functions
 217
 218                 .section ".rodata"
 219
 220                 .type   cpu_arch_name, #object
 221 cpu_arch_name:  .asciz  "armv4t"
 222                 .size   cpu_arch_name, . - cpu_arch_name
 223
 224                 .type   cpu_elf_name, #object
 225 cpu_elf_name:   .asciz  "v4"
 226                 .size   cpu_elf_name, . - cpu_elf_name
 227
 228                 .type   cpu_arm9tdmi_name, #object
 229 cpu_arm9tdmi_name:
 230                 .asciz  "ARM9TDMI"
 231                 .size   cpu_arm9tdmi_name, . - cpu_arm9tdmi_name
 232
 233                 .type   cpu_p2001_name, #object
 234 cpu_p2001_name:
 235                 .asciz  "P2001"
 236                 .size   cpu_p2001_name, . - cpu_p2001_name
 237
 238                 .align
 239
 240                 .section ".proc.info.init", #alloc, #execinstr
 241
 242                 .type   __p2001_proc_info, #object
 243 __p2001_proc_info:
 244                 .long   0x41029000
 245                 .long   0xffffffff
 246                 .long   0x00000c1e
 247                 .long   0x00000c1e
 248                 b       __arm9tdmi_setup
 249                 .long   cpu_arch_name
 250                 .long   cpu_elf_name
 251                 .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
 252                 .long   cpu_p2001_name
 253                 .long   arm9tdmi_processor_functions
 254                 .long   0
 255                 .long   0
 256                 .long   v4_cache_fns
 257                 .size   __p2001_proc_info, . - __p2001_proc_info