2 * linux/arch/arm/mm/cache-v3.S
4 * Copyright (C) 1997-2002 Russell king
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/linkage.h>
11 #include <linux/init.h>
12 #include <asm/hardware.h>
14 #include "proc-macros.S"
17 * flush_user_cache_all()
19 * Invalidate all cache entries in a particular address
22 * - mm - mm_struct describing address space
24 ENTRY(v3_flush_user_cache_all)
27 * flush_kern_cache_all()
29 * Clean and invalidate the entire cache.
31 ENTRY(v3_flush_kern_cache_all)
35 * flush_user_cache_range(start, end, flags)
37 * Invalidate a range of cache entries in the specified
40 * - start - start address (may not be aligned)
41 * - end - end address (exclusive, may not be aligned)
42 * - flags - vma_area_struct flags describing address space
44 ENTRY(v3_flush_user_cache_range)
45 #ifdef CONFIG_CPU_CP15
47 mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
54 * coherent_kern_range(start, end)
56 * Ensure coherency between the Icache and the Dcache in the
57 * region described by start. If you have non-snooping
58 * Harvard caches, you need to implement this function.
60 * - start - virtual start address
61 * - end - virtual end address
63 ENTRY(v3_coherent_kern_range)
67 * coherent_user_range(start, end)
69 * Ensure coherency between the Icache and the Dcache in the
70 * region described by start. If you have non-snooping
71 * Harvard caches, you need to implement this function.
73 * - start - virtual start address
74 * - end - virtual end address
76 ENTRY(v3_coherent_user_range)
80 * flush_kern_dcache_page(void *page)
82 * Ensure no D cache aliasing occurs, either with itself or
85 * - addr - page aligned address
87 ENTRY(v3_flush_kern_dcache_page)
91 * dma_inv_range(start, end)
93 * Invalidate (discard) the specified virtual address range.
94 * May not write back any entries. If 'start' or 'end'
95 * are not cache line aligned, those lines must be written
98 * - start - virtual start address
99 * - end - virtual end address
101 ENTRY(v3_dma_inv_range)
105 * dma_flush_range(start, end)
107 * Clean and invalidate the specified virtual address range.
109 * - start - virtual start address
110 * - end - virtual end address
112 ENTRY(v3_dma_flush_range)
113 #ifdef CONFIG_CPU_CP15
115 mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
120 * dma_clean_range(start, end)
122 * Clean (write back) the specified virtual address range.
124 * - start - virtual start address
125 * - end - virtual end address
127 ENTRY(v3_dma_clean_range)
132 .type v3_cache_fns, #object
134 .long v3_flush_kern_cache_all
135 .long v3_flush_user_cache_all
136 .long v3_flush_user_cache_range
137 .long v3_coherent_kern_range
138 .long v3_coherent_user_range
139 .long v3_flush_kern_dcache_page
140 .long v3_dma_inv_range
141 .long v3_dma_clean_range
142 .long v3_dma_flush_range
143 .size v3_cache_fns, . - v3_cache_fns