arch/arm/mach-moxart/irq.c-bak-07312007

   1
   2 //#include <linux/config.h>
   3 #include <asm/arch/moxa.h>
   4 #include <linux/module.h>
   5 #include <linux/init.h>
   6
   7 //#include <asm/mach/irq.h>
   8 #include <asm/hardware.h>
   9 #include <asm/io.h>
  10 #include <asm/irq.h>
  11 #include <asm/system.h>
  12 #ifdef CONFIG_PCI
  13 #include <asm/arch/ftpci.h>
  14 #endif  // CONFIG_PCI
  15
  16 #if 0   // mask by Victtor Yu. 03-15-2007
  17 static spinlock_t cpe_int_lock;
  18 #else
  19 static spinlock_t cpe_int_lock=SPIN_LOCK_UNLOCKED;
  20 #endif
  21
  22 #if 0   // add by Victor Yu. 05-17-2005
  23 #include <asm/arch/irq.h>
  24 #if 0   // mask by Victor Yu, 03-15-2007
  25 struct irqchip  cpe_irq_chip = {
  26         .ack    = cpe_mask_ack_irq,
  27         .mask   = cpe_mask_irq,
  28         .unmask = cpe_unmask_irq,
  29 };
  30 #endif
  31 #endif
  32
  33 inline void cpe_irq_set_mode(unsigned int base_p,unsigned int irq,unsigned int edge)
  34 {
  35         if ( edge )
  36                 *(volatile unsigned int *)(base_p+IRQ_MODE_REG)|=(1<<irq);
  37         else
  38                 *(volatile unsigned int *)(base_p+IRQ_MODE_REG)&=~(1<<irq);
  39 }
  40
  41 inline void cpe_irq_set_level(unsigned int base_p,unsigned int irq,unsigned int low)
  42 {
  43         if ( low )
  44                 *(volatile unsigned int *)(base_p+IRQ_LEVEL_REG)|=(1<<irq);
  45         else
  46                 *(volatile unsigned int *)(base_p+IRQ_LEVEL_REG)&=~(1<<irq);
  47 }
  48
  49
  50 inline void cpe_fiq_set_mode(unsigned int base_p,unsigned int fiq,unsigned int edge)
  51 {
  52         if ( edge )
  53                 *(volatile unsigned int *)(base_p+FIQ_MODE_REG)|=(1<<fiq);
  54         else
  55                 *(volatile unsigned int *)(base_p+FIQ_MODE_REG)&=~(1<<fiq);
  56 }
  57
  58
  59 inline void cpe_fiq_set_level(unsigned int base_p,unsigned int fiq,unsigned int low)
  60 {
  61         if ( low )
  62                 *(volatile unsigned int *)(base_p+FIQ_LEVEL_REG)|=(1<<fiq);
  63         else
  64                 *(volatile unsigned int *)(base_p+FIQ_LEVEL_REG)&=~(1<<fiq);
  65 }
  66
  67
  68 void cpe_int_set_irq(unsigned int irq,int mode,int level)
  69 {
  70         unsigned long   flags;
  71
  72         spin_lock_irqsave(&cpe_int_lock, flags);
  73         if ( irq < 32 ) { //irq
  74                 cpe_irq_set_mode(CPE_IC_VA_BASE,irq ,mode);
  75                 cpe_irq_set_level(CPE_IC_VA_BASE,irq,level);
  76                 goto cpe_int_set_irq_exit;
  77         }
  78         if ( irq < 64 ) { //fiq
  79                 irq-=32;
  80                 cpe_fiq_set_mode(CPE_IC_VA_BASE,irq,mode);
  81                 cpe_fiq_set_level(CPE_IC_VA_BASE,irq,level);
  82                 goto cpe_int_set_irq_exit;
  83         }
  84
  85 #ifdef CONFIG_ARCH_CPE
  86         if ( irq < 96 ) { //a321 irq
  87                 irq-=64;
  88                 cpe_irq_set_mode(CPE_A321_IC_VA_BASE,irq,mode);
  89                 cpe_irq_set_level(CPE_A321_IC_VA_BASE,irq,level);
  90                 cpe_irq_set_mode(CPE_IC_VA_BASE,IRQ_EXT_A321,LEVEL);
  91                 cpe_irq_set_level(CPE_IC_VA_BASE,IRQ_EXT_A321,H_ACTIVE);
  92                 goto cpe_int_set_irq_exit;
  93         }
  94         if ( irq < 150 ) { //a321 fiq
  95                 irq-=96;
  96                 cpe_fiq_set_mode(CPE_A321_IC_VA_BASE,irq,mode);
  97                 cpe_fiq_set_level(CPE_A321_IC_VA_BASE,irq,level);
  98                 cpe_fiq_set_mode(CPE_IC_VA_BASE,IRQ_EXT_A321,LEVEL);
  99                 cpe_fiq_set_level(CPE_IC_VA_BASE,IRQ_EXT_A321,H_ACTIVE);
 100                 goto cpe_int_set_irq_exit;
 101         }
 102
 103 #ifdef CONFIG_PCI
 104         //pci virtual irq
 105         if ( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 106                 if( !ftpci_probed )
 107                         goto cpe_int_set_irq_exit;
 108                 cpe_irq_set_mode(CPE_A321_IC_VA_BASE,IRQ_A321_PCI,mode);
 109                 cpe_irq_set_level(CPE_A321_IC_VA_BASE,IRQ_A321_PCI,level);
 110                 cpe_irq_set_mode(CPE_IC_VA_BASE,IRQ_EXT_A321,LEVEL);
 111                 cpe_irq_set_level(CPE_IC_VA_BASE,IRQ_EXT_A321,H_ACTIVE);
 112 #if 1   // add by Victor Yu. 10-20-2005
 113                 goto cpe_int_set_irq_exit;
 114 #endif  // 10-20-2005
 115         }
 116 #endif  // CONFIG_PCI
 117 #endif  // CONFIG_ARCH_CPE
 118
 119 #ifdef CONFIG_ARCH_IA240
 120 #ifdef CONFIG_PCI
 121         //pci virtual irq
 122         if ( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 123                 if( !ftpci_probed )
 124                         goto cpe_int_set_irq_exit;
 125                 cpe_irq_set_mode(CPE_IC_VA_BASE,IRQ_PCI,LEVEL);
 126                 cpe_irq_set_level(CPE_IC_VA_BASE,IRQ_PCI,H_ACTIVE);
 127                 goto cpe_int_set_irq_exit;
 128         }
 129 #endif  // CONFIG_PCI
 130 #endif  // CONFIG_ARCH_IA240
 131
 132         //printk("Not support irq %d\n",irq);
 133
 134 cpe_int_set_irq_exit:
 135         spin_unlock_irqrestore(&cpe_int_lock, flags);
 136 }
 137
 138 void cpe_int_clear_irq(unsigned int base,unsigned int irq)
 139 {
 140         *(volatile unsigned int *)(base+IRQ_CLEAR_REG)=1<<irq;
 141 }
 142
 143 void cpe_int_clear_fiq(unsigned int base,unsigned int irq)
 144 {
 145         *(volatile unsigned int *)(base+FIQ_CLEAR_REG)=1<<irq;
 146 }
 147
 148 inline void cpe_int_disable_irq(unsigned int base,unsigned int irq)
 149 {
 150         *(volatile unsigned int *)(base+IRQ_MASK_REG)&=~(1<<irq);
 151 }
 152
 153 inline void cpe_int_disable_fiq(unsigned int base,unsigned int irq)
 154 {
 155         *(volatile unsigned int *)(base+FIQ_MASK_REG)&=~(1<<irq);
 156 }
 157
 158 /*  Turn the interrupt source on. */
 159 inline void cpe_int_enable_irq(unsigned int base,unsigned int irq)
 160 {
 161         *(volatile unsigned int *)(base+IRQ_MASK_REG)|=(1<<irq);
 162 }
 163
 164 inline void cpe_int_enable_fiq(unsigned int base,unsigned int irq)
 165 {
 166         *(volatile unsigned int *)(base+FIQ_MASK_REG)|=(1<<irq);
 167 }
 168
 169 void cpe_unmask_irq(unsigned int irq)
 170 {
 171         unsigned long   flags;
 172
 173         spin_lock_irqsave(&cpe_int_lock, flags);
 174         if ( irq < 32 ) { //irq
 175                 cpe_int_clear_irq(CPE_IC_VA_BASE,irq);
 176                 cpe_int_enable_irq(CPE_IC_VA_BASE,irq);
 177                 goto cpe_unmask_irq_exit;
 178         }
 179         if ( irq < 64 ) { //fiq
 180                 irq-=32;
 181                 cpe_int_clear_fiq(CPE_IC_VA_BASE,irq);
 182                 cpe_int_enable_fiq(CPE_IC_VA_BASE,irq);
 183                 goto cpe_unmask_irq_exit;
 184         }
 185
 186 #ifdef CONFIG_ARCH_CPE
 187         if ( irq < 96 ) { //a321 irq
 188                 irq-=64;
 189                 cpe_int_clear_irq(CPE_A321_IC_VA_BASE,irq);
 190                 cpe_int_clear_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 191                 cpe_int_enable_irq(CPE_A321_IC_VA_BASE,irq);
 192                 cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 193                 goto cpe_unmask_irq_exit;
 194         }
 195         if ( irq < 150 ) { //a321 fiq
 196                 irq-=96;
 197                 cpe_int_clear_fiq(CPE_A321_IC_VA_BASE,irq);
 198                 cpe_int_clear_fiq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 199                 cpe_int_enable_fiq(CPE_A321_IC_VA_BASE,irq);
 200                 cpe_int_enable_fiq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 201                 goto cpe_unmask_irq_exit;
 202         }
 203
 204 #ifdef CONFIG_PCI
 205         //pci virtual irq
 206         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 207                 if( !ftpci_probed )
 208                         goto cpe_unmask_irq_exit;
 209                 ftpci_clear_irq(irq-150);
 210                 cpe_int_clear_irq(CPE_A321_IC_VA_BASE,IRQ_A321_PCI);
 211                 cpe_int_enable_irq(CPE_A321_IC_VA_BASE,IRQ_A321_PCI); //always enabled
 212                 cpe_int_clear_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 213                 cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_EXT_A321); //always enabled
 214                 goto cpe_unmask_irq_exit;
 215         }
 216 #endif  // CONFIG_PCI
 217 #endif  // CONFIG_ARCH_CPE
 218
 219 #ifdef CONFIG_ARCH_IA240
 220 #ifdef CONFIG_PCI
 221         //pci virtual irq
 222         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 223                 if( !ftpci_probed )
 224                         goto cpe_unmask_irq_exit;
 225                 ftpci_clear_irq(irq-64);
 226                 cpe_int_clear_irq(CPE_IC_VA_BASE,IRQ_PCI);
 227                 cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_PCI); //always enabled
 228                 goto cpe_unmask_irq_exit;
 229         }
 230 #endif  // CONFIG_PCI
 231 #endif  // CONFIG_ARCH_IA240
 232
 233 cpe_unmask_irq_exit:
 234         spin_unlock_irqrestore(&cpe_int_lock, flags);
 235 }
 236
 237 void cpe_mask_ack_irq(unsigned int irq)
 238 {
 239         unsigned long   flags;
 240
 241         spin_lock_irqsave(&cpe_int_lock, flags);
 242         if ( irq < 32 ) {       //irq
 243                 cpe_int_disable_irq(CPE_IC_VA_BASE,irq);
 244                 goto cpe_mask_ack_irq_exit;
 245         }
 246
 247         if ( irq < 64 ) {       //fiq
 248                 irq-=32;
 249                 cpe_int_disable_fiq(CPE_IC_VA_BASE,irq);
 250                 goto cpe_mask_ack_irq_exit;
 251         }
 252
 253 #ifdef CONFIG_ARCH_CPE
 254         if ( irq < 96 ) { //a321 irq
 255                 irq-=64;
 256                 cpe_int_disable_irq(CPE_A321_IC_VA_BASE,irq);
 257                 goto cpe_mask_ack_irq_exit;
 258         }
 259         if ( irq < 150 ) { //a321 fiq
 260                 irq-=96;
 261                 cpe_int_disable_fiq(CPE_A321_IC_VA_BASE,irq);
 262                 goto cpe_mask_ack_irq_exit;
 263         }
 264 #ifdef CONFIG_PCI
 265         //pci virtual irq
 266         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 267                 if( !ftpci_probed )
 268                         goto cpe_mask_ack_irq_exit;
 269                 cpe_int_disable_irq(CPE_A321_IC_VA_BASE,IRQ_A321_PCI); //always enabled
 270                 goto cpe_mask_ack_irq_exit;
 271         }
 272 #endif  // CONFIG_PCI
 273 #endif  // CONFIG_ARCH_CPE
 274
 275 #ifdef CONFIG_ARCH_IA240
 276 #ifdef CONFIG_PCI
 277         //pci virtual irq
 278         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 279                 if( !ftpci_probed )
 280                         goto cpe_mask_ack_irq_exit;
 281                 cpe_int_disable_irq(CPE_IC_VA_BASE,IRQ_PCI);
 282                 goto cpe_mask_ack_irq_exit;
 283         }
 284 #endif  // CONFIG_PCI
 285 #endif  // CONFIG_ARCH_IA240
 286
 287 cpe_mask_ack_irq_exit:
 288         spin_unlock_irqrestore(&cpe_int_lock, flags);
 289 }
 290
 291 void cpe_mask_irq(unsigned int irq)
 292 {
 293         cpe_mask_ack_irq(irq);
 294 }
 295
 296 void cpe_int_init(void)
 297 {
 298         spin_lock_init(&cpe_int_lock);
 299         //init interrupt controller
 300         outl(0, CPE_IC_VA_BASE+IRQ_MASK_REG);
 301         outl(0, CPE_IC_VA_BASE+FIQ_MASK_REG);
 302         outl(0xffffffff, CPE_IC_VA_BASE+IRQ_CLEAR_REG);
 303         outl(0xffffffff, CPE_IC_VA_BASE+FIQ_CLEAR_REG);
 304
 305 #ifdef CONFIG_ARCH_CPE
 306         //init a321 interrupt controller
 307         outl(0, CPE_A321_IC_VA_BASE+IRQ_MASK_REG);
 308         outl(0, CPE_A321_IC_VA_BASE+FIQ_MASK_REG);
 309         outl(0xffffffff, CPE_A321_IC_VA_BASE+IRQ_CLEAR_REG);
 310         outl(0xffffffff, CPE_A321_IC_VA_BASE+FIQ_CLEAR_REG);
 311         cpe_int_set_irq(IRQ_EXT_A321, LEVEL, H_ACTIVE);
 312         cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 313 #endif  // CONFIG_ARCH_CPE
 314 }
 315
 316 EXPORT_SYMBOL(cpe_int_set_irq);
 317 EXPORT_SYMBOL(cpe_int_clear_irq);