firmware/target/arm/as3525/usb-drv-as3525v2.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2010 Amaury Pouly
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "usb.h"
  23 #include "usb_drv.h"
  24 #include "as3525v2.h"
  25 #include "clock-target.h"
  26 #include "ascodec.h"
  27 #include "as3514.h"
  28 #include "stdbool.h"
  29 #include "string.h"
  30 #include "stdio.h"
  31 #include "panic.h"
  32 #include "mmu-arm.h"
  33 #include "system.h"
  34 #define LOGF_ENABLE
  35 #include "logf.h"
  36 #include "usb-drv-as3525v2.h"
  37 #include "usb_core.h"
  38
  39 static int __in_ep_list[NUM_IN_EP] = {IN_EP_LIST};
  40 static int __out_ep_list[NUM_OUT_EP] = {OUT_EP_LIST};
  41 static int __in_ep_list_ep0[NUM_IN_EP + 1] = {0, IN_EP_LIST};
  42 static int __out_ep_list_ep0[NUM_OUT_EP + 1] = {0, OUT_EP_LIST};
  43
  44 /* iterate through each in/out ep except EP0
  45  * 'counter' is the counter, 'ep' is the actual value */
  46 #define FOR_EACH_IN_EP(counter, ep) \
  47     for(counter = 0, ep = __in_ep_list[0]; counter < NUM_IN_EP; counter++, ep = __in_ep_list[counter])
  48
  49 #define FOR_EACH_IN_EP_AND_EP0(counter, ep) \
  50     for(counter = 0, ep = __in_ep_list_ep0[0]; counter <= NUM_IN_EP; counter++, ep = __in_ep_list_ep0[counter])
  51
  52 #define FOR_EACH_OUT_EP(counter, ep) \
  53     for(counter = 0, ep = __out_ep_list[0]; counter < NUM_OUT_EP; counter++, ep = __out_ep_list[counter])
  54
  55 #define FOR_EACH_OUT_EP_AND_EP0(counter, ep) \
  56     for(counter = 0, ep = __out_ep_list_ep0[0]; counter <= NUM_OUT_EP; counter++, ep = __out_ep_list_ep0[counter])
  57
  58 struct usb_endpoint
  59 {
  60     bool active;
  61     unsigned int len;
  62     bool wait;
  63     bool busy;
  64     int status;
  65     struct wakeup complete;
  66 };
  67
  68 // 0:out, 1:in
  69 static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS][2];
  70 static struct usb_ctrlrequest ep0_setup_pkt USB_DEVBSS_ATTR;
  71
  72 void usb_attach(void)
  73 {
  74     logf("usb-drv: attach");
  75     usb_enable(true);
  76 }
  77
  78 static void usb_delay(void)
  79 {
  80     int i = 0;
  81     while(i < 0x300)
  82     {
  83         asm volatile("nop");
  84         i++;
  85     }
  86 }
  87
  88 static void as3525v2_connect(void)
  89 {
  90     logf("usb-drv: init as3525v2");
  91     /* 1) enable usb core clock */
  92     CGU_PERI |= CGU_USB_CLOCK_ENABLE;
  93     usb_delay();
  94     /* 2) enable usb phy clock */
  95     /* PHY clock */
  96     CGU_USB = 1<<5 /* enable */
  97         | (CLK_DIV(AS3525_PLLA_FREQ, 60000000)) << 2
  98         | 1; /* source = PLLA */
  99     usb_delay();
 100     /* 3) clear "stop pclk" */
 101     PCGCCTL &= ~0x1;
 102     usb_delay();
 103     /* 4) clear "power clamp" */
 104     PCGCCTL &= ~0x4;
 105     usb_delay();
 106     /* 5) clear "reset power down module" */
 107     PCGCCTL &= ~0x8;
 108     usb_delay();
 109     /* 6) set "power on program done" */
 110     DCTL |= DCTL_pwronprgdone;
 111     usb_delay();
 112     /* 7) core soft reset */
 113     GRSTCTL |= GRSTCTL_csftrst;
 114     usb_delay();
 115     /* 8) hclk soft reset */
 116     GRSTCTL |= GRSTCTL_hsftrst;
 117     usb_delay();
 118     /* 9) flush and reset everything */
 119     GRSTCTL |= 0x3f;
 120     usb_delay();
 121     /* 10) force device mode*/
 122     GUSBCFG &= ~GUSBCFG_force_host_mode;
 123     GUSBCFG |= GUSBCFG_force_device_mode;
 124     usb_delay();
 125     /* 11) Do something that is probably CCU related but undocumented*/
 126     CCU_USB_THINGY &= ~0x1000;
 127     usb_delay();
 128     CCU_USB_THINGY &= ~0x300000;
 129     usb_delay();
 130     /* 12) reset usb core parameters (dev addr, speed, ...) */
 131     DCFG = 0;
 132     usb_delay();
 133 }
 134
 135 static void as3525v2_disconnect(void)
 136 {
 137 }
 138
 139 static void enable_device_interrupts(void)
 140 {
 141     /* Clear any pending interrupt */
 142     GINTSTS = 0xffffffff;
 143     /* Clear any pending otg interrupt */
 144     GOTGINT = 0xffffffff;
 145     /* Enable interrupts */
 146     GINTMSK = GINTMSK_usbreset
 147                 | GINTMSK_enumdone
 148                 | GINTMSK_inepintr
 149                 | GINTMSK_outepintr
 150                 | GINTMSK_disconnect;
 151 }
 152
 153 static void flush_tx_fifos(int nums)
 154 {
 155     unsigned int i = 0;
 156
 157     GRSTCTL = (nums << GRSTCTL_txfnum_bitp)
 158             | GRSTCTL_txfflsh_flush;
 159     while(GRSTCTL & GRSTCTL_txfflsh_flush && i < 0x300)
 160         i++;
 161     if(GRSTCTL & GRSTCTL_txfflsh_flush)
 162         panicf("usb-drv: hang of flush tx fifos (%x)", nums);
 163     /* wait 3 phy clocks */
 164     udelay(1);
 165 }
 166
 167 static void flush_rx_fifos(void)
 168 {
 169     unsigned int i = 0;
 170
 171     GRSTCTL = GRSTCTL_rxfflsh_flush;
 172     while(GRSTCTL & GRSTCTL_rxfflsh_flush && i < 0x300)
 173         i++;
 174     if(GRSTCTL & GRSTCTL_rxfflsh_flush)
 175         panicf("usb-drv: hang of flush rx fifos");
 176     /* wait 3 phy clocks */
 177     udelay(1);
 178 }
 179
 180 static void prepare_setup_ep0(void)
 181 {
 182     /* setup DMA */
 183     clean_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt);  /* force write back */
 184     DOEPDMA(0) = (unsigned long)&ep0_setup_pkt; /* virtual address=physical address */
 185
 186     /* Setup EP0 OUT with the following parameters:
 187      * packet count = 1
 188      * setup packet count = 1
 189      * transfer size = 8 (setup packet)
 190      */
 191     DOEPTSIZ(0) = (1 << DEPTSIZ0_supcnt_bitp)
 192                 | (1 << DEPTSIZ0_pkcnt_bitp)
 193                 | 8;
 194
 195     /* Enable endpoint, clear nak */
 196     DOEPCTL(0) |= DEPCTL_epena | DEPCTL_cnak;
 197
 198     if(!(DOEPCTL(0) & DEPCTL_epena))
 199         panicf("usb-drv: failed to enable EP0 !");
 200 }
 201
 202 static void reset_endpoints(void)
 203 {
 204     int i, ep;
 205     /* disable all endpoints except EP0 */
 206     FOR_EACH_IN_EP(i, ep)
 207         if(DIEPCTL(ep) & DEPCTL_epena)
 208             DIEPCTL(ep) =  DEPCTL_epdis | DEPCTL_snak;
 209         else
 210             DIEPCTL(ep) = 0;
 211
 212     FOR_EACH_OUT_EP(i, ep)
 213         if(DOEPCTL(ep) & DEPCTL_epena)
 214             DOEPCTL(ep) =  DEPCTL_epdis | DEPCTL_snak;
 215         else
 216             DOEPCTL(ep) = 0;
 217
 218     /* 64 bytes packet size, active endpoint */
 219     DOEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep;
 220     DIEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep;
 221
 222     prepare_setup_ep0();
 223 }
 224
 225 static void core_dev_init(void)
 226 {
 227     unsigned int i, ep;
 228     /* Restart the phy clock */
 229     PCGCCTL = 0;
 230     /* Set phy speed : high speed */
 231     DCFG = (DCFG & ~bitm(DCFG, devspd)) | DCFG_devspd_hs_phy_hs;
 232
 233     /* Check hardware capabilities */
 234     if(extract(GHWCFG2, arch) != GHWCFG2_ARCH_INTERNAL_DMA)
 235         panicf("usb-drv: wrong architecture (%ld)", extract(GHWCFG2, arch));
 236     if(extract(GHWCFG2, hs_phy_type) != GHWCFG2_PHY_TYPE_UTMI)
 237         panicf("usb-drv: wrong HS phy type (%ld)", extract(GHWCFG2, hs_phy_type));
 238     if(extract(GHWCFG2, fs_phy_type) != GHWCFG2_PHY_TYPE_UNSUPPORTED)
 239         panicf("usb-drv: wrong FS phy type (%ld)", extract(GHWCFG2, fs_phy_type));
 240     if(extract(GHWCFG4, utmi_phy_data_width) != 0x2)
 241         panicf("usb-drv: wrong utmi data width (%ld)", extract(GHWCFG4, utmi_phy_data_width));
 242     if(!(GHWCFG4 & GHWCFG4_ded_fifo_en)) /* it seems to be multiple tx fifo support */
 243         panicf("usb-drv: no multiple tx fifo");
 244
 245     #ifdef USE_CUSTOM_FIFO_LAYOUT
 246     if(!(GHWCFG2 & GHWCFG2_dyn_fifo))
 247         panicf("usb-drv: no dynamic fifo");
 248     if(GRXFSIZ != DATA_FIFO_DEPTH)
 249         panicf("usb-drv: wrong data fifo size");
 250     #endif /* USE_CUSTOM_FIFO_LAYOUT */
 251
 252     /* do some logging */
 253     /*
 254     logf("hwcfg1: %08lx", GHWCFG1);
 255     logf("hwcfg2: %08lx", GHWCFG2);
 256     logf("hwcfg3: %08lx", GHWCFG3);
 257     logf("hwcfg4: %08lx", GHWCFG4);
 258     */
 259
 260     if(USB_NUM_ENDPOINTS != extract(GHWCFG2, num_ep))
 261         panicf("usb-drv: wrong endpoint number");
 262
 263     FOR_EACH_IN_EP_AND_EP0(i, ep)
 264     {
 265         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 266         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_IN)
 267             panicf("usb-drv: EP%d is no IN or BIDIR", ep);
 268     }
 269     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 270     {
 271         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 272         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_OUT)
 273             panicf("usb-drv: EP%d is no OUT or BIDIR", ep);
 274     }
 275
 276     /* Setup interrupt masks for endpoints */
 277     /* Setup interrupt masks */
 278     DOEPMSK = DOEPINT_setup | DOEPINT_xfercompl | DOEPINT_ahberr;
 279     DIEPMSK = DIEPINT_xfercompl | DIEPINT_timeout | DIEPINT_ahberr;
 280     DAINTMSK = 0xffffffff;
 281
 282     reset_endpoints();
 283
 284     /* fixme: threshold tweaking only takes place if we use multiple tx fifos it seems */
 285     /* only dump them for now, leave threshold disabled */
 286     /*
 287     logf("threshold control:");
 288     logf("  non_iso_thr_en: %d", (DTHRCTL & DTHRCTL_non_iso_thr_en) ? 1 : 0);
 289     logf("  iso_thr_en: %d", (DTHRCTL & DTHRCTL_iso_thr_en) ? 1 : 0);
 290     logf("  tx_thr_len: %lu", extract(DTHRCTL, tx_thr_len));
 291     logf("  rx_thr_en: %d", (DTHRCTL & DTHRCTL_rx_thr_en) ? 1 : 0);
 292     logf("  rx_thr_len: %lu", extract(DTHRCTL, rx_thr_len));
 293     */
 294
 295     /* enable USB interrupts */
 296     enable_device_interrupts();
 297 }
 298
 299 static void core_init(void)
 300 {
 301     /* Disconnect */
 302     DCTL |= DCTL_sftdiscon;
 303     /* Select UTMI+ 16 */
 304     GUSBCFG |= GUSBCFG_phy_if;
 305
 306     /* fixme: the current code is for internal DMA only, the clip+ architecture
 307      *        define the internal DMA model */
 308     /* Set burstlen and enable DMA*/
 309     GAHBCFG = (GAHBCFG_INT_DMA_BURST_INCR4 << GAHBCFG_hburstlen_bitp)
 310                 | GAHBCFG_dma_enable;
 311     /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */
 312     GUSBCFG &= ~(GUSBCFG_srpcap | GUSBCFG_hnpcapp);
 313
 314     /* perform device model specific init */
 315     core_dev_init();
 316
 317     /* Reconnect */
 318     DCTL &= ~DCTL_sftdiscon;
 319 }
 320
 321 static void enable_global_interrupts(void)
 322 {
 323     VIC_INT_ENABLE = INTERRUPT_USB;
 324     GAHBCFG |= GAHBCFG_glblintrmsk;
 325 }
 326
 327 static void disable_global_interrupts(void)
 328 {
 329     GAHBCFG &= ~GAHBCFG_glblintrmsk;
 330     VIC_INT_EN_CLEAR = INTERRUPT_USB;
 331 }
 332
 333 void usb_drv_init(void)
 334 {
 335     unsigned i, ep;
 336     logf("usb_drv_init");
 337     /* Boost cpu */
 338     cpu_boost(1);
 339     /* Enable PHY and clocks (but leave pullups disabled) */
 340     as3525v2_connect();
 341     logf("usb-drv: synopsis id: %lx", GSNPSID);
 342     /* Core init */
 343     core_init();
 344     FOR_EACH_IN_EP_AND_EP0(i, ep)
 345         wakeup_init(&endpoints[ep][DIR_IN].complete);
 346     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 347         wakeup_init(&endpoints[ep][DIR_OUT].complete);
 348     /* Enable global interrupts */
 349     enable_global_interrupts();
 350 }
 351
 352 void usb_drv_exit(void)
 353 {
 354     logf("usb_drv_exit");
 355
 356     disable_global_interrupts();
 357     as3525v2_disconnect();
 358     cpu_boost(0);
 359 }
 360
 361 static void handle_ep_int(int ep, bool dir_in)
 362 {
 363     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 364     if(dir_in)
 365     {
 366         if(DIEPINT(ep) & DIEPINT_ahberr)
 367             panicf("usb-drv: ahb error on EP%d IN", ep);
 368         if(DIEPINT(ep) & DIEPINT_xfercompl)
 369         {
 370             logf("usb-drv: xfer complete on EP%d IN", ep);
 371             if(endpoint->busy)
 372             {
 373                 endpoint->busy = false;
 374                 endpoint->status = 0;
 375                 /* works even for PE0 */
 376                 int transfered = endpoint->len - (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 377                 logf("len=%d reg=%ld xfer=%d", endpoint->len,
 378                     (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 379                     transfered);
 380                 invalidate_dcache_range((void *)DIEPDMA(ep), transfered);
 381                 DIEPCTL(ep) |= DEPCTL_snak;
 382                 /* if the transfer length is 0 on EP0, this is a ack
 383                  * so we setup EP0 to receive next setup */
 384                 if(ep == 0 && endpoint->len == 0)
 385                     prepare_setup_ep0();
 386                 DIEPCTL(ep) |= DEPCTL_snak;
 387                 usb_core_transfer_complete(ep, USB_DIR_IN, 0, transfered);
 388                 wakeup_signal(&endpoint->complete);
 389             }
 390         }
 391         if(DIEPINT(ep) & DIEPINT_timeout)
 392         {
 393             logf("usb-drv: timeout on EP%d IN", ep);
 394             if(endpoint->busy)
 395             {
 396                 endpoint->busy = false;
 397                 endpoint->status = 1;
 398                 /* for safety, act as if no bytes as been transfered */
 399                 endpoint->len = 0;
 400                 DIEPCTL(ep) |= DEPCTL_snak;
 401                 usb_core_transfer_complete(ep, USB_DIR_IN, 1, 0);
 402                 wakeup_signal(&endpoint->complete);
 403             }
 404         }
 405         /* clear interrupts */
 406         DIEPINT(ep) = DIEPINT(ep);
 407     }
 408     else
 409     {
 410         if(DOEPINT(ep) & DOEPINT_ahberr)
 411             panicf("usb-drv: ahb error on EP%d OUT", ep);
 412         if(DOEPINT(ep) & DOEPINT_xfercompl)
 413         {
 414             logf("usb-drv: xfer complete on EP%d OUT", ep);
 415             if(endpoint->busy)
 416             {
 417                 endpoint->busy = false;
 418                 endpoint->status = 0;
 419                 /* works even for EP0 */
 420                 int transfered = endpoint->len - (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 421                 logf("len=%d reg=%ld xfer=%d", endpoint->len,
 422                     (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 423                     transfered);
 424                 invalidate_dcache_range((void *)DOEPDMA(ep), transfered);
 425                 /* if the transfer length is 0 on EP0, this is a ack
 426                  * so we setup EP0 to receive next setup */
 427                 if(ep == 0 && endpoint->len == 0)
 428                     prepare_setup_ep0();
 429                 else
 430                     DOEPCTL(ep) |= DEPCTL_snak;
 431                 usb_core_transfer_complete(ep, USB_DIR_OUT, 0, transfered);
 432                 wakeup_signal(&endpoint->complete);
 433             }
 434         }
 435         if(DOEPINT(ep) & DOEPINT_setup)
 436         {
 437             logf("usb-drv: setup on EP%d OUT", ep);
 438             logf("rt=%x r=%x", ep0_setup_pkt.bRequestType, ep0_setup_pkt.bRequest);
 439             if(ep != 0)
 440                 panicf("usb-drv: setup not on EP0, this is impossible");
 441             DOEPCTL(ep) |= DEPCTL_snak;
 442             /* handle the set address here because of a bug in the usb core */
 443             invalidate_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt);  /* force write back */
 444             if(ep0_setup_pkt.bRequestType == USB_TYPE_STANDARD &&
 445                     ep0_setup_pkt.bRequest == USB_REQ_SET_ADDRESS)
 446                 usb_drv_set_address(ep0_setup_pkt.wValue);
 447             usb_core_control_request(&ep0_setup_pkt);
 448         }
 449         /* clear interrupts */
 450         DOEPINT(ep) = DOEPINT(ep);
 451     }
 452 }
 453
 454 static void handle_ep_ints(void)
 455 {
 456     logf("usb-drv: ep int");
 457     /* we must read it */
 458     unsigned long daint = DAINT;
 459     unsigned i, ep;
 460
 461     FOR_EACH_IN_EP_AND_EP0(i, ep)
 462         if(daint & DAINT_IN_EP(ep))
 463             handle_ep_int(ep, true);
 464     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 465         if(daint & DAINT_OUT_EP(ep))
 466             handle_ep_int(ep, false);
 467
 468     /* write back to clear status */
 469     DAINT = daint;
 470 }
 471
 472 /* interrupt service routine */
 473 void INT_USB(void)
 474 {
 475     /* some bits in GINTSTS can be set even though we didn't enable the interrupt source
 476      * so AND it with the actual mask */
 477     unsigned long sts = GINTSTS & GINTMSK;
 478
 479     /* device part */
 480     if(sts & GINTMSK_usbreset)
 481     {
 482         logf("usb-drv: bus reset");
 483
 484         /* Clear the Remote Wakeup Signalling */
 485         //DCTL &= ~DCTL_rmtwkupsig;
 486
 487         /* Flush FIFOs */
 488         flush_tx_fifos(0x10);
 489         flush_rx_fifos();
 490
 491         reset_endpoints();
 492
 493         /* Reset Device Address */
 494         DCFG &= ~bitm(DCFG, devadr);
 495
 496         usb_core_bus_reset();
 497     }
 498
 499     if(sts & GINTMSK_enumdone)
 500     {
 501         logf("usb-drv: enum done");
 502
 503         /* read speed */
 504         switch(extract(DSTS, enumspd))
 505         {
 506             case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
 507                 logf("usb-drv: HS");
 508                 break;
 509             case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
 510             case DSTS_ENUMSPD_FS_PHY_48MHZ:
 511                 logf("usb-drv: FS");
 512                 break;
 513             case DSTS_ENUMSPD_LS_PHY_6MHZ:
 514                 panicf("usb-drv: LS is not supported");
 515         }
 516
 517         /* fixme: change EP0 mps here */
 518     }
 519
 520     if(sts & (GINTMSK_outepintr | GINTMSK_inepintr))
 521     {
 522         handle_ep_ints();
 523     }
 524
 525     if(sts & GINTMSK_disconnect)
 526         panicf("usb-drv: disconnect");
 527
 528     GINTSTS = GINTSTS;
 529 }
 530
 531 int usb_drv_port_speed(void)
 532 {
 533     return 0;
 534 }
 535
 536 int usb_drv_request_endpoint(int type, int dir)
 537 {
 538     (void) type;
 539     (void) dir;
 540     logf("usb-drv: request endpoint (type=%d,dir=%s)", type, dir == USB_DIR_IN ? "IN" : "OUT");
 541     return -1;
 542 }
 543
 544 void usb_drv_release_endpoint(int ep)
 545 {
 546     //logf("usb-drv: release EP%d %s", EP_NUM(ep), EP_DIR(ep) == DIR_IN ? "IN" : "OUT");
 547     endpoints[EP_NUM(ep)][EP_DIR(ep)].active = false;
 548 }
 549
 550 void usb_drv_cancel_all_transfers(void)
 551 {
 552     logf("usb-drv: cancel all transfers");
 553     int flags = disable_irq_save();
 554     unsigned i, ep;
 555     FOR_EACH_IN_EP(i, ep)
 556     {
 557         endpoints[ep][DIR_IN].status = 1;
 558         endpoints[ep][DIR_IN].wait = false;
 559         endpoints[ep][DIR_IN].busy = false;
 560         wakeup_signal(&endpoints[ep][DIR_IN].complete);
 561         DIEPCTL(ep) = (DIEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_epdis;
 562     }
 563     FOR_EACH_OUT_EP(i, ep)
 564     {
 565         endpoints[ep][DIR_OUT].status = 1;
 566         endpoints[ep][DIR_OUT].wait = false;
 567         endpoints[ep][DIR_OUT].busy = false;
 568         wakeup_signal(&endpoints[ep][DIR_OUT].complete);
 569         DOEPCTL(ep) = (DOEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_epdis;
 570     }
 571
 572     restore_irq(flags);
 573 }
 574
 575 static int usb_drv_transfer(int ep, void *ptr, int len, bool dir_in, bool blocking)
 576 {
 577     ep = EP_NUM(ep);
 578     logf("usb-drv: xfer EP%d, len=%d, dir_in=%d, blocking=%d", ep,
 579         len, dir_in, blocking);
 580
 581     volatile unsigned long *epctl = dir_in ? &DIEPCTL(ep) : &DOEPCTL(ep);
 582     volatile unsigned long *eptsiz = dir_in ? &DIEPTSIZ(ep) : &DOEPTSIZ(ep);
 583     volatile unsigned long *epdma = dir_in ? &DIEPDMA(ep) : &DOEPDMA(ep);
 584     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 585     #define DEPCTL  *epctl
 586     #define DEPTSIZ *eptsiz
 587     #define DEPDMA  *epdma
 588
 589     if(endpoint->busy)
 590         panicf("usb-drv: EP%d %s is already busy", ep, dir_in ? "IN" : "OUT");
 591
 592     if(DEPCTL & DEPCTL_stall)
 593     {
 594         logf("usb-drv: cannot receive on a stalled endpoint");
 595         return -1;
 596     }
 597     endpoint->busy = true;
 598     endpoint->len = len;
 599     endpoint->wait = blocking;
 600     DEPCTL |= DEPCTL_usbactep;
 601
 602     int mps = 64;
 603     int nb_packets = (len + mps - 1) / mps;
 604
 605     if(len == 0)
 606         DEPTSIZ = 1 << DEPTSIZ_pkcnt_bitp;
 607     else
 608         DEPTSIZ = (nb_packets << DEPTSIZ_pkcnt_bitp) | len;
 609     clean_dcache_range(ptr, len);
 610     DEPDMA = (unsigned long)ptr;
 611     DEPCTL |= DEPCTL_epena | DEPCTL_cnak;
 612
 613     /* fixme: check if endpoint was really enabled ? */
 614
 615     if(blocking)
 616         wakeup_wait(&endpoint->complete, TIMEOUT_BLOCK);
 617     if(endpoint->status != 0)
 618         return -1;
 619     return 0;
 620
 621     #undef DEPCTL
 622     #undef DEPTSIZ
 623     #undef DEPDMA
 624 }
 625
 626 int usb_drv_recv(int ep, void *ptr, int len)
 627 {
 628     return usb_drv_transfer(ep, ptr, len, false, false);
 629 }
 630
 631 int usb_drv_send(int ep, void *ptr, int len)
 632 {
 633     return usb_drv_transfer(ep, ptr, len, true, true);
 634 }
 635
 636 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
 637 {
 638     return usb_drv_transfer(ep, ptr, len, true, false);
 639 }
 640
 641
 642 void usb_drv_set_test_mode(int mode)
 643 {
 644     (void) mode;
 645 }
 646
 647 void usb_drv_set_address(int address)
 648 {
 649     /* ignore it if addres is already set */
 650     if(extract(DCFG, devadr) == 0)
 651     {
 652         logf("usb-drv: set address %x", address);
 653         DCFG = (DCFG & ~bitm(DCFG, devadr)) | (address << DCFG_devadr_bitp);
 654     }
 655 }
 656
 657 void usb_drv_stall(int ep, bool stall, bool in)
 658 {
 659     (void) ep;
 660     (void) stall;
 661     (void) in;
 662     logf("usb-drv: %sstall EP%d %s", stall ? "" : "un", ep, in ? "IN" : "OUT");
 663 }
 664
 665 bool usb_drv_stalled(int ep, bool in)
 666 {
 667     (void) ep;
 668     (void) in;
 669     return true;
 670 }
 671