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Import 2.3.18pre1
[davej-history.git] / drivers / sound / sonicvibes.c
blob8b8190cb1625644d5cd7c597e819e8bfd3878259
1 /*****************************************************************************/
2
3 /*
4 * sonicvibes.c -- S3 Sonic Vibes audio driver.
5 *
6 * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to David C. Niemi
23 *
24 *
25 * Module command line parameters:
26 * none so far
27 *
28 *
29 * Supported devices:
30 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
31 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
32 * /dev/midi simple MIDI UART interface, no ioctl
33 *
34 * The card has both an FM and a Wavetable synth, but I have to figure
35 * out first how to drive them...
36 *
37 * Revision history
38 * 06.05.98 0.1 Initial release
39 * 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
40 * First stab at a simple midi interface (no bells&whistles)
41 * 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
42 * set_dac_rate in the FMODE_WRITE case in sv_open
43 * Fix hwptr out of bounds (now mpg123 works)
44 * 14.05.98 0.4 Don't allow excessive interrupt rates
45 * 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.98 0.6 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.98 0.7 Fix realplayer problems - dac.count issues
50 * 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
51 * 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
52 * 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
53 * hopefully killed the egcs section type conflict
54 * 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
55 * reported by Johan Maes <joma@telindus.be>
56 * 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
57 * read/write cannot be executed
58 * 05.04.99 0.13 added code to sv_read and sv_write which should detect
59 * lockups of the sound chip and revive it. This is basically
60 * an ugly hack, but at least applications using this driver
61 * won't hang forever. I don't know why these lockups happen,
62 * it might well be the motherboard chipset (an early 486 PCI
63 * board with ALI chipset), since every busmastering 100MB
64 * ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
65 * exhibit similar behaviour (they work for a couple of packets
66 * and then lock up and can be revived by ifconfig down/up).
67 * 07.04.99 0.14 implemented the following ioctl's: SOUND_PCM_READ_RATE,
68 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
69 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
70 * Note: dmaio hack might still be wrong on archs other than i386
71 * 15.06.99 0.15 Fix bad allocation bug.
72 * Thanks to Deti Fliegl <fliegl@in.tum.de>
73 * 28.06.99 0.16 Add pci_set_master
74 * 03.08.99 0.17 adapt to Linus' new __setup/__initcall
75 * added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
76 * 12.08.99 0.18 module_init/__setup fixes
77 * 24.08.99 0.19 get rid of the dmaio kludge, replace with allocate_resource
78 * 31.08.99 0.20 add spin_lock_init
79 * __initlocaldata to fix gcc 2.7.x problems
80 * use new resource allocation to allocate DDMA IO space
81 * replaced current->state = x with set_current_state(x)
82 * 03.09.99 0.21 change read semantics for MIDI to match
83 * OSS more closely; remove possible wakeup race
84 *
85 */
86
87 /*****************************************************************************/
88
89 #include <linux/version.h>
90 #include <linux/module.h>
91 #include <linux/string.h>
92 #include <linux/ioport.h>
93 #include <linux/sched.h>
94 #include <linux/delay.h>
95 #include <linux/sound.h>
96 #include <linux/malloc.h>
97 #include <linux/soundcard.h>
98 #include <linux/pci.h>
99 #include <asm/io.h>
100 #include <asm/dma.h>
101 #include <linux/init.h>
102 #include <linux/poll.h>
103 #include <linux/spinlock.h>
104 #include <asm/uaccess.h>
105 #include <asm/hardirq.h>
106
107 #include "dm.h"
108
109 /* --------------------------------------------------------------------- */
110
111 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
112
113 /* --------------------------------------------------------------------- */
114
115 #ifndef PCI_VENDOR_ID_S3
116 #define PCI_VENDOR_ID_S3 0x5333
117 #endif
118 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
119 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
120 #endif
121
122 #define SV_MAGIC ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
123
124 #define SV_EXTENT_SB 0x10
125 #define SV_EXTENT_ENH 0x10
126 #define SV_EXTENT_SYNTH 0x4
127 #define SV_EXTENT_MIDI 0x4
128 #define SV_EXTENT_GAME 0x8
129 #define SV_EXTENT_DMA 0x10
130
131 #define RESOURCE_SB 0
132 #define RESOURCE_ENH 1
133 #define RESOURCE_SYNTH 2
134 #define RESOURCE_MIDI 3
135 #define RESOURCE_GAME 4
136 #define RESOURCE_DDMA 7
137
138 #define SV_MIDI_DATA 0
139 #define SV_MIDI_COMMAND 1
140 #define SV_MIDI_STATUS 1
141
142 #define SV_DMA_ADDR0 0
143 #define SV_DMA_ADDR1 1
144 #define SV_DMA_ADDR2 2
145 #define SV_DMA_ADDR3 3
146 #define SV_DMA_COUNT0 4
147 #define SV_DMA_COUNT1 5
148 #define SV_DMA_COUNT2 6
149 #define SV_DMA_MODE 0xb
150 #define SV_DMA_RESET 0xd
151 #define SV_DMA_MASK 0xf
152
153 /*
154 * DONT reset the DMA controllers unless you understand
155 * the reset semantics. Assuming reset semantics as in
156 * the 8237 does not work.
157 */
158
159 #define DMA_MODE_AUTOINIT 0x10
160 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
161 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
162
163 #define SV_CODEC_CONTROL 0
164 #define SV_CODEC_INTMASK 1
165 #define SV_CODEC_STATUS 2
166 #define SV_CODEC_IADDR 4
167 #define SV_CODEC_IDATA 5
168
169 #define SV_CCTRL_RESET 0x80
170 #define SV_CCTRL_INTADRIVE 0x20
171 #define SV_CCTRL_WAVETABLE 0x08
172 #define SV_CCTRL_REVERB 0x04
173 #define SV_CCTRL_ENHANCED 0x01
174
175 #define SV_CINTMASK_DMAA 0x01
176 #define SV_CINTMASK_DMAC 0x04
177 #define SV_CINTMASK_SPECIAL 0x08
178 #define SV_CINTMASK_UPDOWN 0x40
179 #define SV_CINTMASK_MIDI 0x80
180
181 #define SV_CSTAT_DMAA 0x01
182 #define SV_CSTAT_DMAC 0x04
183 #define SV_CSTAT_SPECIAL 0x08
184 #define SV_CSTAT_UPDOWN 0x40
185 #define SV_CSTAT_MIDI 0x80
186
187 #define SV_CIADDR_TRD 0x80
188 #define SV_CIADDR_MCE 0x40
189
190 /* codec indirect registers */
191 #define SV_CIMIX_ADCINL 0x00
192 #define SV_CIMIX_ADCINR 0x01
193 #define SV_CIMIX_AUX1INL 0x02
194 #define SV_CIMIX_AUX1INR 0x03
195 #define SV_CIMIX_CDINL 0x04
196 #define SV_CIMIX_CDINR 0x05
197 #define SV_CIMIX_LINEINL 0x06
198 #define SV_CIMIX_LINEINR 0x07
199 #define SV_CIMIX_MICIN 0x08
200 #define SV_CIMIX_SYNTHINL 0x0A
201 #define SV_CIMIX_SYNTHINR 0x0B
202 #define SV_CIMIX_AUX2INL 0x0C
203 #define SV_CIMIX_AUX2INR 0x0D
204 #define SV_CIMIX_ANALOGINL 0x0E
205 #define SV_CIMIX_ANALOGINR 0x0F
206 #define SV_CIMIX_PCMINL 0x10
207 #define SV_CIMIX_PCMINR 0x11
208
209 #define SV_CIGAMECONTROL 0x09
210 #define SV_CIDATAFMT 0x12
211 #define SV_CIENABLE 0x13
212 #define SV_CIUPDOWN 0x14
213 #define SV_CIREVISION 0x15
214 #define SV_CIADCOUTPUT 0x16
215 #define SV_CIDMAABASECOUNT1 0x18
216 #define SV_CIDMAABASECOUNT0 0x19
217 #define SV_CIDMACBASECOUNT1 0x1c
218 #define SV_CIDMACBASECOUNT0 0x1d
219 #define SV_CIPCMSR0 0x1e
220 #define SV_CIPCMSR1 0x1f
221 #define SV_CISYNTHSR0 0x20
222 #define SV_CISYNTHSR1 0x21
223 #define SV_CIADCCLKSOURCE 0x22
224 #define SV_CIADCALTSR 0x23
225 #define SV_CIADCPLLM 0x24
226 #define SV_CIADCPLLN 0x25
227 #define SV_CISYNTHPLLM 0x26
228 #define SV_CISYNTHPLLN 0x27
229 #define SV_CIUARTCONTROL 0x2a
230 #define SV_CIDRIVECONTROL 0x2b
231 #define SV_CISRSSPACE 0x2c
232 #define SV_CISRSCENTER 0x2d
233 #define SV_CIWAVETABLESRC 0x2e
234 #define SV_CIANALOGPWRDOWN 0x30
235 #define SV_CIDIGITALPWRDOWN 0x31
236
237
238 #define SV_CIMIX_ADCSRC_CD 0x20
239 #define SV_CIMIX_ADCSRC_DAC 0x40
240 #define SV_CIMIX_ADCSRC_AUX2 0x60
241 #define SV_CIMIX_ADCSRC_LINE 0x80
242 #define SV_CIMIX_ADCSRC_AUX1 0xa0
243 #define SV_CIMIX_ADCSRC_MIC 0xc0
244 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
245 #define SV_CIMIX_ADCSRC_MASK 0xe0
246
247 #define SV_CFMT_STEREO 0x01
248 #define SV_CFMT_16BIT 0x02
249 #define SV_CFMT_MASK 0x03
250 #define SV_CFMT_ASHIFT 0
251 #define SV_CFMT_CSHIFT 4
252
253 static const unsigned sample_size[] = { 1, 2, 2, 4 };
254 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
255
256 #define SV_CENABLE_PPE 0x4
257 #define SV_CENABLE_RE 0x2
258 #define SV_CENABLE_PE 0x1
259
260
261 /* MIDI buffer sizes */
262
263 #define MIDIINBUF 256
264 #define MIDIOUTBUF 256
265
266 #define FMODE_MIDI_SHIFT 2
267 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
268 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
269
270 #define FMODE_DMFM 0x10
271
272 #define SND_DEV_DSP16 5
273
274 /* --------------------------------------------------------------------- */
275
276 struct sv_state {
277 /* magic */
278 unsigned int magic;
279
280 /* we keep sv cards in a linked list */
281 struct sv_state *next;
282
283 /* soundcore stuff */
284 int dev_audio;
285 int dev_mixer;
286 int dev_midi;
287 int dev_dmfm;
288
289 /* hardware resources */
290 unsigned long iosb, ioenh, iosynth, iomidi, iogame; /* long for SPARC */
291 unsigned int iodmaa, iodmac, irq;
292
293 /* mixer stuff */
294 struct {
295 unsigned int modcnt;
296 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
297 unsigned short vol[13];
298 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
299 } mix;
300
301 /* wave stuff */
302 unsigned int rateadc, ratedac;
303 unsigned char fmt, enable;
304
305 spinlock_t lock;
306 struct semaphore open_sem;
307 mode_t open_mode;
308 wait_queue_head_t open_wait;
309
310 struct dmabuf {
311 void *rawbuf;
312 unsigned buforder;
313 unsigned numfrag;
314 unsigned fragshift;
315 unsigned hwptr, swptr;
316 unsigned total_bytes;
317 int count;
318 unsigned error; /* over/underrun */
319 wait_queue_head_t wait;
320 /* redundant, but makes calculations easier */
321 unsigned fragsize;
322 unsigned dmasize;
323 unsigned fragsamples;
324 /* OSS stuff */
325 unsigned mapped:1;
326 unsigned ready:1;
327 unsigned endcleared:1;
328 unsigned ossfragshift;
329 int ossmaxfrags;
330 unsigned subdivision;
331 } dma_dac, dma_adc;
332
333 /* midi stuff */
334 struct {
335 unsigned ird, iwr, icnt;
336 unsigned ord, owr, ocnt;
337 wait_queue_head_t iwait;
338 wait_queue_head_t owait;
339 struct timer_list timer;
340 unsigned char ibuf[MIDIINBUF];
341 unsigned char obuf[MIDIOUTBUF];
342 } midi;
343 };
344
345 /* --------------------------------------------------------------------- */
346
347 static struct sv_state *devs = NULL;
348 static unsigned long wavetable_mem = 0;
349
350 /* --------------------------------------------------------------------- */
351
352 extern __inline__ unsigned ld2(unsigned int x)
353 {
354 unsigned r = 0;
355
356 if (x >= 0x10000) {
357 x >>= 16;
358 r += 16;
359 }
360 if (x >= 0x100) {
361 x >>= 8;
362 r += 8;
363 }
364 if (x >= 0x10) {
365 x >>= 4;
366 r += 4;
367 }
368 if (x >= 4) {
369 x >>= 2;
370 r += 2;
371 }
372 if (x >= 2)
373 r++;
374 return r;
375 }
376
377 /*
378 * hweightN: returns the hamming weight (i.e. the number
379 * of bits set) of a N-bit word
380 */
381
382 #ifdef hweight32
383 #undef hweight32
384 #endif
385
386 extern __inline__ unsigned int hweight32(unsigned int w)
387 {
388 unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
389 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
390 res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
391 res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
392 return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
393 }
394
395 /* --------------------------------------------------------------------- */
396
397 /*
398 * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
399 */
400
401 #undef DMABYTEIO
402
403 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
404 {
405 #ifdef DMABYTEIO
406 unsigned io = s->iodmaa, u;
407
408 count--;
409 for (u = 4; u > 0; u--, addr >>= 8, io++)
410 outb(addr & 0xff, io);
411 for (u = 3; u > 0; u--, count >>= 8, io++)
412 outb(count & 0xff, io);
413 #else /* DMABYTEIO */
414 count--;
415 outl(addr, s->iodmaa + SV_DMA_ADDR0);
416 outl(count, s->iodmaa + SV_DMA_COUNT0);
417 #endif /* DMABYTEIO */
418 outb(0x18, s->iodmaa + SV_DMA_MODE);
419 }
420
421 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
422 {
423 #ifdef DMABYTEIO
424 unsigned io = s->iodmac, u;
425
426 count >>= 1;
427 count--;
428 for (u = 4; u > 0; u--, addr >>= 8, io++)
429 outb(addr & 0xff, io);
430 for (u = 3; u > 0; u--, count >>= 8, io++)
431 outb(count & 0xff, io);
432 #else /* DMABYTEIO */
433 count >>= 1;
434 count--;
435 outl(addr, s->iodmac + SV_DMA_ADDR0);
436 outl(count, s->iodmac + SV_DMA_COUNT0);
437 #endif /* DMABYTEIO */
438 outb(0x14, s->iodmac + SV_DMA_MODE);
439 }
440
441 extern __inline__ unsigned get_dmaa(struct sv_state *s)
442 {
443 #ifdef DMABYTEIO
444 unsigned io = s->iodmaa+6, v = 0, u;
445
446 for (u = 3; u > 0; u--, io--) {
447 v <<= 8;
448 v |= inb(io);
449 }
450 return v + 1;
451 #else /* DMABYTEIO */
452 return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
453 #endif /* DMABYTEIO */
454 }
455
456 extern __inline__ unsigned get_dmac(struct sv_state *s)
457 {
458 #ifdef DMABYTEIO
459 unsigned io = s->iodmac+6, v = 0, u;
460
461 for (u = 3; u > 0; u--, io--) {
462 v <<= 8;
463 v |= inb(io);
464 }
465 return (v + 1) << 1;
466 #else /* DMABYTEIO */
467 return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
468 #endif /* DMABYTEIO */
469 }
470
471 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
472 {
473 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
474 udelay(10);
475 outb(data, s->ioenh + SV_CODEC_IDATA);
476 udelay(10);
477 }
478
479 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
480 {
481 unsigned char v;
482
483 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
484 udelay(10);
485 v = inb(s->ioenh + SV_CODEC_IDATA);
486 udelay(10);
487 return v;
488 }
489
490 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
491 {
492 unsigned long flags;
493
494 spin_lock_irqsave(&s->lock, flags);
495 outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
496 if (mask) {
497 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
498 udelay(10);
499 }
500 s->fmt = (s->fmt & mask) | data;
501 outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
502 udelay(10);
503 outb(0, s->ioenh + SV_CODEC_IADDR);
504 spin_unlock_irqrestore(&s->lock, flags);
505 udelay(10);
506 }
507
508 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
509 {
510 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
511 udelay(10);
512 outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
513 udelay(10);
514 }
515
516 #define REFFREQUENCY 24576000
517 #define ADCMULT 512
518 #define FULLRATE 48000
519
520 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
521 {
522 unsigned long flags;
523 unsigned char r, m, n;
524 unsigned xm, xn, xr, xd, metric = ~0U;
525 /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
526
527 if (rate < 625000/ADCMULT)
528 rate = 625000/ADCMULT;
529 if (rate > 150000000/ADCMULT)
530 rate = 150000000/ADCMULT;
531 /* slight violation of specs, needed for continuous sampling rates */
532 for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
533 for (xn = 3; xn < 35; xn++)
534 for (xm = 3; xm < 130; xm++) {
535 xr = REFFREQUENCY/ADCMULT * xm / xn;
536 xd = abs((signed)(xr - rate));
537 if (xd < metric) {
538 metric = xd;
539 m = xm - 2;
540 n = xn - 2;
541 }
542 }
543 reg &= 0x3f;
544 spin_lock_irqsave(&s->lock, flags);
545 outb(reg, s->ioenh + SV_CODEC_IADDR);
546 udelay(10);
547 outb(m, s->ioenh + SV_CODEC_IDATA);
548 udelay(10);
549 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
550 udelay(10);
551 outb(r | n, s->ioenh + SV_CODEC_IDATA);
552 spin_unlock_irqrestore(&s->lock, flags);
553 udelay(10);
554 return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
555 }
556
557 #if 0
558
559 static unsigned getpll(struct sv_state *s, unsigned char reg)
560 {
561 unsigned long flags;
562 unsigned char m, n;
563
564 reg &= 0x3f;
565 spin_lock_irqsave(&s->lock, flags);
566 outb(reg, s->ioenh + SV_CODEC_IADDR);
567 udelay(10);
568 m = inb(s->ioenh + SV_CODEC_IDATA);
569 udelay(10);
570 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
571 udelay(10);
572 n = inb(s->ioenh + SV_CODEC_IDATA);
573 spin_unlock_irqrestore(&s->lock, flags);
574 udelay(10);
575 return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
576 }
577
578 #endif
579
580 static void set_dac_rate(struct sv_state *s, unsigned rate)
581 {
582 unsigned div;
583 unsigned long flags;
584
585 if (rate > 48000)
586 rate = 48000;
587 if (rate < 4000)
588 rate = 4000;
589 div = (rate * 65536 + FULLRATE/2) / FULLRATE;
590 if (div > 65535)
591 div = 65535;
592 spin_lock_irqsave(&s->lock, flags);
593 wrindir(s, SV_CIPCMSR1, div >> 8);
594 wrindir(s, SV_CIPCMSR0, div);
595 spin_unlock_irqrestore(&s->lock, flags);
596 s->ratedac = (div * FULLRATE + 32768) / 65536;
597 }
598
599 static void set_adc_rate(struct sv_state *s, unsigned rate)
600 {
601 unsigned long flags;
602 unsigned rate1, rate2, div;
603
604 if (rate > 48000)
605 rate = 48000;
606 if (rate < 4000)
607 rate = 4000;
608 rate1 = setpll(s, SV_CIADCPLLM, rate);
609 div = (48000 + rate/2) / rate;
610 if (div > 8)
611 div = 8;
612 rate2 = (48000 + div/2) / div;
613 spin_lock_irqsave(&s->lock, flags);
614 wrindir(s, SV_CIADCALTSR, (div-1) << 4);
615 if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
616 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
617 s->rateadc = rate2;
618 } else {
619 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
620 s->rateadc = rate1;
621 }
622 spin_unlock_irqrestore(&s->lock, flags);
623 }
624
625 /* --------------------------------------------------------------------- */
626
627 extern inline void stop_adc(struct sv_state *s)
628 {
629 unsigned long flags;
630
631 spin_lock_irqsave(&s->lock, flags);
632 s->enable &= ~SV_CENABLE_RE;
633 wrindir(s, SV_CIENABLE, s->enable);
634 spin_unlock_irqrestore(&s->lock, flags);
635 }
636
637 extern inline void stop_dac(struct sv_state *s)
638 {
639 unsigned long flags;
640
641 spin_lock_irqsave(&s->lock, flags);
642 s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
643 wrindir(s, SV_CIENABLE, s->enable);
644 spin_unlock_irqrestore(&s->lock, flags);
645 }
646
647 static void start_dac(struct sv_state *s)
648 {
649 unsigned long flags;
650
651 spin_lock_irqsave(&s->lock, flags);
652 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
653 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
654 wrindir(s, SV_CIENABLE, s->enable);
655 }
656 spin_unlock_irqrestore(&s->lock, flags);
657 }
658
659 static void start_adc(struct sv_state *s)
660 {
661 unsigned long flags;
662
663 spin_lock_irqsave(&s->lock, flags);
664 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
665 && s->dma_adc.ready) {
666 s->enable |= SV_CENABLE_RE;
667 wrindir(s, SV_CIENABLE, s->enable);
668 }
669 spin_unlock_irqrestore(&s->lock, flags);
670 }
671
672 /* --------------------------------------------------------------------- */
673
674 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
675 #define DMABUF_MINORDER 1
676
677 static void dealloc_dmabuf(struct dmabuf *db)
678 {
679 unsigned long map, mapend;
680
681 if (db->rawbuf) {
682 /* undo marking the pages as reserved */
683 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
684 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
685 clear_bit(PG_reserved, &mem_map[map].flags);
686 free_pages((unsigned long)db->rawbuf, db->buforder);
687 }
688 db->rawbuf = NULL;
689 db->mapped = db->ready = 0;
690 }
691
692
693 /* DMAA is used for playback, DMAC is used for recording */
694
695 static int prog_dmabuf(struct sv_state *s, unsigned rec)
696 {
697 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
698 unsigned rate = rec ? s->rateadc : s->ratedac;
699 int order;
700 unsigned bytepersec;
701 unsigned bufs;
702 unsigned long map, mapend;
703 unsigned char fmt;
704 unsigned long flags;
705
706 spin_lock_irqsave(&s->lock, flags);
707 fmt = s->fmt;
708 if (rec) {
709 s->enable &= ~SV_CENABLE_RE;
710 fmt >>= SV_CFMT_CSHIFT;
711 } else {
712 s->enable &= ~SV_CENABLE_PE;
713 fmt >>= SV_CFMT_ASHIFT;
714 }
715 wrindir(s, SV_CIENABLE, s->enable);
716 spin_unlock_irqrestore(&s->lock, flags);
717 fmt &= SV_CFMT_MASK;
718 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
719 if (!db->rawbuf) {
720 db->ready = db->mapped = 0;
721 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
722 if ((db->rawbuf = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, order)))
723 break;
724 if (!db->rawbuf)
725 return -ENOMEM;
726 db->buforder = order;
727 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
728 printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
729 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
730 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
731 printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
732 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
733 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
734 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
735 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
736 set_bit(PG_reserved, &mem_map[map].flags);
737 }
738 bytepersec = rate << sample_shift[fmt];
739 bufs = PAGE_SIZE << db->buforder;
740 if (db->ossfragshift) {
741 if ((1000 << db->ossfragshift) < bytepersec)
742 db->fragshift = ld2(bytepersec/1000);
743 else
744 db->fragshift = db->ossfragshift;
745 } else {
746 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
747 if (db->fragshift < 3)
748 db->fragshift = 3;
749 }
750 db->numfrag = bufs >> db->fragshift;
751 while (db->numfrag < 4 && db->fragshift > 3) {
752 db->fragshift--;
753 db->numfrag = bufs >> db->fragshift;
754 }
755 db->fragsize = 1 << db->fragshift;
756 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
757 db->numfrag = db->ossmaxfrags;
758 db->fragsamples = db->fragsize >> sample_shift[fmt];
759 db->dmasize = db->numfrag << db->fragshift;
760 memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
761 spin_lock_irqsave(&s->lock, flags);
762 if (rec) {
763 set_dmac(s, virt_to_bus(db->rawbuf), db->numfrag << db->fragshift);
764 /* program enhanced mode registers */
765 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
766 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
767 } else {
768 set_dmaa(s, virt_to_bus(db->rawbuf), db->numfrag << db->fragshift);
769 /* program enhanced mode registers */
770 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
771 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
772 }
773 spin_unlock_irqrestore(&s->lock, flags);
774 db->ready = 1;
775 return 0;
776 }
777
778 extern __inline__ void clear_advance(struct sv_state *s)
779 {
780 unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
781 unsigned char *buf = s->dma_dac.rawbuf;
782 unsigned bsize = s->dma_dac.dmasize;
783 unsigned bptr = s->dma_dac.swptr;
784 unsigned len = s->dma_dac.fragsize;
785
786 if (bptr + len > bsize) {
787 unsigned x = bsize - bptr;
788 memset(buf + bptr, c, x);
789 bptr = 0;
790 len -= x;
791 }
792 memset(buf + bptr, c, len);
793 }
794
795 /* call with spinlock held! */
796 static void sv_update_ptr(struct sv_state *s)
797 {
798 unsigned hwptr;
799 int diff;
800
801 /* update ADC pointer */
802 if (s->dma_adc.ready) {
803 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
804 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
805 s->dma_adc.hwptr = hwptr;
806 s->dma_adc.total_bytes += diff;
807 s->dma_adc.count += diff;
808 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
809 wake_up(&s->dma_adc.wait);
810 if (!s->dma_adc.mapped) {
811 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
812 s->enable &= ~SV_CENABLE_RE;
813 wrindir(s, SV_CIENABLE, s->enable);
814 s->dma_adc.error++;
815 }
816 }
817 }
818 /* update DAC pointer */
819 if (s->dma_dac.ready) {
820 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
821 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
822 s->dma_dac.hwptr = hwptr;
823 s->dma_dac.total_bytes += diff;
824 if (s->dma_dac.mapped) {
825 s->dma_dac.count += diff;
826 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
827 wake_up(&s->dma_dac.wait);
828 } else {
829 s->dma_dac.count -= diff;
830 if (s->dma_dac.count <= 0) {
831 s->enable &= ~SV_CENABLE_PE;
832 wrindir(s, SV_CIENABLE, s->enable);
833 s->dma_dac.error++;
834 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
835 clear_advance(s);
836 s->dma_dac.endcleared = 1;
837 }
838 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
839 wake_up(&s->dma_dac.wait);
840 }
841 }
842 }
843
844 /* hold spinlock for the following! */
845 static void sv_handle_midi(struct sv_state *s)
846 {
847 unsigned char ch;
848 int wake;
849
850 wake = 0;
851 while (!(inb(s->iomidi+1) & 0x80)) {
852 ch = inb(s->iomidi);
853 if (s->midi.icnt < MIDIINBUF) {
854 s->midi.ibuf[s->midi.iwr] = ch;
855 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
856 s->midi.icnt++;
857 }
858 wake = 1;
859 }
860 if (wake)
861 wake_up(&s->midi.iwait);
862 wake = 0;
863 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
864 outb(s->midi.obuf[s->midi.ord], s->iomidi);
865 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
866 s->midi.ocnt--;
867 if (s->midi.ocnt < MIDIOUTBUF-16)
868 wake = 1;
869 }
870 if (wake)
871 wake_up(&s->midi.owait);
872 }
873
874 static void sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
875 {
876 struct sv_state *s = (struct sv_state *)dev_id;
877 unsigned int intsrc;
878
879 /* fastpath out, to ease interrupt sharing */
880 intsrc = inb(s->ioenh + SV_CODEC_STATUS);
881 if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
882 return;
883 spin_lock(&s->lock);
884 sv_update_ptr(s);
885 sv_handle_midi(s);
886 spin_unlock(&s->lock);
887 }
888
889 static void sv_midi_timer(unsigned long data)
890 {
891 struct sv_state *s = (struct sv_state *)data;
892 unsigned long flags;
893
894 spin_lock_irqsave(&s->lock, flags);
895 sv_handle_midi(s);
896 spin_unlock_irqrestore(&s->lock, flags);
897 s->midi.timer.expires = jiffies+1;
898 add_timer(&s->midi.timer);
899 }
900
901 /* --------------------------------------------------------------------- */
902
903 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
904
905 #define VALIDATE_STATE(s) \
906 ({ \
907 if (!(s) || (s)->magic != SV_MAGIC) { \
908 printk(invalid_magic); \
909 return -ENXIO; \
910 } \
911 })
912
913 /* --------------------------------------------------------------------- */
914
915 #define MT_4 1
916 #define MT_5MUTE 2
917 #define MT_4MUTEMONO 3
918 #define MT_6MUTE 4
919
920 static const struct {
921 unsigned left:5;
922 unsigned right:5;
923 unsigned type:3;
924 unsigned rec:3;
925 } mixtable[SOUND_MIXER_NRDEVICES] = {
926 [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL, SV_CIMIX_ADCINR, MT_4, 0 },
927 [SOUND_MIXER_LINE1] = { SV_CIMIX_AUX1INL, SV_CIMIX_AUX1INR, MT_5MUTE, 5 },
928 [SOUND_MIXER_CD] = { SV_CIMIX_CDINL, SV_CIMIX_CDINR, MT_5MUTE, 1 },
929 [SOUND_MIXER_LINE] = { SV_CIMIX_LINEINL, SV_CIMIX_LINEINR, MT_5MUTE, 4 },
930 [SOUND_MIXER_MIC] = { SV_CIMIX_MICIN, SV_CIMIX_ADCINL, MT_4MUTEMONO, 6 },
931 [SOUND_MIXER_SYNTH] = { SV_CIMIX_SYNTHINL, SV_CIMIX_SYNTHINR, MT_5MUTE, 2 },
932 [SOUND_MIXER_LINE2] = { SV_CIMIX_AUX2INL, SV_CIMIX_AUX2INR, MT_5MUTE, 3 },
933 [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE, 7 },
934 [SOUND_MIXER_PCM] = { SV_CIMIX_PCMINL, SV_CIMIX_PCMINR, MT_6MUTE, 0 }
935 };
936
937 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
938
939 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
940 {
941 unsigned long flags;
942 unsigned char l, r, rl, rr;
943
944 spin_lock_irqsave(&s->lock, flags);
945 l = rdindir(s, mixtable[i].left);
946 r = rdindir(s, mixtable[i].right);
947 spin_unlock_irqrestore(&s->lock, flags);
948 switch (mixtable[i].type) {
949 case MT_4:
950 r &= 0xf;
951 l &= 0xf;
952 rl = 10 + 6 * (l & 15);
953 rr = 10 + 6 * (r & 15);
954 break;
955
956 case MT_4MUTEMONO:
957 rl = 55 - 3 * (l & 15);
958 if (r & 0x10)
959 rl += 45;
960 rr = rl;
961 r = l;
962 break;
963
964 case MT_5MUTE:
965 default:
966 rl = 100 - 3 * (l & 31);
967 rr = 100 - 3 * (r & 31);
968 break;
969
970 case MT_6MUTE:
971 rl = 100 - 3 * (l & 63) / 2;
972 rr = 100 - 3 * (r & 63) / 2;
973 break;
974 }
975 if (l & 0x80)
976 rl = 0;
977 if (r & 0x80)
978 rr = 0;
979 return put_user((rr << 8) | rl, arg);
980 }
981
982 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
983
984 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
985 {
986 [SOUND_MIXER_RECLEV] = 1,
987 [SOUND_MIXER_LINE1] = 2,
988 [SOUND_MIXER_CD] = 3,
989 [SOUND_MIXER_LINE] = 4,
990 [SOUND_MIXER_MIC] = 5,
991 [SOUND_MIXER_SYNTH] = 6,
992 [SOUND_MIXER_LINE2] = 7,
993 [SOUND_MIXER_VOLUME] = 8,
994 [SOUND_MIXER_PCM] = 9
995 };
996
997 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
998
999 static unsigned mixer_recmask(struct sv_state *s)
1000 {
1001 unsigned long flags;
1002 int i, j;
1003
1004 spin_lock_irqsave(&s->lock, flags);
1005 j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
1006 spin_unlock_irqrestore(&s->lock, flags);
1007 j &= 7;
1008 for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
1009 return 1 << i;
1010 }
1011
1012 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
1013 {
1014 unsigned long flags;
1015 int i, val;
1016 unsigned char l, r, rl, rr;
1017
1018 VALIDATE_STATE(s);
1019 if (cmd == SOUND_MIXER_INFO) {
1020 mixer_info info;
1021 strncpy(info.id, "SonicVibes", sizeof(info.id));
1022 strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
1023 info.modify_counter = s->mix.modcnt;
1024 if (copy_to_user((void *)arg, &info, sizeof(info)))
1025 return -EFAULT;
1026 return 0;
1027 }
1028 if (cmd == SOUND_OLD_MIXER_INFO) {
1029 _old_mixer_info info;
1030 strncpy(info.id, "SonicVibes", sizeof(info.id));
1031 strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
1032 if (copy_to_user((void *)arg, &info, sizeof(info)))
1033 return -EFAULT;
1034 return 0;
1035 }
1036 if (cmd == OSS_GETVERSION)
1037 return put_user(SOUND_VERSION, (int *)arg);
1038 if (cmd == SOUND_MIXER_PRIVATE1) { /* SRS settings */
1039 get_user_ret(val, (int *)arg, -EFAULT);
1040 spin_lock_irqsave(&s->lock, flags);
1041 if (val & 1) {
1042 if (val & 2) {
1043 l = 4 - ((val >> 2) & 7);
1044 if (l & ~3)
1045 l = 4;
1046 r = 4 - ((val >> 5) & 7);
1047 if (r & ~3)
1048 r = 4;
1049 wrindir(s, SV_CISRSSPACE, l);
1050 wrindir(s, SV_CISRSCENTER, r);
1051 } else
1052 wrindir(s, SV_CISRSSPACE, 0x80);
1053 }
1054 l = rdindir(s, SV_CISRSSPACE);
1055 r = rdindir(s, SV_CISRSCENTER);
1056 spin_unlock_irqrestore(&s->lock, flags);
1057 if (l & 0x80)
1058 return put_user(0, (int *)arg);
1059 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, (int *)arg);
1060 }
1061 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1062 return -EINVAL;
1063 if (_IOC_DIR(cmd) == _IOC_READ) {
1064 switch (_IOC_NR(cmd)) {
1065 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1066 return put_user(mixer_recmask(s), (int *)arg);
1067
1068 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1069 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1070 if (mixtable[i].type)
1071 val |= 1 << i;
1072 return put_user(val, (int *)arg);
1073
1074 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1075 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1076 if (mixtable[i].rec)
1077 val |= 1 << i;
1078 return put_user(val, (int *)arg);
1079
1080 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1081 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1082 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1083 val |= 1 << i;
1084 return put_user(val, (int *)arg);
1085
1086 case SOUND_MIXER_CAPS:
1087 return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
1088
1089 default:
1090 i = _IOC_NR(cmd);
1091 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1092 return -EINVAL;
1093 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1094 return return_mixval(s, i, (int *)arg);
1095 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1096 if (!volidx[i])
1097 return -EINVAL;
1098 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1099 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1100 }
1101 }
1102 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1103 return -EINVAL;
1104 s->mix.modcnt++;
1105 switch (_IOC_NR(cmd)) {
1106 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1107 get_user_ret(val, (int *)arg, -EFAULT);
1108 i = hweight32(val);
1109 if (i == 0)
1110 return 0; /*val = mixer_recmask(s);*/
1111 else if (i > 1)
1112 val &= ~mixer_recmask(s);
1113 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1114 if (!(val & (1 << i)))
1115 continue;
1116 if (mixtable[i].rec)
1117 break;
1118 }
1119 if (!mixtable[i].rec)
1120 return 0;
1121 spin_lock_irqsave(&s->lock, flags);
1122 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1123 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1124 spin_unlock_irqrestore(&s->lock, flags);
1125 return 0;
1126
1127 default:
1128 i = _IOC_NR(cmd);
1129 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1130 return -EINVAL;
1131 get_user_ret(val, (int *)arg, -EFAULT);
1132 l = val & 0xff;
1133 r = (val >> 8) & 0xff;
1134 if (mixtable[i].type == MT_4MUTEMONO)
1135 l = (r + l) / 2;
1136 if (l > 100)
1137 l = 100;
1138 if (r > 100)
1139 r = 100;
1140 spin_lock_irqsave(&s->lock, flags);
1141 switch (mixtable[i].type) {
1142 case MT_4:
1143 if (l >= 10)
1144 l -= 10;
1145 if (r >= 10)
1146 r -= 10;
1147 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1148 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1149 break;
1150
1151 case MT_4MUTEMONO:
1152 rr = 0;
1153 if (l < 10)
1154 rl = 0x80;
1155 else {
1156 if (l >= 55) {
1157 rr = 0x10;
1158 l -= 45;
1159 }
1160 rl = (55 - l) / 3;
1161 }
1162 wrindir(s, mixtable[i].left, rl);
1163 frobindir(s, mixtable[i].right, ~0x10, rr);
1164 break;
1165
1166 case MT_5MUTE:
1167 if (l < 7)
1168 rl = 0x80;
1169 else
1170 rl = (100 - l) / 3;
1171 if (r < 7)
1172 rr = 0x80;
1173 else
1174 rr = (100 - r) / 3;
1175 wrindir(s, mixtable[i].left, rl);
1176 wrindir(s, mixtable[i].right, rr);
1177 break;
1178
1179 case MT_6MUTE:
1180 if (l < 6)
1181 rl = 0x80;
1182 else
1183 rl = (100 - l) * 2 / 3;
1184 if (r < 6)
1185 rr = 0x80;
1186 else
1187 rr = (100 - r) * 2 / 3;
1188 wrindir(s, mixtable[i].left, rl);
1189 wrindir(s, mixtable[i].right, rr);
1190 break;
1191 }
1192 spin_unlock_irqrestore(&s->lock, flags);
1193 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1194 return return_mixval(s, i, (int *)arg);
1195 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1196 if (!volidx[i])
1197 return -EINVAL;
1198 s->mix.vol[volidx[i]-1] = val;
1199 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1200 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1201 }
1202 }
1203
1204 /* --------------------------------------------------------------------- */
1205
1206 static loff_t sv_llseek(struct file *file, loff_t offset, int origin)
1207 {
1208 return -ESPIPE;
1209 }
1210
1211 /* --------------------------------------------------------------------- */
1212
1213 static int sv_open_mixdev(struct inode *inode, struct file *file)
1214 {
1215 int minor = MINOR(inode->i_rdev);
1216 struct sv_state *s = devs;
1217
1218 while (s && s->dev_mixer != minor)
1219 s = s->next;
1220 if (!s)
1221 return -ENODEV;
1222 VALIDATE_STATE(s);
1223 file->private_data = s;
1224 MOD_INC_USE_COUNT;
1225 return 0;
1226 }
1227
1228 static int sv_release_mixdev(struct inode *inode, struct file *file)
1229 {
1230 struct sv_state *s = (struct sv_state *)file->private_data;
1231
1232 VALIDATE_STATE(s);
1233 MOD_DEC_USE_COUNT;
1234 return 0;
1235 }
1236
1237 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1238 {
1239 return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1240 }
1241
1242 static /*const*/ struct file_operations sv_mixer_fops = {
1243 &sv_llseek,
1244 NULL, /* read */
1245 NULL, /* write */
1246 NULL, /* readdir */
1247 NULL, /* poll */
1248 &sv_ioctl_mixdev,
1249 NULL, /* mmap */
1250 &sv_open_mixdev,
1251 NULL, /* flush */
1252 &sv_release_mixdev,
1253 NULL, /* fsync */
1254 NULL, /* fasync */
1255 NULL, /* check_media_change */
1256 NULL, /* revalidate */
1257 NULL, /* lock */
1258 };
1259
1260 /* --------------------------------------------------------------------- */
1261
1262 static int drain_dac(struct sv_state *s, int nonblock)
1263 {
1264 DECLARE_WAITQUEUE(wait, current);
1265 unsigned long flags;
1266 int count, tmo;
1267
1268 if (s->dma_dac.mapped || !s->dma_dac.ready)
1269 return 0;
1270 __set_current_state(TASK_INTERRUPTIBLE);
1271 add_wait_queue(&s->dma_dac.wait, &wait);
1272 for (;;) {
1273 spin_lock_irqsave(&s->lock, flags);
1274 count = s->dma_dac.count;
1275 spin_unlock_irqrestore(&s->lock, flags);
1276 if (count <= 0)
1277 break;
1278 if (signal_pending(current))
1279 break;
1280 if (nonblock) {
1281 remove_wait_queue(&s->dma_dac.wait, &wait);
1282 set_current_state(TASK_RUNNING);
1283 return -EBUSY;
1284 }
1285 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1286 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1287 if (!schedule_timeout(tmo + 1))
1288 printk(KERN_DEBUG "sv: dma timed out??\n");
1289 }
1290 remove_wait_queue(&s->dma_dac.wait, &wait);
1291 set_current_state(TASK_RUNNING);
1292 if (signal_pending(current))
1293 return -ERESTARTSYS;
1294 return 0;
1295 }
1296
1297 /* --------------------------------------------------------------------- */
1298
1299 static ssize_t sv_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1300 {
1301 struct sv_state *s = (struct sv_state *)file->private_data;
1302 ssize_t ret;
1303 unsigned long flags;
1304 unsigned swptr;
1305 int cnt;
1306
1307 VALIDATE_STATE(s);
1308 if (ppos != &file->f_pos)
1309 return -ESPIPE;
1310 if (s->dma_adc.mapped)
1311 return -ENXIO;
1312 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1313 return ret;
1314 if (!access_ok(VERIFY_WRITE, buffer, count))
1315 return -EFAULT;
1316 ret = 0;
1317 #if 0
1318 spin_lock_irqsave(&s->lock, flags);
1319 sv_update_ptr(s);
1320 spin_unlock_irqrestore(&s->lock, flags);
1321 #endif
1322 while (count > 0) {
1323 spin_lock_irqsave(&s->lock, flags);
1324 swptr = s->dma_adc.swptr;
1325 cnt = s->dma_adc.dmasize-swptr;
1326 if (s->dma_adc.count < cnt)
1327 cnt = s->dma_adc.count;
1328 spin_unlock_irqrestore(&s->lock, flags);
1329 if (cnt > count)
1330 cnt = count;
1331 if (cnt <= 0) {
1332 start_adc(s);
1333 if (file->f_flags & O_NONBLOCK)
1334 return ret ? ret : -EAGAIN;
1335 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
1336 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1337 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1338 s->dma_adc.hwptr, s->dma_adc.swptr);
1339 stop_adc(s);
1340 spin_lock_irqsave(&s->lock, flags);
1341 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1342 /* program enhanced mode registers */
1343 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1344 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1345 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1346 spin_unlock_irqrestore(&s->lock, flags);
1347 }
1348 if (signal_pending(current))
1349 return ret ? ret : -ERESTARTSYS;
1350 continue;
1351 }
1352 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1353 return ret ? ret : -EFAULT;
1354 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1355 spin_lock_irqsave(&s->lock, flags);
1356 s->dma_adc.swptr = swptr;
1357 s->dma_adc.count -= cnt;
1358 spin_unlock_irqrestore(&s->lock, flags);
1359 count -= cnt;
1360 buffer += cnt;
1361 ret += cnt;
1362 start_adc(s);
1363 }
1364 return ret;
1365 }
1366
1367 static ssize_t sv_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1368 {
1369 struct sv_state *s = (struct sv_state *)file->private_data;
1370 ssize_t ret;
1371 unsigned long flags;
1372 unsigned swptr;
1373 int cnt;
1374
1375 VALIDATE_STATE(s);
1376 if (ppos != &file->f_pos)
1377 return -ESPIPE;
1378 if (s->dma_dac.mapped)
1379 return -ENXIO;
1380 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1381 return ret;
1382 if (!access_ok(VERIFY_READ, buffer, count))
1383 return -EFAULT;
1384 ret = 0;
1385 #if 0
1386 spin_lock_irqsave(&s->lock, flags);
1387 sv_update_ptr(s);
1388 spin_unlock_irqrestore(&s->lock, flags);
1389 #endif
1390 while (count > 0) {
1391 spin_lock_irqsave(&s->lock, flags);
1392 if (s->dma_dac.count < 0) {
1393 s->dma_dac.count = 0;
1394 s->dma_dac.swptr = s->dma_dac.hwptr;
1395 }
1396 swptr = s->dma_dac.swptr;
1397 cnt = s->dma_dac.dmasize-swptr;
1398 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1399 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1400 spin_unlock_irqrestore(&s->lock, flags);
1401 if (cnt > count)
1402 cnt = count;
1403 if (cnt <= 0) {
1404 start_dac(s);
1405 if (file->f_flags & O_NONBLOCK)
1406 return ret ? ret : -EAGAIN;
1407 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
1408 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1409 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1410 s->dma_dac.hwptr, s->dma_dac.swptr);
1411 stop_dac(s);
1412 spin_lock_irqsave(&s->lock, flags);
1413 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1414 /* program enhanced mode registers */
1415 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1416 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1417 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1418 spin_unlock_irqrestore(&s->lock, flags);
1419 }
1420 if (signal_pending(current))
1421 return ret ? ret : -ERESTARTSYS;
1422 continue;
1423 }
1424 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1425 return ret ? ret : -EFAULT;
1426 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1427 spin_lock_irqsave(&s->lock, flags);
1428 s->dma_dac.swptr = swptr;
1429 s->dma_dac.count += cnt;
1430 s->dma_dac.endcleared = 0;
1431 spin_unlock_irqrestore(&s->lock, flags);
1432 count -= cnt;
1433 buffer += cnt;
1434 ret += cnt;
1435 start_dac(s);
1436 }
1437 return ret;
1438 }
1439
1440 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1441 {
1442 struct sv_state *s = (struct sv_state *)file->private_data;
1443 unsigned long flags;
1444 unsigned int mask = 0;
1445
1446 VALIDATE_STATE(s);
1447 if (file->f_mode & FMODE_WRITE)
1448 poll_wait(file, &s->dma_dac.wait, wait);
1449 if (file->f_mode & FMODE_READ)
1450 poll_wait(file, &s->dma_adc.wait, wait);
1451 spin_lock_irqsave(&s->lock, flags);
1452 sv_update_ptr(s);
1453 if (file->f_mode & FMODE_READ) {
1454 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1455 mask |= POLLIN | POLLRDNORM;
1456 }
1457 if (file->f_mode & FMODE_WRITE) {
1458 if (s->dma_dac.mapped) {
1459 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1460 mask |= POLLOUT | POLLWRNORM;
1461 } else {
1462 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1463 mask |= POLLOUT | POLLWRNORM;
1464 }
1465 }
1466 spin_unlock_irqrestore(&s->lock, flags);
1467 return mask;
1468 }
1469
1470 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1471 {
1472 struct sv_state *s = (struct sv_state *)file->private_data;
1473 struct dmabuf *db;
1474 int ret;
1475 unsigned long size;
1476
1477 VALIDATE_STATE(s);
1478 if (vma->vm_flags & VM_WRITE) {
1479 if ((ret = prog_dmabuf(s, 1)) != 0)
1480 return ret;
1481 db = &s->dma_dac;
1482 } else if (vma->vm_flags & VM_READ) {
1483 if ((ret = prog_dmabuf(s, 0)) != 0)
1484 return ret;
1485 db = &s->dma_adc;
1486 } else
1487 return -EINVAL;
1488 if (vma->vm_offset != 0)
1489 return -EINVAL;
1490 size = vma->vm_end - vma->vm_start;
1491 if (size > (PAGE_SIZE << db->buforder))
1492 return -EINVAL;
1493 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1494 return -EAGAIN;
1495 db->mapped = 1;
1496 return 0;
1497 }
1498
1499 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1500 {
1501 struct sv_state *s = (struct sv_state *)file->private_data;
1502 unsigned long flags;
1503 audio_buf_info abinfo;
1504 count_info cinfo;
1505 int val, mapped, ret;
1506 unsigned char fmtm, fmtd;
1507
1508 VALIDATE_STATE(s);
1509 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1510 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1511 switch (cmd) {
1512 case OSS_GETVERSION:
1513 return put_user(SOUND_VERSION, (int *)arg);
1514
1515 case SNDCTL_DSP_SYNC:
1516 if (file->f_mode & FMODE_WRITE)
1517 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1518 return 0;
1519
1520 case SNDCTL_DSP_SETDUPLEX:
1521 return 0;
1522
1523 case SNDCTL_DSP_GETCAPS:
1524 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1525
1526 case SNDCTL_DSP_RESET:
1527 if (file->f_mode & FMODE_WRITE) {
1528 stop_dac(s);
1529 synchronize_irq();
1530 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1531 }
1532 if (file->f_mode & FMODE_READ) {
1533 stop_adc(s);
1534 synchronize_irq();
1535 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1536 }
1537 return 0;
1538
1539 case SNDCTL_DSP_SPEED:
1540 get_user_ret(val, (int *)arg, -EFAULT);
1541 if (val >= 0) {
1542 if (file->f_mode & FMODE_READ) {
1543 stop_adc(s);
1544 s->dma_adc.ready = 0;
1545 set_adc_rate(s, val);
1546 }
1547 if (file->f_mode & FMODE_WRITE) {
1548 stop_dac(s);
1549 s->dma_dac.ready = 0;
1550 set_dac_rate(s, val);
1551 }
1552 }
1553 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1554
1555 case SNDCTL_DSP_STEREO:
1556 get_user_ret(val, (int *)arg, -EFAULT);
1557 fmtd = 0;
1558 fmtm = ~0;
1559 if (file->f_mode & FMODE_READ) {
1560 stop_adc(s);
1561 s->dma_adc.ready = 0;
1562 if (val)
1563 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1564 else
1565 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1566 }
1567 if (file->f_mode & FMODE_WRITE) {
1568 stop_dac(s);
1569 s->dma_dac.ready = 0;
1570 if (val)
1571 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1572 else
1573 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1574 }
1575 set_fmt(s, fmtm, fmtd);
1576 return 0;
1577
1578 case SNDCTL_DSP_CHANNELS:
1579 get_user_ret(val, (int *)arg, -EFAULT);
1580 if (val != 0) {
1581 fmtd = 0;
1582 fmtm = ~0;
1583 if (file->f_mode & FMODE_READ) {
1584 stop_adc(s);
1585 s->dma_adc.ready = 0;
1586 if (val >= 2)
1587 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1588 else
1589 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1590 }
1591 if (file->f_mode & FMODE_WRITE) {
1592 stop_dac(s);
1593 s->dma_dac.ready = 0;
1594 if (val >= 2)
1595 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1596 else
1597 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1598 }
1599 set_fmt(s, fmtm, fmtd);
1600 }
1601 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1602 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1603
1604 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1605 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1606
1607 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1608 get_user_ret(val, (int *)arg, -EFAULT);
1609 if (val != AFMT_QUERY) {
1610 fmtd = 0;
1611 fmtm = ~0;
1612 if (file->f_mode & FMODE_READ) {
1613 stop_adc(s);
1614 s->dma_adc.ready = 0;
1615 if (val == AFMT_S16_LE)
1616 fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1617 else
1618 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1619 }
1620 if (file->f_mode & FMODE_WRITE) {
1621 stop_dac(s);
1622 s->dma_dac.ready = 0;
1623 if (val == AFMT_S16_LE)
1624 fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1625 else
1626 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1627 }
1628 set_fmt(s, fmtm, fmtd);
1629 }
1630 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1631 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1632
1633 case SNDCTL_DSP_POST:
1634 return 0;
1635
1636 case SNDCTL_DSP_GETTRIGGER:
1637 val = 0;
1638 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1639 val |= PCM_ENABLE_INPUT;
1640 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1641 val |= PCM_ENABLE_OUTPUT;
1642 return put_user(val, (int *)arg);
1643
1644 case SNDCTL_DSP_SETTRIGGER:
1645 get_user_ret(val, (int *)arg, -EFAULT);
1646 if (file->f_mode & FMODE_READ) {
1647 if (val & PCM_ENABLE_INPUT) {
1648 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1649 return ret;
1650 start_adc(s);
1651 } else
1652 stop_adc(s);
1653 }
1654 if (file->f_mode & FMODE_WRITE) {
1655 if (val & PCM_ENABLE_OUTPUT) {
1656 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1657 return ret;
1658 start_dac(s);
1659 } else
1660 stop_dac(s);
1661 }
1662 return 0;
1663
1664 case SNDCTL_DSP_GETOSPACE:
1665 if (!(file->f_mode & FMODE_WRITE))
1666 return -EINVAL;
1667 if (!(s->enable & SV_CENABLE_PE) && (val = prog_dmabuf(s, 0)) != 0)
1668 return val;
1669 spin_lock_irqsave(&s->lock, flags);
1670 sv_update_ptr(s);
1671 abinfo.fragsize = s->dma_dac.fragsize;
1672 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1673 abinfo.fragstotal = s->dma_dac.numfrag;
1674 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1675 spin_unlock_irqrestore(&s->lock, flags);
1676 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1677
1678 case SNDCTL_DSP_GETISPACE:
1679 if (!(file->f_mode & FMODE_READ))
1680 return -EINVAL;
1681 if (!(s->enable & SV_CENABLE_RE) && (val = prog_dmabuf(s, 1)) != 0)
1682 return val;
1683 spin_lock_irqsave(&s->lock, flags);
1684 sv_update_ptr(s);
1685 abinfo.fragsize = s->dma_adc.fragsize;
1686 abinfo.bytes = s->dma_adc.count;
1687 abinfo.fragstotal = s->dma_adc.numfrag;
1688 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1689 spin_unlock_irqrestore(&s->lock, flags);
1690 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1691
1692 case SNDCTL_DSP_NONBLOCK:
1693 file->f_flags |= O_NONBLOCK;
1694 return 0;
1695
1696 case SNDCTL_DSP_GETODELAY:
1697 if (!(file->f_mode & FMODE_WRITE))
1698 return -EINVAL;
1699 spin_lock_irqsave(&s->lock, flags);
1700 sv_update_ptr(s);
1701 val = s->dma_dac.count;
1702 spin_unlock_irqrestore(&s->lock, flags);
1703 return put_user(val, (int *)arg);
1704
1705 case SNDCTL_DSP_GETIPTR:
1706 if (!(file->f_mode & FMODE_READ))
1707 return -EINVAL;
1708 spin_lock_irqsave(&s->lock, flags);
1709 sv_update_ptr(s);
1710 cinfo.bytes = s->dma_adc.total_bytes;
1711 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1712 cinfo.ptr = s->dma_adc.hwptr;
1713 if (s->dma_adc.mapped)
1714 s->dma_adc.count &= s->dma_adc.fragsize-1;
1715 spin_unlock_irqrestore(&s->lock, flags);
1716 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1717
1718 case SNDCTL_DSP_GETOPTR:
1719 if (!(file->f_mode & FMODE_WRITE))
1720 return -EINVAL;
1721 spin_lock_irqsave(&s->lock, flags);
1722 sv_update_ptr(s);
1723 cinfo.bytes = s->dma_dac.total_bytes;
1724 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1725 cinfo.ptr = s->dma_dac.hwptr;
1726 if (s->dma_dac.mapped)
1727 s->dma_dac.count &= s->dma_dac.fragsize-1;
1728 spin_unlock_irqrestore(&s->lock, flags);
1729 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1730
1731 case SNDCTL_DSP_GETBLKSIZE:
1732 if (file->f_mode & FMODE_WRITE) {
1733 if ((val = prog_dmabuf(s, 0)))
1734 return val;
1735 return put_user(s->dma_dac.fragsize, (int *)arg);
1736 }
1737 if ((val = prog_dmabuf(s, 1)))
1738 return val;
1739 return put_user(s->dma_adc.fragsize, (int *)arg);
1740
1741 case SNDCTL_DSP_SETFRAGMENT:
1742 get_user_ret(val, (int *)arg, -EFAULT);
1743 if (file->f_mode & FMODE_READ) {
1744 s->dma_adc.ossfragshift = val & 0xffff;
1745 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1746 if (s->dma_adc.ossfragshift < 4)
1747 s->dma_adc.ossfragshift = 4;
1748 if (s->dma_adc.ossfragshift > 15)
1749 s->dma_adc.ossfragshift = 15;
1750 if (s->dma_adc.ossmaxfrags < 4)
1751 s->dma_adc.ossmaxfrags = 4;
1752 }
1753 if (file->f_mode & FMODE_WRITE) {
1754 s->dma_dac.ossfragshift = val & 0xffff;
1755 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1756 if (s->dma_dac.ossfragshift < 4)
1757 s->dma_dac.ossfragshift = 4;
1758 if (s->dma_dac.ossfragshift > 15)
1759 s->dma_dac.ossfragshift = 15;
1760 if (s->dma_dac.ossmaxfrags < 4)
1761 s->dma_dac.ossmaxfrags = 4;
1762 }
1763 return 0;
1764
1765 case SNDCTL_DSP_SUBDIVIDE:
1766 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1767 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1768 return -EINVAL;
1769 get_user_ret(val, (int *)arg, -EFAULT);
1770 if (val != 1 && val != 2 && val != 4)
1771 return -EINVAL;
1772 if (file->f_mode & FMODE_READ)
1773 s->dma_adc.subdivision = val;
1774 if (file->f_mode & FMODE_WRITE)
1775 s->dma_dac.subdivision = val;
1776 return 0;
1777
1778 case SOUND_PCM_READ_RATE:
1779 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1780
1781 case SOUND_PCM_READ_CHANNELS:
1782 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1783 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1784
1785 case SOUND_PCM_READ_BITS:
1786 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1787 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, (int *)arg);
1788
1789 case SOUND_PCM_WRITE_FILTER:
1790 case SNDCTL_DSP_SETSYNCRO:
1791 case SOUND_PCM_READ_FILTER:
1792 return -EINVAL;
1793
1794 }
1795 return mixer_ioctl(s, cmd, arg);
1796 }
1797
1798 static int sv_open(struct inode *inode, struct file *file)
1799 {
1800 int minor = MINOR(inode->i_rdev);
1801 struct sv_state *s = devs;
1802 unsigned char fmtm = ~0, fmts = 0;
1803
1804 while (s && ((s->dev_audio ^ minor) & ~0xf))
1805 s = s->next;
1806 if (!s)
1807 return -ENODEV;
1808 VALIDATE_STATE(s);
1809 file->private_data = s;
1810 /* wait for device to become free */
1811 down(&s->open_sem);
1812 while (s->open_mode & file->f_mode) {
1813 if (file->f_flags & O_NONBLOCK) {
1814 up(&s->open_sem);
1815 return -EBUSY;
1816 }
1817 up(&s->open_sem);
1818 interruptible_sleep_on(&s->open_wait);
1819 if (signal_pending(current))
1820 return -ERESTARTSYS;
1821 down(&s->open_sem);
1822 }
1823 if (file->f_mode & FMODE_READ) {
1824 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1825 if ((minor & 0xf) == SND_DEV_DSP16)
1826 fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1827 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1828 set_adc_rate(s, 8000);
1829 }
1830 if (file->f_mode & FMODE_WRITE) {
1831 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1832 if ((minor & 0xf) == SND_DEV_DSP16)
1833 fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1834 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1835 set_dac_rate(s, 8000);
1836 }
1837 set_fmt(s, fmtm, fmts);
1838 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1839 up(&s->open_sem);
1840 MOD_INC_USE_COUNT;
1841 return 0;
1842 }
1843
1844 static int sv_release(struct inode *inode, struct file *file)
1845 {
1846 struct sv_state *s = (struct sv_state *)file->private_data;
1847
1848 VALIDATE_STATE(s);
1849 if (file->f_mode & FMODE_WRITE)
1850 drain_dac(s, file->f_flags & O_NONBLOCK);
1851 down(&s->open_sem);
1852 if (file->f_mode & FMODE_WRITE) {
1853 stop_dac(s);
1854 dealloc_dmabuf(&s->dma_dac);
1855 }
1856 if (file->f_mode & FMODE_READ) {
1857 stop_adc(s);
1858 dealloc_dmabuf(&s->dma_adc);
1859 }
1860 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1861 up(&s->open_sem);
1862 wake_up(&s->open_wait);
1863 MOD_DEC_USE_COUNT;
1864 return 0;
1865 }
1866
1867 static /*const*/ struct file_operations sv_audio_fops = {
1868 &sv_llseek,
1869 &sv_read,
1870 &sv_write,
1871 NULL, /* readdir */
1872 &sv_poll,
1873 &sv_ioctl,
1874 &sv_mmap,
1875 &sv_open,
1876 NULL, /* flush */
1877 &sv_release,
1878 NULL, /* fsync */
1879 NULL, /* fasync */
1880 NULL, /* check_media_change */
1881 NULL, /* revalidate */
1882 NULL, /* lock */
1883 };
1884
1885 /* --------------------------------------------------------------------- */
1886
1887 static ssize_t sv_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1888 {
1889 struct sv_state *s = (struct sv_state *)file->private_data;
1890 DECLARE_WAITQUEUE(wait, current);
1891 ssize_t ret;
1892 unsigned long flags;
1893 unsigned ptr;
1894 int cnt;
1895
1896 VALIDATE_STATE(s);
1897 if (ppos != &file->f_pos)
1898 return -ESPIPE;
1899 if (!access_ok(VERIFY_WRITE, buffer, count))
1900 return -EFAULT;
1901 if (count == 0)
1902 return 0;
1903 ret = 0;
1904 add_wait_queue(&s->midi.iwait, &wait);
1905 while (count > 0) {
1906 spin_lock_irqsave(&s->lock, flags);
1907 ptr = s->midi.ird;
1908 cnt = MIDIINBUF - ptr;
1909 if (s->midi.icnt < cnt)
1910 cnt = s->midi.icnt;
1911 spin_unlock_irqrestore(&s->lock, flags);
1912 if (cnt > count)
1913 cnt = count;
1914 if (cnt <= 0) {
1915 if (file->f_flags & O_NONBLOCK) {
1916 if (!ret)
1917 ret = -EAGAIN;
1918 break;
1919 }
1920 __set_current_state(TASK_INTERRUPTIBLE);
1921 schedule();
1922 if (signal_pending(current)) {
1923 if (!ret)
1924 ret = -ERESTARTSYS;
1925 break;
1926 }
1927 continue;
1928 }
1929 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1930 if (!ret)
1931 ret = -EFAULT;
1932 break;
1933 }
1934 ptr = (ptr + cnt) % MIDIINBUF;
1935 spin_lock_irqsave(&s->lock, flags);
1936 s->midi.ird = ptr;
1937 s->midi.icnt -= cnt;
1938 spin_unlock_irqrestore(&s->lock, flags);
1939 count -= cnt;
1940 buffer += cnt;
1941 ret += cnt;
1942 break;
1943 }
1944 __set_current_state(TASK_RUNNING);
1945 remove_wait_queue(&s->midi.iwait, &wait);
1946 return ret;
1947 }
1948
1949 static ssize_t sv_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1950 {
1951 struct sv_state *s = (struct sv_state *)file->private_data;
1952 DECLARE_WAITQUEUE(wait, current);
1953 ssize_t ret;
1954 unsigned long flags;
1955 unsigned ptr;
1956 int cnt;
1957
1958 VALIDATE_STATE(s);
1959 if (ppos != &file->f_pos)
1960 return -ESPIPE;
1961 if (!access_ok(VERIFY_READ, buffer, count))
1962 return -EFAULT;
1963 if (count == 0)
1964 return 0;
1965 ret = 0;
1966 add_wait_queue(&s->midi.owait, &wait);
1967 while (count > 0) {
1968 spin_lock_irqsave(&s->lock, flags);
1969 ptr = s->midi.owr;
1970 cnt = MIDIOUTBUF - ptr;
1971 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1972 cnt = MIDIOUTBUF - s->midi.ocnt;
1973 if (cnt <= 0)
1974 sv_handle_midi(s);
1975 spin_unlock_irqrestore(&s->lock, flags);
1976 if (cnt > count)
1977 cnt = count;
1978 if (cnt <= 0) {
1979 if (file->f_flags & O_NONBLOCK) {
1980 if (!ret)
1981 ret = -EAGAIN;
1982 break;
1983 }
1984 __set_current_state(TASK_INTERRUPTIBLE);
1985 schedule();
1986 if (signal_pending(current)) {
1987 if (!ret)
1988 ret = -ERESTARTSYS;
1989 break;
1990 }
1991 continue;
1992 }
1993 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1994 if (!ret)
1995 ret = -EFAULT;
1996 break;
1997 }
1998 ptr = (ptr + cnt) % MIDIOUTBUF;
1999 spin_lock_irqsave(&s->lock, flags);
2000 s->midi.owr = ptr;
2001 s->midi.ocnt += cnt;
2002 spin_unlock_irqrestore(&s->lock, flags);
2003 count -= cnt;
2004 buffer += cnt;
2005 ret += cnt;
2006 spin_lock_irqsave(&s->lock, flags);
2007 sv_handle_midi(s);
2008 spin_unlock_irqrestore(&s->lock, flags);
2009 }
2010 __set_current_state(TASK_RUNNING);
2011 remove_wait_queue(&s->midi.owait, &wait);
2012 return ret;
2013 }
2014
2015 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
2016 {
2017 struct sv_state *s = (struct sv_state *)file->private_data;
2018 unsigned long flags;
2019 unsigned int mask = 0;
2020
2021 VALIDATE_STATE(s);
2022 if (file->f_mode & FMODE_WRITE)
2023 poll_wait(file, &s->midi.owait, wait);
2024 if (file->f_mode & FMODE_READ)
2025 poll_wait(file, &s->midi.iwait, wait);
2026 spin_lock_irqsave(&s->lock, flags);
2027 if (file->f_mode & FMODE_READ) {
2028 if (s->midi.icnt > 0)
2029 mask |= POLLIN | POLLRDNORM;
2030 }
2031 if (file->f_mode & FMODE_WRITE) {
2032 if (s->midi.ocnt < MIDIOUTBUF)
2033 mask |= POLLOUT | POLLWRNORM;
2034 }
2035 spin_unlock_irqrestore(&s->lock, flags);
2036 return mask;
2037 }
2038
2039 static int sv_midi_open(struct inode *inode, struct file *file)
2040 {
2041 int minor = MINOR(inode->i_rdev);
2042 struct sv_state *s = devs;
2043 unsigned long flags;
2044
2045 while (s && s->dev_midi != minor)
2046 s = s->next;
2047 if (!s)
2048 return -ENODEV;
2049 VALIDATE_STATE(s);
2050 file->private_data = s;
2051 /* wait for device to become free */
2052 down(&s->open_sem);
2053 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2054 if (file->f_flags & O_NONBLOCK) {
2055 up(&s->open_sem);
2056 return -EBUSY;
2057 }
2058 up(&s->open_sem);
2059 interruptible_sleep_on(&s->open_wait);
2060 if (signal_pending(current))
2061 return -ERESTARTSYS;
2062 down(&s->open_sem);
2063 }
2064 spin_lock_irqsave(&s->lock, flags);
2065 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2066 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2067 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2068 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2069 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2070 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2071 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2072 outb(0xff, s->iomidi+1); /* reset command */
2073 outb(0x3f, s->iomidi+1); /* uart command */
2074 if (!(inb(s->iomidi+1) & 0x80))
2075 inb(s->iomidi);
2076 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2077 init_timer(&s->midi.timer);
2078 s->midi.timer.expires = jiffies+1;
2079 s->midi.timer.data = (unsigned long)s;
2080 s->midi.timer.function = sv_midi_timer;
2081 add_timer(&s->midi.timer);
2082 }
2083 if (file->f_mode & FMODE_READ) {
2084 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2085 }
2086 if (file->f_mode & FMODE_WRITE) {
2087 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2088 }
2089 spin_unlock_irqrestore(&s->lock, flags);
2090 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2091 up(&s->open_sem);
2092 MOD_INC_USE_COUNT;
2093 return 0;
2094 }
2095
2096 static int sv_midi_release(struct inode *inode, struct file *file)
2097 {
2098 struct sv_state *s = (struct sv_state *)file->private_data;
2099 DECLARE_WAITQUEUE(wait, current);
2100 unsigned long flags;
2101 unsigned count, tmo;
2102
2103 VALIDATE_STATE(s);
2104
2105 if (file->f_mode & FMODE_WRITE) {
2106 __set_current_state(TASK_INTERRUPTIBLE);
2107 add_wait_queue(&s->midi.owait, &wait);
2108 for (;;) {
2109 spin_lock_irqsave(&s->lock, flags);
2110 count = s->midi.ocnt;
2111 spin_unlock_irqrestore(&s->lock, flags);
2112 if (count <= 0)
2113 break;
2114 if (signal_pending(current))
2115 break;
2116 if (file->f_flags & O_NONBLOCK) {
2117 remove_wait_queue(&s->midi.owait, &wait);
2118 set_current_state(TASK_RUNNING);
2119 return -EBUSY;
2120 }
2121 tmo = (count * HZ) / 3100;
2122 if (!schedule_timeout(tmo ? : 1) && tmo)
2123 printk(KERN_DEBUG "sv: midi timed out??\n");
2124 }
2125 remove_wait_queue(&s->midi.owait, &wait);
2126 set_current_state(TASK_RUNNING);
2127 }
2128 down(&s->open_sem);
2129 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2130 spin_lock_irqsave(&s->lock, flags);
2131 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2132 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2133 del_timer(&s->midi.timer);
2134 }
2135 spin_unlock_irqrestore(&s->lock, flags);
2136 up(&s->open_sem);
2137 wake_up(&s->open_wait);
2138 MOD_DEC_USE_COUNT;
2139 return 0;
2140 }
2141
2142 static /*const*/ struct file_operations sv_midi_fops = {
2143 &sv_llseek,
2144 &sv_midi_read,
2145 &sv_midi_write,
2146 NULL, /* readdir */
2147 &sv_midi_poll,
2148 NULL, /* ioctl */
2149 NULL, /* mmap */
2150 &sv_midi_open,
2151 NULL, /* flush */
2152 &sv_midi_release,
2153 NULL, /* fsync */
2154 NULL, /* fasync */
2155 NULL, /* check_media_change */
2156 NULL, /* revalidate */
2157 NULL, /* lock */
2158 };
2159
2160 /* --------------------------------------------------------------------- */
2161
2162 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2163 {
2164 static const unsigned char op_offset[18] = {
2165 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2166 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2167 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2168 };
2169 struct sv_state *s = (struct sv_state *)file->private_data;
2170 struct dm_fm_voice v;
2171 struct dm_fm_note n;
2172 struct dm_fm_params p;
2173 unsigned int io;
2174 unsigned int regb;
2175
2176 switch (cmd) {
2177 case FM_IOCTL_RESET:
2178 for (regb = 0xb0; regb < 0xb9; regb++) {
2179 outb(regb, s->iosynth);
2180 outb(0, s->iosynth+1);
2181 outb(regb, s->iosynth+2);
2182 outb(0, s->iosynth+3);
2183 }
2184 return 0;
2185
2186 case FM_IOCTL_PLAY_NOTE:
2187 if (copy_from_user(&n, (void *)arg, sizeof(n)))
2188 return -EFAULT;
2189 if (n.voice >= 18)
2190 return -EINVAL;
2191 if (n.voice >= 9) {
2192 regb = n.voice - 9;
2193 io = s->iosynth+2;
2194 } else {
2195 regb = n.voice;
2196 io = s->iosynth;
2197 }
2198 outb(0xa0 + regb, io);
2199 outb(n.fnum & 0xff, io+1);
2200 outb(0xb0 + regb, io);
2201 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2202 return 0;
2203
2204 case FM_IOCTL_SET_VOICE:
2205 if (copy_from_user(&v, (void *)arg, sizeof(v)))
2206 return -EFAULT;
2207 if (v.voice >= 18)
2208 return -EINVAL;
2209 regb = op_offset[v.voice];
2210 io = s->iosynth + ((v.op & 1) << 1);
2211 outb(0x20 + regb, io);
2212 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2213 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2214 outb(0x40 + regb, io);
2215 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2216 outb(0x60 + regb, io);
2217 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2218 outb(0x80 + regb, io);
2219 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2220 outb(0xe0 + regb, io);
2221 outb(v.waveform & 0x7, io+1);
2222 if (n.voice >= 9) {
2223 regb = n.voice - 9;
2224 io = s->iosynth+2;
2225 } else {
2226 regb = n.voice;
2227 io = s->iosynth;
2228 }
2229 outb(0xc0 + regb, io);
2230 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2231 (v.connection & 1), io+1);
2232 return 0;
2233
2234 case FM_IOCTL_SET_PARAMS:
2235 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2236 return -EFAULT;
2237 outb(0x08, s->iosynth);
2238 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2239 outb(0xbd, s->iosynth);
2240 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2241 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2242 return 0;
2243
2244 case FM_IOCTL_SET_OPL:
2245 outb(4, s->iosynth+2);
2246 outb(arg, s->iosynth+3);
2247 return 0;
2248
2249 case FM_IOCTL_SET_MODE:
2250 outb(5, s->iosynth+2);
2251 outb(arg & 1, s->iosynth+3);
2252 return 0;
2253
2254 default:
2255 return -EINVAL;
2256 }
2257 }
2258
2259 static int sv_dmfm_open(struct inode *inode, struct file *file)
2260 {
2261 int minor = MINOR(inode->i_rdev);
2262 struct sv_state *s = devs;
2263
2264 while (s && s->dev_dmfm != minor)
2265 s = s->next;
2266 if (!s)
2267 return -ENODEV;
2268 VALIDATE_STATE(s);
2269 file->private_data = s;
2270 /* wait for device to become free */
2271 down(&s->open_sem);
2272 while (s->open_mode & FMODE_DMFM) {
2273 if (file->f_flags & O_NONBLOCK) {
2274 up(&s->open_sem);
2275 return -EBUSY;
2276 }
2277 up(&s->open_sem);
2278 interruptible_sleep_on(&s->open_wait);
2279 if (signal_pending(current))
2280 return -ERESTARTSYS;
2281 down(&s->open_sem);
2282 }
2283 /* init the stuff */
2284 outb(1, s->iosynth);
2285 outb(0x20, s->iosynth+1); /* enable waveforms */
2286 outb(4, s->iosynth+2);
2287 outb(0, s->iosynth+3); /* no 4op enabled */
2288 outb(5, s->iosynth+2);
2289 outb(1, s->iosynth+3); /* enable OPL3 */
2290 s->open_mode |= FMODE_DMFM;
2291 up(&s->open_sem);
2292 MOD_INC_USE_COUNT;
2293 return 0;
2294 }
2295
2296 static int sv_dmfm_release(struct inode *inode, struct file *file)
2297 {
2298 struct sv_state *s = (struct sv_state *)file->private_data;
2299 unsigned int regb;
2300
2301 VALIDATE_STATE(s);
2302 down(&s->open_sem);
2303 s->open_mode &= ~FMODE_DMFM;
2304 for (regb = 0xb0; regb < 0xb9; regb++) {
2305 outb(regb, s->iosynth);
2306 outb(0, s->iosynth+1);
2307 outb(regb, s->iosynth+2);
2308 outb(0, s->iosynth+3);
2309 }
2310 up(&s->open_sem);
2311 wake_up(&s->open_wait);
2312 MOD_DEC_USE_COUNT;
2313 return 0;
2314 }
2315
2316 static /*const*/ struct file_operations sv_dmfm_fops = {
2317 &sv_llseek,
2318 NULL, /* read */
2319 NULL, /* write */
2320 NULL, /* readdir */
2321 NULL, /* poll */
2322 &sv_dmfm_ioctl,
2323 NULL, /* mmap */
2324 &sv_dmfm_open,
2325 NULL, /* flush */
2326 &sv_dmfm_release,
2327 NULL, /* fsync */
2328 NULL, /* fasync */
2329 NULL, /* check_media_change */
2330 NULL, /* revalidate */
2331 NULL, /* lock */
2332 };
2333
2334 /* --------------------------------------------------------------------- */
2335
2336 /* maximum number of devices */
2337 #define NR_DEVICE 5
2338
2339 static int reverb[NR_DEVICE] = { 0, };
2340
2341 #if 0
2342 static int wavetable[NR_DEVICE] = { 0, };
2343 #endif
2344
2345 MODULE_PARM(reverb, "1-" __MODULE_STRING(NR_DEVICE) "i");
2346 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2347 #if 0
2348 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2349 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2350 #endif
2351
2352 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2353 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2354
2355 /* --------------------------------------------------------------------- */
2356
2357 static struct initvol {
2358 int mixch;
2359 int vol;
2360 } initvol[] __initdata = {
2361 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2362 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2363 { SOUND_MIXER_WRITE_CD, 0x4040 },
2364 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2365 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2366 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2367 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2368 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2369 { SOUND_MIXER_WRITE_PCM, 0x4040 }
2370 };
2371
2372 #define RSRCISIOREGION(dev,num) ((dev)->resource[(num)].start != 0 && \
2373 ((dev)->resource[(num)].flags & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
2374 #define RSRCADDRESS(dev,num) ((dev)->resource[(num)].start)
2375
2376 static int __init init_sonicvibes(void)
2377 {
2378 static const char __initlocaldata sv_ddma_name[] = "S3 Inc. SonicVibes DDMA Controller";
2379 struct sv_state *s;
2380 struct pci_dev *pcidev = NULL;
2381 mm_segment_t fs;
2382 int i, val, index = 0;
2383 char *ddmaname;
2384 unsigned ddmanamelen;
2385
2386 if (!pci_present()) /* No PCI bus in this machine! */
2387 return -ENODEV;
2388 printk(KERN_INFO "sv: version v0.20 time " __TIME__ " " __DATE__ "\n");
2389 #if 0
2390 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2391 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2392 #endif
2393 while (index < NR_DEVICE &&
2394 (pcidev = pci_find_device(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, pcidev))) {
2395 if (!RSRCISIOREGION(pcidev, RESOURCE_SB) ||
2396 !RSRCISIOREGION(pcidev, RESOURCE_ENH) ||
2397 !RSRCISIOREGION(pcidev, RESOURCE_SYNTH) ||
2398 !RSRCISIOREGION(pcidev, RESOURCE_MIDI) ||
2399 !RSRCISIOREGION(pcidev, RESOURCE_GAME))
2400 continue;
2401 if (pcidev->irq == 0)
2402 continue;
2403 /* try to allocate a DDMA resource if not already available */
2404 if (!RSRCISIOREGION(pcidev, RESOURCE_DDMA)) {
2405 /* take care of ISA aliases */
2406 ddmanamelen = strlen(sv_ddma_name)+1;
2407 if (!(ddmaname = kmalloc(ddmanamelen, GFP_KERNEL)))
2408 continue;
2409 memcpy(ddmaname, sv_ddma_name, ddmanamelen);
2410 pcidev->resource[RESOURCE_DDMA].name = ddmaname;
2411 if (allocate_resource(&ioport_resource, pcidev->resource+RESOURCE_DDMA,
2412 2*SV_EXTENT_DMA, 0x1000, 0x10000-2*SV_EXTENT_DMA, 1024)) {
2413 pcidev->resource[RESOURCE_DDMA].name = NULL;
2414 kfree(ddmaname);
2415 printk(KERN_ERR "sv: cannot allocate DDMA controller io ports\n");
2416 continue;
2417 }
2418 pcidev->resource[RESOURCE_DDMA].flags = PCI_BASE_ADDRESS_SPACE_IO | IORESOURCE_IO;
2419 }
2420 if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2421 printk(KERN_WARNING "sv: out of memory\n");
2422 continue;
2423 }
2424 memset(s, 0, sizeof(struct sv_state));
2425 init_waitqueue_head(&s->dma_adc.wait);
2426 init_waitqueue_head(&s->dma_dac.wait);
2427 init_waitqueue_head(&s->open_wait);
2428 init_waitqueue_head(&s->midi.iwait);
2429 init_waitqueue_head(&s->midi.owait);
2430 init_MUTEX(&s->open_sem);
2431 spin_lock_init(&s->lock);
2432 s->magic = SV_MAGIC;
2433 s->iosb = RSRCADDRESS(pcidev, RESOURCE_SB);
2434 s->ioenh = RSRCADDRESS(pcidev, RESOURCE_ENH);
2435 s->iosynth = RSRCADDRESS(pcidev, RESOURCE_SYNTH);
2436 s->iomidi = RSRCADDRESS(pcidev, RESOURCE_MIDI);
2437 s->iogame = RSRCADDRESS(pcidev, RESOURCE_GAME);
2438 s->iodmaa = RSRCADDRESS(pcidev, RESOURCE_DDMA);
2439 s->iodmac = RSRCADDRESS(pcidev, RESOURCE_DDMA) + SV_EXTENT_DMA;
2440 pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9); /* enable and use extended mode */
2441 pci_write_config_dword(pcidev, 0x48, s->iodmac | 9); /* enable */
2442 printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#lx %#x %#x\n",
2443 s->iosb, s->ioenh, s->iosynth, s->iomidi, s->iogame, s->iodmaa, s->iodmac);
2444 s->irq = pcidev->irq;
2445
2446 /* hack */
2447 pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12); /* wavetable base address */
2448
2449 if (check_region(s->ioenh, SV_EXTENT_ENH)) {
2450 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2451 goto err_region5;
2452 }
2453 request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM");
2454 if (check_region(s->iodmaa, SV_EXTENT_DMA)) {
2455 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2456 goto err_region4;
2457 }
2458 request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA");
2459 if (check_region(s->iodmac, SV_EXTENT_DMA)) {
2460 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2461 goto err_region3;
2462 }
2463 request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC");
2464 if (check_region(s->iomidi, SV_EXTENT_MIDI)) {
2465 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2466 goto err_region2;
2467 }
2468 request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi");
2469 if (check_region(s->iosynth, SV_EXTENT_SYNTH)) {
2470 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2471 goto err_region1;
2472 }
2473 request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth");
2474 /* initialize codec registers */
2475 outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2476 udelay(50);
2477 outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2478 udelay(50);
2479 outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2480 | (reverb[index] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2481 inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2482 wrindir(s, SV_CIDRIVECONTROL, 0); /* drive current 16mA */
2483 wrindir(s, SV_CIENABLE, s->enable = 0); /* disable DMAA and DMAC */
2484 outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2485 /* outb(0xff, s->iodmaa + SV_DMA_RESET); */
2486 /* outb(0xff, s->iodmac + SV_DMA_RESET); */
2487 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2488 wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2489 wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2490 wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2491 setpll(s, SV_CIADCPLLM, 8000);
2492 wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2493 wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2494 wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2495 wrindir(s, SV_CIADCOUTPUT, 0);
2496 /* request irq */
2497 if (request_irq(s->irq, sv_interrupt, SA_SHIRQ, "S3 SonicVibes", s)) {
2498 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2499 goto err_irq;
2500 }
2501 printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2502 s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2503 /* register devices */
2504 if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0)
2505 goto err_dev1;
2506 if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0)
2507 goto err_dev2;
2508 if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0)
2509 goto err_dev3;
2510 if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0)
2511 goto err_dev4;
2512 pci_set_master(pcidev); /* enable bus mastering */
2513 /* initialize the chips */
2514 fs = get_fs();
2515 set_fs(KERNEL_DS);
2516 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2517 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2518 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2519 val = initvol[i].vol;
2520 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2521 }
2522 set_fs(fs);
2523 /* queue it for later freeing */
2524 s->next = devs;
2525 devs = s;
2526 index++;
2527 continue;
2528
2529 err_dev4:
2530 unregister_sound_midi(s->dev_midi);
2531 err_dev3:
2532 unregister_sound_mixer(s->dev_mixer);
2533 err_dev2:
2534 unregister_sound_dsp(s->dev_audio);
2535 err_dev1:
2536 printk(KERN_ERR "sv: cannot register misc device\n");
2537 free_irq(s->irq, s);
2538 err_irq:
2539 release_region(s->iosynth, SV_EXTENT_SYNTH);
2540 err_region1:
2541 release_region(s->iomidi, SV_EXTENT_MIDI);
2542 err_region2:
2543 release_region(s->iodmac, SV_EXTENT_DMA);
2544 err_region3:
2545 release_region(s->iodmaa, SV_EXTENT_DMA);
2546 err_region4:
2547 release_region(s->ioenh, SV_EXTENT_ENH);
2548 err_region5:
2549 kfree_s(s, sizeof(struct sv_state));
2550 }
2551 if (!devs) {
2552 if (wavetable_mem)
2553 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2554 return -ENODEV;
2555 }
2556 return 0;
2557 }
2558
2559 static void __exit cleanup_sonicvibes(void)
2560 {
2561 struct sv_state *s;
2562
2563 while ((s = devs)) {
2564 devs = devs->next;
2565 outb(~0, s->ioenh + SV_CODEC_INTMASK); /* disable ints */
2566 synchronize_irq();
2567 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2568 wrindir(s, SV_CIENABLE, 0); /* disable DMAA and DMAC */
2569 /*outb(0, s->iodmaa + SV_DMA_RESET);*/
2570 /*outb(0, s->iodmac + SV_DMA_RESET);*/
2571 free_irq(s->irq, s);
2572 release_region(s->iodmac, SV_EXTENT_DMA);
2573 release_region(s->iodmaa, SV_EXTENT_DMA);
2574 release_region(s->ioenh, SV_EXTENT_ENH);
2575 release_region(s->iomidi, SV_EXTENT_MIDI);
2576 release_region(s->iosynth, SV_EXTENT_SYNTH);
2577 unregister_sound_dsp(s->dev_audio);
2578 unregister_sound_mixer(s->dev_mixer);
2579 unregister_sound_midi(s->dev_midi);
2580 unregister_sound_special(s->dev_dmfm);
2581 kfree_s(s, sizeof(struct sv_state));
2582 }
2583 if (wavetable_mem)
2584 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2585 printk(KERN_INFO "sv: unloading\n");
2586 }
2587
2588 module_init(init_sonicvibes);
2589 module_exit(cleanup_sonicvibes);
2590
2591 /* --------------------------------------------------------------------- */
2592
2593 #ifndef MODULE
2594
2595 /* format is: sonicvibes=[reverb] sonicvibesdmaio=dmaioaddr */
2596
2597 static int __init sonicvibes_setup(char *str)
2598 {
2599 static unsigned __initlocaldata nr_dev = 0;
2600
2601 if (nr_dev >= NR_DEVICE)
2602 return 0;
2603 #if 0
2604 if (get_option(&str, &reverb[nr_dev]) == 2)
2605 (void)get_option(&str, &wavetable[nr_dev]);
2606 #else
2607 (void)get_option(&str, &reverb[nr_dev]);
2608 #endif
2609
2610 nr_dev++;
2611 return 1;
2612 }
2613
2614 __setup("sonicvibes=", sonicvibes_setup);
2615
2616 #endif /* MODULE */
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