1 /* esp.c: EnhancedScsiProcessor Sun SCSI driver code.
3 * Copyright (C) 1995, 1998 David S. Miller (davem@caip.rutgers.edu)
8 * 1) Maybe disable parity checking in config register one for SCSI1
9 * targets. (Gilmore says parity error on the SBus can lock up
11 * 2) Add support for DMA2 pipelining.
12 * 3) Add tagged queueing.
15 #include <linux/config.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/types.h>
19 #include <linux/string.h>
20 #include <linux/malloc.h>
21 #include <linux/blk.h>
22 #include <linux/proc_fs.h>
23 #include <linux/stat.h>
24 #include <linux/init.h>
25 #include <linux/spinlock.h>
33 #include <asm/system.h>
34 #include <asm/machines.h>
35 #include <asm/ptrace.h>
36 #include <asm/pgtable.h>
37 #include <asm/oplib.h>
40 #include <asm/idprom.h>
43 /* #define DEBUG_ESP_HME */
44 /* #define DEBUG_ESP_DATA */
45 /* #define DEBUG_ESP_QUEUE */
46 /* #define DEBUG_ESP_DISCONNECT */
47 /* #define DEBUG_ESP_STATUS */
48 /* #define DEBUG_ESP_PHASES */
49 /* #define DEBUG_ESP_WORKBUS */
50 /* #define DEBUG_STATE_MACHINE */
51 /* #define DEBUG_ESP_CMDS */
52 /* #define DEBUG_ESP_IRQS */
53 /* #define DEBUG_SDTR */
54 /* #define DEBUG_ESP_SG */
56 /* Use the following to sprinkle debugging messages in a way which
57 * suits you if combinations of the above become too verbose when
58 * trying to track down a specific problem.
60 /* #define DEBUG_ESP_MISC */
62 #if defined(DEBUG_ESP)
63 #define ESPLOG(foo) printk foo
66 #endif /* (DEBUG_ESP) */
68 #if defined(DEBUG_ESP_HME)
69 #define ESPHME(foo) printk foo
74 #if defined(DEBUG_ESP_DATA)
75 #define ESPDATA(foo) printk foo
80 #if defined(DEBUG_ESP_QUEUE)
81 #define ESPQUEUE(foo) printk foo
86 #if defined(DEBUG_ESP_DISCONNECT)
87 #define ESPDISC(foo) printk foo
92 #if defined(DEBUG_ESP_STATUS)
93 #define ESPSTAT(foo) printk foo
98 #if defined(DEBUG_ESP_PHASES)
99 #define ESPPHASE(foo) printk foo
101 #define ESPPHASE(foo)
104 #if defined(DEBUG_ESP_WORKBUS)
105 #define ESPBUS(foo) printk foo
110 #if defined(DEBUG_ESP_IRQS)
111 #define ESPIRQ(foo) printk foo
116 #if defined(DEBUG_SDTR)
117 #define ESPSDTR(foo) printk foo
122 #if defined(DEBUG_ESP_MISC)
123 #define ESPMISC(foo) printk foo
128 /* Command phase enumeration. */
130 not_issued
= 0x00, /* Still in the issue_SC queue. */
132 /* Various forms of selecting a target. */
133 #define in_slct_mask 0x10
134 in_slct_norm
= 0x10, /* ESP is arbitrating, normal selection */
135 in_slct_stop
= 0x11, /* ESP will select, then stop with IRQ */
136 in_slct_msg
= 0x12, /* select, then send a message */
137 in_slct_tag
= 0x13, /* select and send tagged queue msg */
138 in_slct_sneg
= 0x14, /* select and acquire sync capabilities */
140 /* Any post selection activity. */
141 #define in_phases_mask 0x20
142 in_datain
= 0x20, /* Data is transferring from the bus */
143 in_dataout
= 0x21, /* Data is transferring to the bus */
144 in_data_done
= 0x22, /* Last DMA data operation done (maybe) */
145 in_msgin
= 0x23, /* Eating message from target */
146 in_msgincont
= 0x24, /* Eating more msg bytes from target */
147 in_msgindone
= 0x25, /* Decide what to do with what we got */
148 in_msgout
= 0x26, /* Sending message to target */
149 in_msgoutdone
= 0x27, /* Done sending msg out */
150 in_cmdbegin
= 0x28, /* Sending cmd after abnormal selection */
151 in_cmdend
= 0x29, /* Done sending slow cmd */
152 in_status
= 0x2a, /* Was in status phase, finishing cmd */
153 in_freeing
= 0x2b, /* freeing the bus for cmd cmplt or disc */
154 in_the_dark
= 0x2c, /* Don't know what bus phase we are in */
156 /* Special states, ie. not normal bus transitions... */
157 #define in_spec_mask 0x80
158 in_abortone
= 0x80, /* Aborting one command currently */
159 in_abortall
= 0x81, /* Blowing away all commands we have */
160 in_resetdev
= 0x82, /* SCSI target reset in progress */
161 in_resetbus
= 0x83, /* SCSI bus reset in progress */
162 in_tgterror
= 0x84, /* Target did something stupid */
166 /* Zero has special meaning, see skipahead[12]. */
169 /*1*/ do_phase_determine
,
171 /*3*/ do_reset_complete
,
176 struct proc_dir_entry proc_scsi_esp
= {
177 PROC_SCSI_ESP
, 3, "esp",
178 S_IFDIR
| S_IRUGO
| S_IXUGO
, 2
181 /* The master ring of all esp hosts we are managing in this driver. */
182 static struct Sparc_ESP
*espchain
;
183 static int esps_running
= 0;
185 /* Forward declarations. */
186 static void esp_intr(int irq
, void *dev_id
, struct pt_regs
*pregs
);
188 static void esp_intr_4d(int irq
, void *dev_id
, struct pt_regs
*pregs
);
191 /* Debugging routines */
192 struct esp_cmdstrings
{
195 } esp_cmd_strings
[] = {
197 { ESP_CMD_NULL
, "ESP_NOP", },
198 { ESP_CMD_FLUSH
, "FIFO_FLUSH", },
199 { ESP_CMD_RC
, "RSTESP", },
200 { ESP_CMD_RS
, "RSTSCSI", },
201 /* Disconnected State Group */
202 { ESP_CMD_RSEL
, "RESLCTSEQ", },
203 { ESP_CMD_SEL
, "SLCTNATN", },
204 { ESP_CMD_SELA
, "SLCTATN", },
205 { ESP_CMD_SELAS
, "SLCTATNSTOP", },
206 { ESP_CMD_ESEL
, "ENSLCTRESEL", },
207 { ESP_CMD_DSEL
, "DISSELRESEL", },
208 { ESP_CMD_SA3
, "SLCTATN3", },
209 { ESP_CMD_RSEL3
, "RESLCTSEQ", },
210 /* Target State Group */
211 { ESP_CMD_SMSG
, "SNDMSG", },
212 { ESP_CMD_SSTAT
, "SNDSTATUS", },
213 { ESP_CMD_SDATA
, "SNDDATA", },
214 { ESP_CMD_DSEQ
, "DISCSEQ", },
215 { ESP_CMD_TSEQ
, "TERMSEQ", },
216 { ESP_CMD_TCCSEQ
, "TRGTCMDCOMPSEQ", },
217 { ESP_CMD_DCNCT
, "DISC", },
218 { ESP_CMD_RMSG
, "RCVMSG", },
219 { ESP_CMD_RCMD
, "RCVCMD", },
220 { ESP_CMD_RDATA
, "RCVDATA", },
221 { ESP_CMD_RCSEQ
, "RCVCMDSEQ", },
222 /* Initiator State Group */
223 { ESP_CMD_TI
, "TRANSINFO", },
224 { ESP_CMD_ICCSEQ
, "INICMDSEQCOMP", },
225 { ESP_CMD_MOK
, "MSGACCEPTED", },
226 { ESP_CMD_TPAD
, "TPAD", },
227 { ESP_CMD_SATN
, "SATN", },
228 { ESP_CMD_RATN
, "RATN", },
230 #define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
232 /* Print textual representation of an ESP command */
233 static inline void esp_print_cmd(unchar espcmd
)
235 unchar dma_bit
= espcmd
& ESP_CMD_DMA
;
239 for(i
=0; i
<NUM_ESP_COMMANDS
; i
++)
240 if(esp_cmd_strings
[i
].cmdchar
== espcmd
)
242 if(i
==NUM_ESP_COMMANDS
)
243 printk("ESP_Unknown");
245 printk("%s%s", esp_cmd_strings
[i
].text
,
246 ((dma_bit
) ? "+DMA" : ""));
249 /* Print the status register's value */
250 static inline void esp_print_statreg(unchar statreg
)
255 phase
= statreg
& ESP_STAT_PMASK
;
256 printk("%s,", (phase
== ESP_DOP
? "DATA-OUT" :
257 (phase
== ESP_DIP
? "DATA-IN" :
258 (phase
== ESP_CMDP
? "COMMAND" :
259 (phase
== ESP_STATP
? "STATUS" :
260 (phase
== ESP_MOP
? "MSG-OUT" :
261 (phase
== ESP_MIP
? "MSG_IN" :
263 if(statreg
& ESP_STAT_TDONE
)
264 printk("TRANS_DONE,");
265 if(statreg
& ESP_STAT_TCNT
)
266 printk("TCOUNT_ZERO,");
267 if(statreg
& ESP_STAT_PERR
)
269 if(statreg
& ESP_STAT_SPAM
)
271 if(statreg
& ESP_STAT_INTR
)
276 /* Print the interrupt register's value */
277 static inline void esp_print_ireg(unchar intreg
)
280 if(intreg
& ESP_INTR_S
)
281 printk("SLCT_NATN ");
282 if(intreg
& ESP_INTR_SATN
)
284 if(intreg
& ESP_INTR_RSEL
)
286 if(intreg
& ESP_INTR_FDONE
)
288 if(intreg
& ESP_INTR_BSERV
)
290 if(intreg
& ESP_INTR_DC
)
292 if(intreg
& ESP_INTR_IC
)
294 if(intreg
& ESP_INTR_SR
)
295 printk("SCSI_BUS_RESET ");
299 /* Print the sequence step registers contents */
300 static inline void esp_print_seqreg(unchar stepreg
)
302 stepreg
&= ESP_STEP_VBITS
;
304 (stepreg
== ESP_STEP_ASEL
? "SLCT_ARB_CMPLT" :
305 (stepreg
== ESP_STEP_SID
? "1BYTE_MSG_SENT" :
306 (stepreg
== ESP_STEP_NCMD
? "NOT_IN_CMD_PHASE" :
307 (stepreg
== ESP_STEP_PPC
? "CMD_BYTES_LOST" :
308 (stepreg
== ESP_STEP_FINI4
? "CMD_SENT_OK" :
312 static char *phase_string(int phase
)
368 #ifdef DEBUG_STATE_MACHINE
369 static inline void esp_advance_phase(Scsi_Cmnd
*s
, int newphase
)
371 ESPLOG(("<%s>", phase_string(newphase
)));
372 s
->SCp
.sent_command
= s
->SCp
.phase
;
373 s
->SCp
.phase
= newphase
;
376 #define esp_advance_phase(__s, __newphase) \
377 (__s)->SCp.sent_command = (__s)->SCp.phase; \
378 (__s)->SCp.phase = (__newphase);
381 #ifdef DEBUG_ESP_CMDS
382 extern inline void esp_cmd(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
385 esp
->espcmdlog
[esp
->espcmdent
] = cmd
;
386 esp
->espcmdent
= (esp
->espcmdent
+ 1) & 31;
387 eregs
->esp_cmd
= cmd
;
390 #define esp_cmd(__esp, __eregs, __cmd) (__eregs)->esp_cmd = (__cmd)
393 /* How we use the various Linux SCSI data structures for operation.
397 * We keep track of the syncronous capabilities of a target
398 * in the device member, using sync_min_period and
399 * sync_max_offset. These are the values we directly write
400 * into the ESP registers while running a command. If offset
401 * is zero the ESP will use asynchronous transfers.
402 * If the borken flag is set we assume we shouldn't even bother
403 * trying to negotiate for synchronous transfer as this target
404 * is really stupid. If we notice the target is dropping the
405 * bus, and we have been allowing it to disconnect, we clear
406 * the disconnect flag.
410 /* Manipulation of the ESP command queues. Thanks to the aha152x driver
411 * and its author, Juergen E. Fischer, for the methods used here.
412 * Note that these are per-ESP queues, not global queues like
413 * the aha152x driver uses.
415 static inline void append_SC(Scsi_Cmnd
**SC
, Scsi_Cmnd
*new_SC
)
419 new_SC
->host_scribble
= (unsigned char *) NULL
;
423 for(end
=*SC
;end
->host_scribble
;end
=(Scsi_Cmnd
*)end
->host_scribble
)
425 end
->host_scribble
= (unsigned char *) new_SC
;
429 static inline void prepend_SC(Scsi_Cmnd
**SC
, Scsi_Cmnd
*new_SC
)
431 new_SC
->host_scribble
= (unsigned char *) *SC
;
435 static inline Scsi_Cmnd
*remove_first_SC(Scsi_Cmnd
**SC
)
440 *SC
= (Scsi_Cmnd
*) (*SC
)->host_scribble
;
444 static inline Scsi_Cmnd
*remove_SC(Scsi_Cmnd
**SC
, int target
, int lun
)
446 Scsi_Cmnd
*ptr
, *prev
;
448 for(ptr
= *SC
, prev
= NULL
;
449 ptr
&& ((ptr
->target
!= target
) || (ptr
->lun
!= lun
));
450 prev
= ptr
, ptr
= (Scsi_Cmnd
*) ptr
->host_scribble
)
454 prev
->host_scribble
=ptr
->host_scribble
;
456 *SC
=(Scsi_Cmnd
*)ptr
->host_scribble
;
461 /* Resetting various pieces of the ESP scsi driver chipset/buses. */
462 static void esp_reset_dma(struct Sparc_ESP
*esp
)
464 struct sparc_dma_registers
*dregs
= esp
->dregs
;
466 int can_do_burst16
, can_do_burst32
, can_do_burst64
;
469 can_do_burst16
= esp
->bursts
& DMA_BURST16
;
470 can_do_burst32
= esp
->bursts
& DMA_BURST32
;
474 /* XXX Can sun4d do these too? */
475 can_do_burst64
= esp
->bursts
& DMA_BURST64
;
477 mmu_set_sbus64(esp
->edev
, esp
->bursts
);
480 /* Punt the DVMA into a known state. */
481 if(esp
->dma
->revision
!= dvmahme
) {
482 dregs
->cond_reg
|= DMA_RST_SCSI
;
483 dregs
->cond_reg
&= ~(DMA_RST_SCSI
);
485 switch(esp
->dma
->revision
) {
487 /* This is the HME DVMA gate array. */
489 save_flags(flags
); cli(); /* I really hate this chip. */
491 dregs
->cond_reg
= DMA_RESET_FAS366
; /* Reset interface to FAS */
492 dregs
->cond_reg
= DMA_RST_SCSI
; /* Reset DVMA itself */
494 esp
->prev_hme_dmacsr
= (DMA_PARITY_OFF
|DMA_2CLKS
|DMA_SCSI_DISAB
|DMA_INT_ENAB
);
495 esp
->prev_hme_dmacsr
&= ~(DMA_ENABLE
|DMA_ST_WRITE
|DMA_BRST_SZ
);
498 esp
->prev_hme_dmacsr
|= DMA_BRST32
;
499 else if(can_do_burst64
)
500 esp
->prev_hme_dmacsr
|= DMA_BRST64
;
503 esp
->prev_hme_dmacsr
|= DMA_SCSI_SBUS64
;
505 /* This chip is horrible. */
506 while(dregs
->cond_reg
& DMA_PEND_READ
)
511 dregs
->cond_reg
= esp
->prev_hme_dmacsr
;
513 /* This is necessary to avoid having the SCSI channel
514 * engine lock up on us.
518 restore_flags(flags
);
521 /* This is the gate array found in the sun4m
522 * NCR SBUS I/O subsystem.
524 if(esp
->erev
!= esp100
)
525 dregs
->cond_reg
|= DMA_3CLKS
;
528 dregs
->cond_reg
&= ~(DMA_3CLKS
);
529 dregs
->cond_reg
|= DMA_2CLKS
;
531 dregs
->cond_reg
&= ~(DMA_BRST_SZ
);
532 dregs
->cond_reg
|= DMA_BRST32
;
536 /* This is the DMA unit found on SCSI/Ether cards. */
537 dregs
->cond_reg
|= DMA_ADD_ENABLE
;
538 dregs
->cond_reg
&= ~DMA_BCNT_ENAB
;
539 if(!can_do_burst32
&& can_do_burst16
) {
540 dregs
->cond_reg
|= DMA_ESC_BURST
;
542 dregs
->cond_reg
&= ~(DMA_ESC_BURST
);
551 /* Reset the ESP chip, _not_ the SCSI bus. */
552 static void esp_reset_esp(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
)
554 int family_code
, version
, i
;
557 /* Now reset the ESP chip */
558 esp_cmd(esp
, eregs
, ESP_CMD_RC
);
559 esp_cmd(esp
, eregs
, ESP_CMD_NULL
| ESP_CMD_DMA
);
560 esp_cmd(esp
, eregs
, ESP_CMD_NULL
| ESP_CMD_DMA
);
562 /* Reload the configuration registers */
563 eregs
->esp_cfact
= esp
->cfact
;
564 eregs
->esp_stp
= esp
->prev_stp
= 0;
565 eregs
->esp_soff
= esp
->prev_soff
= 0;
566 eregs
->esp_timeo
= esp
->neg_defp
;
568 /* This is the only point at which it is reliable to read
569 * the ID-code for a fast ESP chip variants.
571 esp
->max_period
= ((35 * esp
->ccycle
) / 1000);
572 if(esp
->erev
== fast
) {
573 version
= eregs
->esp_uid
;
574 family_code
= (version
& 0xf8) >> 3;
575 if(family_code
== 0x02)
577 else if(family_code
== 0x0a)
578 esp
->erev
= fashme
; /* Version is usually '5'. */
581 ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
583 (esp
->erev
== fas236
) ? "fas236" :
584 ((esp
->erev
== fas100a
) ? "fas100a" :
585 "fasHME"), family_code
, (version
& 7)));
587 esp
->min_period
= ((4 * esp
->ccycle
) / 1000);
589 esp
->min_period
= ((5 * esp
->ccycle
) / 1000);
591 esp
->max_period
= (esp
->max_period
+ 3)>>2;
592 esp
->min_period
= (esp
->min_period
+ 3)>>2;
594 eregs
->esp_cfg1
= esp
->config1
;
600 eregs
->esp_cfg2
= esp
->config2
;
604 eregs
->esp_cfg2
= esp
->config2
;
605 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[0];
608 esp
->config2
|= (ESP_CONFIG2_HME32
| ESP_CONFIG2_HMEFENAB
);
611 /* Fast 236 or HME */
612 eregs
->esp_cfg2
= esp
->config2
;
614 if(esp
->erev
== fashme
) {
617 cfg3
= ESP_CONFIG3_FCLOCK
| ESP_CONFIG3_OBPUSH
;
618 if (esp
->scsi_id
>= 8)
619 cfg3
|= ESP_CONFIG3_IDBIT3
;
620 esp
->config3
[i
] |= cfg3
;
622 esp
->config3
[i
] |= ESP_CONFIG3_FCLK
;
625 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[0];
626 if(esp
->erev
== fashme
) {
637 eregs
->esp_cfg2
= esp
->config2
;
639 esp
->config3
[i
] |= ESP_CONFIG3_FCLOCK
;
640 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[0];
644 panic("esp: what could it be... I wonder...");
648 /* Eat any bitrot in the chip */
649 trash
= eregs
->esp_intrpt
;
653 /* This places the ESP into a known state at boot time. */
654 static void esp_bootup_reset(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
)
656 volatile unchar trash
;
662 esp_reset_esp(esp
, eregs
);
664 /* Reset the SCSI bus, but tell ESP not to generate an irq */
665 eregs
->esp_cfg1
|= ESP_CONFIG1_SRRDISAB
;
666 esp_cmd(esp
, eregs
, ESP_CMD_RS
);
668 eregs
->esp_cfg1
= esp
->config1
;
670 /* Eat any bitrot in the chip and we are done... */
671 trash
= eregs
->esp_intrpt
;
674 int __init detect_one_esp
675 (Scsi_Host_Template
*tpnt
, struct linux_sbus_device
*esp_dev
, struct linux_sbus_device
*espdma
,
676 struct linux_sbus
*sbus
, int id
, int hme
)
678 struct Sparc_ESP
*esp
, *elink
;
679 struct Scsi_Host
*esp_host
;
680 struct Sparc_ESP_regs
*eregs
;
681 struct sparc_dma_registers
*dregs
;
682 struct Linux_SBus_DMA
*dma
, *dlink
;
684 unchar ccf
, bsizes
, bsizes_more
;
687 esp_host
= scsi_register(tpnt
, sizeof(struct Sparc_ESP
));
689 panic("Cannot register ESP SCSI host");
691 esp_host
->max_id
= 16;
692 esp
= (struct Sparc_ESP
*) esp_host
->hostdata
;
694 panic("No esp in hostdata");
695 esp
->ehost
= esp_host
;
700 esp_host
->unchecked_isa_dma
= 1;
703 /* Put into the chain of esp chips detected */
706 while(elink
->next
) elink
= elink
->next
;
713 /* Get misc. prom information */
714 #define ESP_IS_MY_DVMA(esp, dma) \
716 ((esp->edev->my_bus == dma->SBus_dev->my_bus) && \
717 (esp->edev->slot == dma->SBus_dev->slot) && \
718 (!strcmp(dma->SBus_dev->prom_name, "dma") || \
719 !strcmp(dma->SBus_dev->prom_name, "espdma"))))
721 esp_node
= esp_dev
->prom_node
;
722 prom_getstring(esp_node
, "name", esp
->prom_name
,
723 sizeof(esp
->prom_name
));
724 esp
->prom_node
= esp_node
;
726 for_each_dvma(dlink
) {
727 if(dlink
->SBus_dev
== espdma
)
731 for_each_dvma(dlink
) {
732 if(ESP_IS_MY_DVMA(esp
, dlink
) &&
737 #undef ESP_IS_MY_DVMA
738 /* If we don't know how to handle the dvma,
739 * do not use this device.
742 printk ("Cannot find dvma for ESP%d's SCSI\n",
744 scsi_unregister (esp_host
);
747 if (dlink
->allocated
){
748 printk ("esp%d: can't use my espdma\n",
750 scsi_unregister (esp_host
);
753 dlink
->allocated
= 1;
756 esp
->dregs
= dregs
= dma
->regs
;
758 /* Map in the ESP registers from I/O space */
760 prom_apply_sbus_ranges(esp
->edev
->my_bus
,
761 esp
->edev
->reg_addrs
,
764 esp
->eregs
= eregs
= (struct Sparc_ESP_regs
*)
765 sparc_alloc_io(esp
->edev
->reg_addrs
[0].phys_addr
, 0,
766 PAGE_SIZE
, "ESP Registers",
767 esp
->edev
->reg_addrs
[0].which_io
, 0x0);
769 /* On HME, two reg sets exist, first is DVMA,
770 * second is ESP registers.
772 esp
->eregs
= eregs
= (struct Sparc_ESP_regs
*)
773 sparc_alloc_io(esp
->edev
->reg_addrs
[1].phys_addr
, 0,
774 PAGE_SIZE
, "ESP Registers",
775 esp
->edev
->reg_addrs
[1].which_io
, 0x0);
778 panic("ESP registers unmappable");
780 sparc_dvma_malloc(16, "ESP DVMA Cmd Block",
781 &esp
->esp_command_dvma
);
782 if(!esp
->esp_command
|| !esp
->esp_command_dvma
)
783 panic("ESP DVMA transport area unmappable");
785 /* Set up the irq's etc. */
786 esp
->ehost
->base
= (unsigned char *) esp
->eregs
;
787 esp
->ehost
->io_port
=
788 esp
->edev
->reg_addrs
[0].phys_addr
;
789 esp
->ehost
->n_io_port
= (unsigned char)
790 esp
->edev
->reg_addrs
[0].reg_size
;
791 esp
->ehost
->irq
= esp
->irq
= esp
->edev
->irqs
[0];
794 if (sparc_cpu_model
!= sun4d
) {
795 /* Allocate the irq only if necessary */
796 for_each_esp(elink
) {
797 if((elink
!= esp
) && (esp
->irq
== elink
->irq
)) {
798 goto esp_irq_acquired
; /* BASIC rulez */
801 if(request_irq(esp
->ehost
->irq
, esp_intr
, SA_SHIRQ
,
802 "Sparc ESP SCSI", NULL
))
803 panic("Cannot acquire ESP irq line");
805 printk("esp%d: IRQ %d ", esp
->esp_id
, esp
->ehost
->irq
);
807 if (request_irq(esp
->ehost
->irq
, esp_intr_4d
,
808 SA_SHIRQ
, "Sparc ESP SCSI", esp
))
809 panic("Cannot acquire ESP irq line");
810 printk("esp%d: IRQ %s ", esp
->esp_id
, __irq_itoa(esp
->ehost
->irq
));
813 /* On Ultra we must always call request_irq for each
814 * esp, so that imap registers get setup etc.
816 if(request_irq(esp
->ehost
->irq
, esp_intr
,
817 SA_SHIRQ
, "Sparc ESP SCSI", esp
))
818 panic("Cannot acquire ESP irq line");
819 printk("esp%d: IRQ %s ",
820 esp
->esp_id
, __irq_itoa(esp
->ehost
->irq
));
823 /* Figure out our scsi ID on the bus */
824 esp
->scsi_id
= prom_getintdefault(esp
->prom_node
,
827 if(esp
->scsi_id
== -1)
828 esp
->scsi_id
= prom_getintdefault(esp
->prom_node
,
831 if(esp
->scsi_id
== -1)
832 esp
->scsi_id
= (!esp
->edev
->my_bus
) ? 7 :
833 prom_getintdefault(esp
->edev
->my_bus
->prom_node
,
836 esp
->ehost
->this_id
= esp
->scsi_id
;
837 esp
->scsi_id_mask
= (1 << esp
->scsi_id
);
839 /* Check for differential SCSI-bus */
840 esp
->diff
= prom_getbool(esp
->prom_node
, "differential");
842 printk("Differential ");
844 /* Check out the clock properties of the chip. */
846 /* This is getting messy but it has to be done
847 * correctly or else you get weird behavior all
848 * over the place. We are trying to basically
849 * figure out three pieces of information.
851 * a) Clock Conversion Factor
853 * This is a representation of the input
854 * crystal clock frequency going into the
855 * ESP on this machine. Any operation whose
856 * timing is longer than 400ns depends on this
857 * value being correct. For example, you'll
858 * get blips for arbitration/selection during
859 * high load or with multiple targets if this
860 * is not set correctly.
862 * b) Selection Time-Out
864 * The ESP isn't very bright and will arbitrate
865 * for the bus and try to select a target
866 * forever if you let it. This value tells
867 * the ESP when it has taken too long to
868 * negotiate and that it should interrupt
869 * the CPU so we can see what happened.
870 * The value is computed as follows (from
871 * NCR/Symbios chip docs).
873 * (Time Out Period) * (Input Clock)
874 * STO = ----------------------------------
875 * (8192) * (Clock Conversion Factor)
877 * You usually want the time out period to be
878 * around 250ms, I think we'll set it a little
879 * bit higher to account for fully loaded SCSI
880 * bus's and slow devices that don't respond so
881 * quickly to selection attempts. (yeah, I know
882 * this is out of spec. but there is a lot of
883 * buggy pieces of firmware out there so bite me)
885 * c) Imperical constants for synchronous offset
886 * and transfer period register values
888 * This entails the smallest and largest sync
889 * period we could ever handle on this ESP.
892 fmhz
= prom_getintdefault(esp
->prom_node
,
896 fmhz
= (!esp
->edev
->my_bus
) ? 0 :
897 prom_getintdefault(esp
->edev
->my_bus
->prom_node
,
900 if(fmhz
<= (5000000))
903 ccf
= (((5000000 - 1) + (fmhz
))/(5000000));
904 if(!ccf
|| ccf
> 8) {
905 /* If we can't find anything reasonable,
906 * just assume 20MHZ. This is the clock
907 * frequency of the older sun4c's where I've
908 * been unable to find the clock-frequency
909 * PROM property. All other machines provide
910 * useful values it seems.
915 if(ccf
==(ESP_CCF_F7
+1))
916 esp
->cfact
= ESP_CCF_F0
;
917 else if(ccf
== ESP_CCF_NEVER
)
918 esp
->cfact
= ESP_CCF_F2
;
922 esp
->ccycle
= ESP_MHZ_TO_CYCLE(fmhz
);
923 esp
->ctick
= ESP_TICK(ccf
, esp
->ccycle
);
924 esp
->neg_defp
= ESP_NEG_DEFP(fmhz
, ccf
);
925 esp
->sync_defp
= SYNC_DEFP_SLOW
;
926 printk("SCSI ID %d Clk %dMHz CCF=%d TOut %d ",
927 esp
->scsi_id
, (fmhz
/ 1000000),
928 ccf
, (int) esp
->neg_defp
);
930 /* Find the burst sizes this dma/sbus/esp supports. */
931 bsizes
= prom_getintdefault(esp
->prom_node
, "burst-sizes", 0xff);
934 bsizes_more
= prom_getintdefault(
936 "burst-sizes", 0xff);
937 if(bsizes_more
!= 0xff)
938 bsizes
&= bsizes_more
;
940 if (esp
->edev
->my_bus
) {
941 bsizes_more
= prom_getintdefault(esp
->edev
->my_bus
->prom_node
,
942 "burst-sizes", 0xff);
943 if(bsizes_more
!= 0xff)
944 bsizes
&= bsizes_more
;
947 if(bsizes
== 0xff || (bsizes
& DMA_BURST16
)==0 ||
948 (bsizes
& DMA_BURST32
)==0)
949 bsizes
= (DMA_BURST32
- 1);
951 esp
->bursts
= bsizes
;
953 /* Probe the revision of this esp */
954 esp
->config1
= (ESP_CONFIG1_PENABLE
| (esp
->scsi_id
& 7));
955 esp
->config2
= (ESP_CONFIG2_SCSI2ENAB
| ESP_CONFIG2_REGPARITY
);
956 eregs
->esp_cfg2
= esp
->config2
;
957 if((eregs
->esp_cfg2
& ~(ESP_CONFIG2_MAGIC
)) !=
958 (ESP_CONFIG2_SCSI2ENAB
| ESP_CONFIG2_REGPARITY
)) {
959 printk("NCR53C90(esp100)\n");
962 eregs
->esp_cfg2
= esp
->config2
= 0;
964 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[0] = 5;
965 if(eregs
->esp_cfg3
!= 5) {
966 printk("NCR53C90A(esp100a)\n");
971 for(target
=0; target
<8; target
++)
972 esp
->config3
[target
] = 0;
973 eregs
->esp_cfg3
= esp
->prev_cfg3
= 0;
974 if(ccf
> ESP_CCF_F5
) {
975 printk("NCR53C9XF(espfast)\n");
977 eregs
->esp_cfg2
= esp
->config2
= 0;
978 esp
->sync_defp
= SYNC_DEFP_FAST
;
980 printk("NCR53C9x(esp236)\n");
982 eregs
->esp_cfg2
= esp
->config2
= 0;
987 /* Initialize the command queues */
989 esp
->disconnected_SC
= 0;
992 /* Clear the state machines. */
993 esp
->targets_present
= 0;
994 esp
->resetting_bus
= 0;
996 esp
->targets_present
= 0;
997 for(i
= 0; i
< 32; i
++)
998 esp
->espcmdlog
[i
] = 0;
1000 for(i
= 0; i
< 16; i
++) {
1001 esp
->cur_msgout
[i
] = 0;
1002 esp
->cur_msgin
[i
] = 0;
1004 esp
->prevmsgout
= esp
->prevmsgin
= 0;
1005 esp
->msgout_len
= esp
->msgin_len
= 0;
1007 /* Clear the one behind caches to hold unmatchable values. */
1008 esp
->prev_soff
= esp
->prev_stp
= esp
->prev_cfg3
= 0xff;
1009 esp
->prev_hme_dmacsr
= 0xffffffff;
1011 /* Reset the thing before we try anything... */
1012 esp_bootup_reset(esp
, eregs
);
1017 /* Detecting ESP chips on the machine. This is the simple and easy
1023 #include <asm/sun4paddr.h>
1025 int __init
esp_detect(Scsi_Host_Template
*tpnt
)
1027 static struct linux_sbus_device esp_dev
;
1028 int esps_in_use
= 0;
1032 if(sun4_esp_physaddr
) {
1033 memset (&esp_dev
, 0, sizeof(esp_dev
));
1034 esp_dev
.reg_addrs
[0].phys_addr
= sun4_esp_physaddr
;
1035 esp_dev
.irqs
[0] = 4;
1037 if (!detect_one_esp(tpnt
, &esp_dev
, NULL
, NULL
, 0, 0))
1039 printk("ESP: Total of 1 ESP hosts found, %d actually in use.\n", esps_in_use
);
1040 esps_running
= esps_in_use
;
1045 #else /* !CONFIG_SUN4 */
1047 int __init
esp_detect(Scsi_Host_Template
*tpnt
)
1049 struct linux_sbus
*sbus
;
1050 struct linux_sbus_device
*esp_dev
, *sbdev_iter
;
1051 int nesps
= 0, esps_in_use
= 0;
1058 panic("No SBUS in esp_detect()");
1061 for_each_sbus(sbus
) {
1062 for_each_sbusdev(sbdev_iter
, sbus
) {
1063 struct linux_sbus_device
*espdma
= 0;
1066 /* Is it an esp sbus device? */
1067 esp_dev
= sbdev_iter
;
1068 if(strcmp(esp_dev
->prom_name
, "esp") &&
1069 strcmp(esp_dev
->prom_name
, "SUNW,esp")) {
1070 if(!strcmp(esp_dev
->prom_name
, "SUNW,fas")) {
1074 if(!esp_dev
->child
||
1075 (strcmp(esp_dev
->prom_name
, "espdma") &&
1076 strcmp(esp_dev
->prom_name
, "dma")))
1077 continue; /* nope... */
1079 esp_dev
= esp_dev
->child
;
1080 if(strcmp(esp_dev
->prom_name
, "esp") &&
1081 strcmp(esp_dev
->prom_name
, "SUNW,esp"))
1082 continue; /* how can this happen? */
1086 if (detect_one_esp(tpnt
, esp_dev
, espdma
, sbus
, nesps
++, hme
) < 0)
1090 } /* for each sbusdev */
1091 } /* for each sbus */
1092 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps
,
1094 esps_running
= esps_in_use
;
1098 #endif /* !CONFIG_SUN4 */
1100 /* The info function will return whatever useful
1101 * information the developer sees fit. If not provided, then
1102 * the name field will be used instead.
1104 const char *esp_info(struct Scsi_Host
*host
)
1106 struct Sparc_ESP
*esp
;
1108 esp
= (struct Sparc_ESP
*) host
->hostdata
;
1111 return "Sparc ESP100 (NCR53C90)";
1113 return "Sparc ESP100A (NCR53C90A)";
1115 return "Sparc ESP236";
1117 return "Sparc ESP236-FAST";
1119 return "Sparc ESP366-HME";
1121 return "Sparc ESP100A-FAST";
1123 panic("Bogon ESP revision");
1127 /* From Wolfgang Stanglmeier's NCR scsi driver. */
1136 static void copy_mem_info(struct info_str
*info
, char *data
, int len
)
1138 if (info
->pos
+ len
> info
->length
)
1139 len
= info
->length
- info
->pos
;
1141 if (info
->pos
+ len
< info
->offset
) {
1145 if (info
->pos
< info
->offset
) {
1146 data
+= (info
->offset
- info
->pos
);
1147 len
-= (info
->offset
- info
->pos
);
1151 memcpy(info
->buffer
+ info
->pos
, data
, len
);
1156 static int copy_info(struct info_str
*info
, char *fmt
, ...)
1162 va_start(args
, fmt
);
1163 len
= vsprintf(buf
, fmt
, args
);
1166 copy_mem_info(info
, buf
, len
);
1170 static int esp_host_info(struct Sparc_ESP
*esp
, char *ptr
, off_t offset
, int len
)
1172 struct info_str info
;
1177 info
.offset
= offset
;
1180 copy_info(&info
, "Sparc ESP Host Adapter:\n");
1181 copy_info(&info
, "\tPROM node\t\t%08lx\n", (unsigned long) esp
->prom_node
);
1182 copy_info(&info
, "\tPROM name\t\t%s\n", esp
->prom_name
);
1183 copy_info(&info
, "\tESP Model\t\t");
1186 copy_info(&info
, "ESP100\n");
1189 copy_info(&info
, "ESP100A\n");
1192 copy_info(&info
, "ESP236\n");
1195 copy_info(&info
, "FAS236\n");
1198 copy_info(&info
, "FAS100A\n");
1201 copy_info(&info
, "FAST\n");
1204 copy_info(&info
, "Happy Meal FAS\n");
1208 copy_info(&info
, "Unknown!\n");
1211 copy_info(&info
, "\tDMA Revision\t\t");
1212 switch(esp
->dma
->revision
) {
1214 copy_info(&info
, "Rev 0\n");
1217 copy_info(&info
, "ESC Rev 1\n");
1220 copy_info(&info
, "Rev 1\n");
1223 copy_info(&info
, "Rev 2\n");
1226 copy_info(&info
, "Rev 3\n");
1229 copy_info(&info
, "Rev 1+\n");
1232 copy_info(&info
, "Rev HME/FAS\n");
1235 copy_info(&info
, "Unknown!\n");
1238 copy_info(&info
, "\tLive Targets\t\t[ ");
1239 for(i
= 0; i
< 15; i
++) {
1240 if(esp
->targets_present
& (1 << i
))
1241 copy_info(&info
, "%d ", i
);
1243 copy_info(&info
, "]\n\n");
1245 /* Now describe the state of each existing target. */
1246 copy_info(&info
, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
1247 for(i
= 0; i
< 15; i
++) {
1248 if(esp
->targets_present
& (1 << i
)) {
1249 Scsi_Device
*SDptr
= esp
->ehost
->host_queue
;
1251 while((SDptr
->host
!= esp
->ehost
) &&
1254 SDptr
= SDptr
->next
;
1256 copy_info(&info
, "%d\t\t", i
);
1257 copy_info(&info
, "%08lx\t", esp
->config3
[i
]);
1258 copy_info(&info
, "[%02lx,%02lx]\t\t\t", SDptr
->sync_max_offset
,
1259 SDptr
->sync_min_period
);
1260 copy_info(&info
, "%s\t\t", SDptr
->disconnect
? "yes" : "no");
1261 copy_info(&info
, "%s\n",
1262 (esp
->config3
[i
] & ESP_CONFIG3_EWIDE
) ? "yes" : "no");
1266 return info
.pos
> info
.offset
? info
.pos
- info
.offset
: 0;
1269 /* ESP proc filesystem code. */
1270 int esp_proc_info(char *buffer
, char **start
, off_t offset
, int length
,
1271 int hostno
, int inout
)
1273 struct Sparc_ESP
*esp
;
1276 return -EINVAL
; /* not yet */
1279 if(esp
->ehost
->host_no
== hostno
)
1288 return esp_host_info(esp
, buffer
, offset
, length
);
1291 static void esp_get_dmabufs(struct Sparc_ESP
*esp
, Scsi_Cmnd
*sp
)
1293 if(sp
->use_sg
== 0) {
1294 sp
->SCp
.this_residual
= sp
->request_bufflen
;
1295 sp
->SCp
.buffer
= (struct scatterlist
*) sp
->request_buffer
;
1296 sp
->SCp
.buffers_residual
= 0;
1297 sp
->SCp
.have_data_in
= mmu_get_scsi_one((char *)sp
->SCp
.buffer
,
1298 sp
->SCp
.this_residual
,
1300 sp
->SCp
.ptr
= (char *) ((unsigned long)sp
->SCp
.have_data_in
);
1302 sp
->SCp
.buffer
= (struct scatterlist
*) sp
->buffer
;
1303 sp
->SCp
.buffers_residual
= sp
->use_sg
- 1;
1304 sp
->SCp
.this_residual
= sp
->SCp
.buffer
->length
;
1305 mmu_get_scsi_sgl((struct mmu_sglist
*) sp
->SCp
.buffer
,
1306 sp
->SCp
.buffers_residual
,
1308 sp
->SCp
.ptr
= (char *) ((unsigned long)sp
->SCp
.buffer
->dvma_address
);
1312 static void esp_release_dmabufs(struct Sparc_ESP
*esp
, Scsi_Cmnd
*sp
)
1315 mmu_release_scsi_one(sp
->SCp
.have_data_in
,
1316 sp
->request_bufflen
,
1319 mmu_release_scsi_sgl((struct mmu_sglist
*)
1320 sp
->buffer
, sp
->use_sg
- 1,
1324 static void esp_restore_pointers(struct Sparc_ESP
*esp
, Scsi_Cmnd
*sp
)
1326 struct esp_pointers
*ep
= &esp
->data_pointers
[sp
->target
];
1328 sp
->SCp
.ptr
= ep
->saved_ptr
;
1329 sp
->SCp
.buffer
= ep
->saved_buffer
;
1330 sp
->SCp
.this_residual
= ep
->saved_this_residual
;
1331 sp
->SCp
.buffers_residual
= ep
->saved_buffers_residual
;
1334 static void esp_save_pointers(struct Sparc_ESP
*esp
, Scsi_Cmnd
*sp
)
1336 struct esp_pointers
*ep
= &esp
->data_pointers
[sp
->target
];
1338 ep
->saved_ptr
= sp
->SCp
.ptr
;
1339 ep
->saved_buffer
= sp
->SCp
.buffer
;
1340 ep
->saved_this_residual
= sp
->SCp
.this_residual
;
1341 ep
->saved_buffers_residual
= sp
->SCp
.buffers_residual
;
1346 * 1) Never ever panic while something is live on the bus.
1347 * If there is to be any chance of syncing the disks this
1348 * rule is to be obeyed.
1350 * 2) Any target that causes a foul condition will no longer
1351 * have synchronous transfers done to it, no questions
1354 * 3) Keep register accesses to a minimum. Think about some
1355 * day when we have Xbus machines this is running on and
1356 * the ESP chip is on the other end of the machine on a
1357 * different board from the cpu where this is running.
1360 /* Fire off a command. We assume the bus is free and that the only
1361 * case where we could see an interrupt is where we have disconnected
1362 * commands active and they are trying to reselect us.
1364 static inline void esp_check_cmd(struct Sparc_ESP
*esp
, Scsi_Cmnd
*sp
)
1366 switch(sp
->cmd_len
) {
1370 esp
->esp_slowcmd
= 0;
1374 esp
->esp_slowcmd
= 1;
1375 esp
->esp_scmdleft
= sp
->cmd_len
;
1376 esp
->esp_scmdp
= &sp
->cmnd
[0];
1381 static inline void build_sync_nego_msg(struct Sparc_ESP
*esp
, int period
, int offset
)
1383 esp
->cur_msgout
[0] = EXTENDED_MESSAGE
;
1384 esp
->cur_msgout
[1] = 3;
1385 esp
->cur_msgout
[2] = EXTENDED_SDTR
;
1386 esp
->cur_msgout
[3] = period
;
1387 esp
->cur_msgout
[4] = offset
;
1388 esp
->msgout_len
= 5;
1391 /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
1392 static inline void build_wide_nego_msg(struct Sparc_ESP
*esp
, int size
)
1394 esp
->cur_msgout
[0] = EXTENDED_MESSAGE
;
1395 esp
->cur_msgout
[1] = 2;
1396 esp
->cur_msgout
[2] = EXTENDED_WDTR
;
1399 esp
->cur_msgout
[3] = 2;
1402 esp
->cur_msgout
[3] = 1;
1406 esp
->cur_msgout
[3] = 0;
1410 esp
->msgout_len
= 4;
1413 static void esp_exec_cmd(struct Sparc_ESP
*esp
)
1415 struct sparc_dma_registers
*dregs
= esp
->dregs
;
1416 struct Sparc_ESP_regs
*eregs
= esp
->eregs
;
1419 volatile unchar
*cmdp
= esp
->esp_command
;
1420 unsigned char the_esp_command
;
1424 /* Hold off if we have disconnected commands and
1425 * an IRQ is showing...
1427 if(esp
->disconnected_SC
&& DMA_IRQ_P(dregs
))
1430 /* Grab first member of the issue queue. */
1431 SCptr
= esp
->current_SC
= remove_first_SC(&esp
->issue_SC
);
1433 /* Safe to panic here because current_SC is null. */
1435 panic("esp: esp_exec_cmd and issue queue is NULL");
1437 SDptr
= SCptr
->device
;
1439 target
= SCptr
->target
;
1442 esp
->msgout_len
= 0;
1444 /* Send it out whole, or piece by piece? The ESP
1445 * only knows how to automatically send out 6, 10,
1446 * and 12 byte commands. I used to think that the
1447 * Linux SCSI code would never throw anything other
1448 * than that to us, but then again there is the
1449 * SCSI generic driver which can send us anything.
1451 esp_check_cmd(esp
, SCptr
);
1453 /* If arbitration/selection is successful, the ESP will leave
1454 * ATN asserted, causing the target to go into message out
1455 * phase. The ESP will feed the target the identify and then
1456 * the target can only legally go to one of command,
1457 * datain/out, status, or message in phase, or stay in message
1458 * out phase (should we be trying to send a sync negotiation
1459 * message after the identify). It is not allowed to drop
1460 * BSY, but some buggy targets do and we check for this
1461 * condition in the selection complete code. Most of the time
1462 * we'll make the command bytes available to the ESP and it
1463 * will not interrupt us until it finishes command phase, we
1464 * cannot do this for command sizes the ESP does not
1465 * understand and in this case we'll get interrupted right
1466 * when the target goes into command phase.
1468 * It is absolutely _illegal_ in the presence of SCSI-2 devices
1469 * to use the ESP select w/o ATN command. When SCSI-2 devices are
1470 * present on the bus we _must_ always go straight to message out
1471 * phase with an identify message for the target. Being that
1472 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
1473 * selections should not confuse SCSI-1 we hope.
1477 /* this targets sync is known */
1479 if(SDptr
->disconnect
)
1480 *cmdp
++ = IDENTIFY(1, lun
);
1482 *cmdp
++ = IDENTIFY(0, lun
);
1484 if(esp
->esp_slowcmd
) {
1485 the_esp_command
= (ESP_CMD_SELAS
| ESP_CMD_DMA
);
1486 esp_advance_phase(SCptr
, in_slct_stop
);
1488 the_esp_command
= (ESP_CMD_SELA
| ESP_CMD_DMA
);
1489 esp_advance_phase(SCptr
, in_slct_norm
);
1491 } else if(!(esp
->targets_present
& (1<<target
)) || !(SDptr
->disconnect
)) {
1492 /* After the bootup SCSI code sends both the
1493 * TEST_UNIT_READY and INQUIRY commands we want
1494 * to at least attempt allowing the device to
1497 ESPMISC(("esp: Selecting device for first time. target=%d "
1498 "lun=%d\n", target
, SCptr
->lun
));
1499 if(!SDptr
->borken
&& !SDptr
->disconnect
)
1500 SDptr
->disconnect
= 1;
1502 *cmdp
++ = IDENTIFY(0, lun
);
1503 esp
->prevmsgout
= NOP
;
1504 esp_advance_phase(SCptr
, in_slct_norm
);
1505 the_esp_command
= (ESP_CMD_SELA
| ESP_CMD_DMA
);
1507 /* Take no chances... */
1508 SDptr
->sync_max_offset
= 0;
1509 SDptr
->sync_min_period
= 0;
1511 /* Sorry, I have had way too many problems with
1512 * various CDROM devices on ESP. -DaveM
1514 int cdrom_hwbug_wkaround
= 0;
1516 /* Never allow disconnects or synchronous transfers on
1517 * SparcStation1 and SparcStation1+. Allowing those
1518 * to be enabled seems to lockup the machine completely.
1520 if((idprom
->id_machtype
== (SM_SUN4C
| SM_4C_SS1
)) ||
1521 (idprom
->id_machtype
== (SM_SUN4C
| SM_4C_SS1PLUS
))) {
1522 /* But we are nice and allow tapes to disconnect. */
1523 if(SDptr
->type
== TYPE_TAPE
)
1524 SDptr
->disconnect
= 1;
1526 SDptr
->disconnect
= 0;
1527 SDptr
->sync_max_offset
= 0;
1528 SDptr
->sync_min_period
= 0;
1534 /* We've talked to this guy before,
1535 * but never negotiated. Let's try,
1536 * need to attempt WIDE first, before
1537 * sync nego, as per SCSI 2 standard.
1539 if(esp
->erev
== fashme
&& !SDptr
->wide
) {
1540 if(!SDptr
->borken
&&
1541 SDptr
->type
!= TYPE_ROM
) {
1542 build_wide_nego_msg(esp
, 16);
1545 goto after_nego_msg_built
;
1548 /* Fall through and try sync. */
1552 if(!SDptr
->borken
) {
1553 if((SDptr
->type
== TYPE_ROM
)) {
1554 /* Nice try sucker... */
1555 ESPMISC(("esp%d: Disabling sync for buggy "
1556 "CDROM.\n", esp
->esp_id
));
1557 cdrom_hwbug_wkaround
= 1;
1558 build_sync_nego_msg(esp
, 0, 0);
1560 build_sync_nego_msg(esp
, esp
->sync_defp
, 15);
1563 build_sync_nego_msg(esp
, 0, 0);
1568 after_nego_msg_built
:
1569 /* A fix for broken SCSI1 targets, when they disconnect
1570 * they lock up the bus and confuse ESP. So disallow
1571 * disconnects for SCSI1 targets for now until we
1572 * find a better fix.
1574 * Addendum: This is funny, I figured out what was going
1575 * on. The blotzed SCSI1 target would disconnect,
1576 * one of the other SCSI2 targets or both would be
1577 * disconnected as well. The SCSI1 target would
1578 * stay disconnected long enough that we start
1579 * up a command on one of the SCSI2 targets. As
1580 * the ESP is arbitrating for the bus the SCSI1
1581 * target begins to arbitrate as well to reselect
1582 * the ESP. The SCSI1 target refuses to drop it's
1583 * ID bit on the data bus even though the ESP is
1584 * at ID 7 and is the obvious winner for any
1585 * arbitration. The ESP is a poor sport and refuses
1586 * to lose arbitration, it will continue indefinately
1587 * trying to arbitrate for the bus and can only be
1588 * stopped via a chip reset or SCSI bus reset.
1589 * Therefore _no_ disconnects for SCSI1 targets
1590 * thank you very much. ;-)
1592 if(((SDptr
->scsi_level
< 3) && (SDptr
->type
!= TYPE_TAPE
)) ||
1593 cdrom_hwbug_wkaround
|| SDptr
->borken
) {
1594 ESPMISC((KERN_INFO
"esp%d: Disabling DISCONNECT for target %d "
1595 "lun %d\n", esp
->esp_id
, SCptr
->target
, SCptr
->lun
));
1596 SDptr
->disconnect
= 0;
1597 *cmdp
++ = IDENTIFY(0, lun
);
1599 *cmdp
++ = IDENTIFY(1, lun
);
1602 /* ESP fifo is only so big...
1603 * Make this look like a slow command.
1605 esp
->esp_slowcmd
= 1;
1606 esp
->esp_scmdleft
= SCptr
->cmd_len
;
1607 esp
->esp_scmdp
= &SCptr
->cmnd
[0];
1609 the_esp_command
= (ESP_CMD_SELAS
| ESP_CMD_DMA
);
1610 esp_advance_phase(SCptr
, in_slct_msg
);
1613 if(!esp
->esp_slowcmd
)
1614 for(i
= 0; i
< SCptr
->cmd_len
; i
++)
1615 *cmdp
++ = SCptr
->cmnd
[i
];
1618 if(esp
->erev
== fashme
)
1619 eregs
->esp_busid
= (target
& 0xf) |
1620 (ESP_BUSID_RESELID
| ESP_BUSID_CTR32BIT
);
1622 eregs
->esp_busid
= (target
& 7);
1623 if (esp
->prev_soff
!= SDptr
->sync_max_offset
||
1624 esp
->prev_stp
!= SDptr
->sync_min_period
||
1625 (esp
->erev
> esp100a
&&
1626 esp
->prev_cfg3
!= esp
->config3
[target
])) {
1627 eregs
->esp_soff
= esp
->prev_soff
= SDptr
->sync_max_offset
;
1628 eregs
->esp_stp
= esp
->prev_stp
= SDptr
->sync_min_period
;
1629 if(esp
->erev
> esp100a
)
1632 esp
->config3
[target
];
1634 i
= (cmdp
- esp
->esp_command
);
1636 if(esp
->erev
== fashme
) {
1637 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
); /* Grrr! */
1639 /* Set up the DMA and HME counters */
1640 eregs
->esp_tclow
= i
;
1641 eregs
->esp_tcmed
= 0;
1644 esp_cmd(esp
, eregs
, the_esp_command
);
1646 /* Talk about touchy hardware... */
1647 esp
->prev_hme_dmacsr
= ((esp
->prev_hme_dmacsr
|
1648 (DMA_SCSI_DISAB
| DMA_ENABLE
)) &
1651 dregs
->st_addr
= esp
->esp_command_dvma
;
1652 dregs
->cond_reg
= esp
->prev_hme_dmacsr
;
1654 /* Set up the DMA and ESP counters */
1655 eregs
->esp_tclow
= i
;
1656 eregs
->esp_tcmed
= 0;
1657 dregs
->cond_reg
= ((dregs
->cond_reg
& ~(DMA_ST_WRITE
)) | DMA_ENABLE
);
1658 if(esp
->dma
->revision
== dvmaesc1
) {
1659 if(i
) /* Workaround ESC gate array SBUS rerun bug. */
1660 dregs
->cnt
= (PAGE_SIZE
);
1662 dregs
->st_addr
= esp
->esp_command_dvma
;
1664 /* Tell ESP to "go". */
1665 esp_cmd(esp
, eregs
, the_esp_command
);
1669 /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
1670 int esp_queue(Scsi_Cmnd
*SCpnt
, void (*done
)(Scsi_Cmnd
*))
1672 struct Sparc_ESP
*esp
;
1673 struct sparc_dma_registers
*dregs
;
1675 /* Set up func ptr and initial driver cmd-phase. */
1676 SCpnt
->scsi_done
= done
;
1677 SCpnt
->SCp
.phase
= not_issued
;
1679 esp
= (struct Sparc_ESP
*) SCpnt
->host
->hostdata
;
1682 /* We use the scratch area. */
1683 ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt
->target
, SCpnt
->lun
));
1684 ESPDISC(("N<%02x,%02x>", SCpnt
->target
, SCpnt
->lun
));
1686 esp_get_dmabufs(esp
, SCpnt
);
1687 esp_save_pointers(esp
, SCpnt
); /* FIXME for tag queueing */
1689 SCpnt
->SCp
.Status
= CHECK_CONDITION
;
1690 SCpnt
->SCp
.Message
= 0xff;
1691 SCpnt
->SCp
.sent_command
= 0;
1693 /* Place into our queue. */
1694 if(SCpnt
->cmnd
[0] == REQUEST_SENSE
) {
1695 ESPQUEUE(("RQSENSE\n"));
1696 prepend_SC(&esp
->issue_SC
, SCpnt
);
1699 append_SC(&esp
->issue_SC
, SCpnt
);
1702 /* Run it now if we can. */
1703 if(!esp
->current_SC
&& !esp
->resetting_bus
)
1709 /* Only queuing supported in this ESP driver. */
1710 int esp_command(Scsi_Cmnd
*SCpnt
)
1712 struct Sparc_ESP
*esp
= (struct Sparc_ESP
*) SCpnt
->host
->hostdata
;
1714 ESPLOG(("esp%d: esp_command() called...\n", esp
->esp_id
));
1718 /* Dump driver state. */
1719 static void esp_dump_cmd(Scsi_Cmnd
*SCptr
)
1721 ESPLOG(("[tgt<%02x> lun<%02x> "
1722 "pphase<%s> cphase<%s>]",
1723 SCptr
->target
, SCptr
->lun
,
1724 phase_string(SCptr
->SCp
.sent_command
),
1725 phase_string(SCptr
->SCp
.phase
)));
1728 static void esp_dump_state(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1729 struct sparc_dma_registers
*dregs
)
1731 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
1732 #ifdef DEBUG_ESP_CMDS
1736 ESPLOG(("esp%d: dumping state\n", esp
->esp_id
));
1737 ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
1738 esp
->esp_id
, dregs
->cond_reg
, dregs
->st_addr
));
1739 ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1740 esp
->esp_id
, esp
->sreg
, esp
->seqreg
, esp
->ireg
));
1741 ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1742 esp
->esp_id
, eregs
->esp_status
, eregs
->esp_sstep
, eregs
->esp_intrpt
));
1743 #ifdef DEBUG_ESP_CMDS
1744 printk("esp%d: last ESP cmds [", esp
->esp_id
);
1745 i
= (esp
->espcmdent
- 1) & 31;
1747 esp_print_cmd(esp
->espcmdlog
[i
]);
1751 esp_print_cmd(esp
->espcmdlog
[i
]);
1755 esp_print_cmd(esp
->espcmdlog
[i
]);
1759 esp_print_cmd(esp
->espcmdlog
[i
]);
1762 #endif /* (DEBUG_ESP_CMDS) */
1765 ESPLOG(("esp%d: current command ", esp
->esp_id
));
1766 esp_dump_cmd(SCptr
);
1769 SCptr
= esp
->disconnected_SC
;
1770 ESPLOG(("esp%d: disconnected ", esp
->esp_id
));
1772 esp_dump_cmd(SCptr
);
1773 SCptr
= (Scsi_Cmnd
*) SCptr
->host_scribble
;
1778 /* Abort a command. */
1779 int esp_abort(Scsi_Cmnd
*SCptr
)
1781 struct Sparc_ESP
*esp
= (struct Sparc_ESP
*) SCptr
->host
->hostdata
;
1782 struct Sparc_ESP_regs
*eregs
= esp
->eregs
;
1783 struct sparc_dma_registers
*dregs
= esp
->dregs
;
1786 ESPLOG(("esp%d: Aborting command\n", esp
->esp_id
));
1787 esp_dump_state(esp
, eregs
, dregs
);
1789 /* Wheee, if this is the current command on the bus, the
1790 * best we can do is assert ATN and wait for msgout phase.
1791 * This should even fix a hung SCSI bus when we lose state
1792 * in the driver and timeout because the eventual phase change
1793 * will cause the ESP to (eventually) give an interrupt.
1795 if(esp
->current_SC
== SCptr
) {
1796 esp
->cur_msgout
[0] = ABORT
;
1797 esp
->msgout_len
= 1;
1798 esp
->msgout_ctr
= 0;
1799 esp_cmd(esp
, eregs
, ESP_CMD_SATN
);
1800 return SCSI_ABORT_PENDING
;
1803 /* If it is still in the issue queue then we can safely
1804 * call the completion routine and report abort success.
1806 don
= (dregs
->cond_reg
& DMA_INT_ENAB
);
1812 Scsi_Cmnd
**prev
, *this;
1813 for(prev
= (&esp
->issue_SC
), this = esp
->issue_SC
;
1815 prev
= (Scsi_Cmnd
**) &(this->host_scribble
),
1816 this = (Scsi_Cmnd
*) this->host_scribble
) {
1818 *prev
= (Scsi_Cmnd
*) this->host_scribble
;
1819 this->host_scribble
= NULL
;
1820 esp_release_dmabufs(esp
, this);
1821 this->result
= DID_ABORT
<< 16;
1825 return SCSI_ABORT_SUCCESS
;
1830 /* Yuck, the command to abort is disconnected, it is not
1831 * worth trying to abort it now if something else is live
1832 * on the bus at this time. So, we let the SCSI code wait
1833 * a little bit and try again later.
1835 if(esp
->current_SC
) {
1838 return SCSI_ABORT_BUSY
;
1841 /* It's disconnected, we have to reconnect to re-establish
1842 * the nexus and tell the device to abort. However, we really
1843 * cannot 'reconnect' per se, therefore we tell the upper layer
1844 * the safest thing we can. This is, wait a bit, if nothing
1845 * happens, we are really hung so reset the bus.
1850 return SCSI_ABORT_SNOOZE
;
1853 /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
1854 * arrived indicating the end of the SCSI bus reset. Our job
1855 * is to clean out the command queues and begin re-execution
1856 * of SCSI commands once more.
1858 static int esp_finish_reset(struct Sparc_ESP
*esp
,
1859 struct Sparc_ESP_regs
*eregs
,
1860 struct sparc_dma_registers
*dregs
)
1862 Scsi_Cmnd
*sp
= esp
->current_SC
;
1864 /* Clean up currently executing command, if any. */
1866 esp_release_dmabufs(esp
, sp
);
1867 sp
->result
= (DID_RESET
<< 16);
1869 esp
->current_SC
= NULL
;
1872 /* Clean up disconnected queue, they have been invalidated
1875 if (esp
->disconnected_SC
) {
1876 while((sp
= remove_first_SC(&esp
->disconnected_SC
)) != NULL
) {
1877 esp_release_dmabufs(esp
, sp
);
1878 sp
->result
= (DID_RESET
<< 16);
1883 /* SCSI bus reset is complete. */
1884 esp
->resetting_bus
= 0;
1886 /* Ok, now it is safe to get commands going once more. */
1893 static int esp_do_resetbus(struct Sparc_ESP
*esp
,
1894 struct Sparc_ESP_regs
*eregs
,
1895 struct sparc_dma_registers
*dregs
)
1897 ESPLOG(("esp%d: Resetting scsi bus\n", esp
->esp_id
));
1898 esp
->resetting_bus
= 1;
1899 esp_cmd(esp
, eregs
, ESP_CMD_RS
);
1904 /* Reset ESP chip, reset hanging bus, then kill active and
1905 * disconnected commands for targets without soft reset.
1907 int esp_reset(Scsi_Cmnd
*SCptr
, unsigned int how
)
1909 struct Sparc_ESP
*esp
= (struct Sparc_ESP
*) SCptr
->host
->hostdata
;
1911 (void) esp_do_resetbus(esp
, esp
->eregs
, esp
->dregs
);
1912 return SCSI_RESET_PENDING
;
1915 /* Internal ESP done function. */
1916 static void esp_done(struct Sparc_ESP
*esp
, int error
)
1920 if(esp
->current_SC
) {
1921 done_SC
= esp
->current_SC
;
1922 esp
->current_SC
= NULL
;
1923 esp_release_dmabufs(esp
, done_SC
);
1924 done_SC
->result
= error
;
1925 done_SC
->scsi_done(done_SC
);
1927 /* Bus is free, issue any commands in the queue. */
1928 if(esp
->issue_SC
&& !esp
->current_SC
)
1931 /* Panic is safe as current_SC is null so we may still
1932 * be able to accept more commands to sync disk buffers.
1934 ESPLOG(("panicing\n"));
1935 panic("esp: done() called with NULL esp->current_SC");
1939 /* Wheee, ESP interrupt engine. */
1941 /* Forward declarations. */
1942 static int esp_do_phase_determine(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1943 struct sparc_dma_registers
*dregs
);
1944 static int esp_do_data_finale(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1945 struct sparc_dma_registers
*dregs
);
1946 static int esp_select_complete(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1947 struct sparc_dma_registers
*dregs
);
1948 static int esp_do_status(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1949 struct sparc_dma_registers
*dregs
);
1950 static int esp_do_msgin(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1951 struct sparc_dma_registers
*dregs
);
1952 static int esp_do_msgindone(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1953 struct sparc_dma_registers
*dregs
);
1954 static int esp_do_msgout(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1955 struct sparc_dma_registers
*dregs
);
1956 static int esp_do_cmdbegin(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
1957 struct sparc_dma_registers
*dregs
);
1959 #define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
1960 #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
1962 /* Read any bytes found in the FAS366 fifo, storing them into
1963 * the ESP driver software state structure.
1965 static void hme_fifo_read(struct Sparc_ESP
*esp
,
1966 struct Sparc_ESP_regs
*eregs
)
1968 unsigned long count
= 0;
1969 unchar status
= esp
->sreg
;
1971 /* Cannot safely frob the fifo for these following cases, but
1972 * we must always read the fifo when the reselect interrupt
1975 if(((esp
->ireg
& ESP_INTR_RSEL
) == 0) &&
1976 (sreg_datainp(status
) ||
1977 sreg_dataoutp(status
) ||
1979 esp
->current_SC
->SCp
.phase
== in_data_done
))) {
1980 ESPHME(("<wkaround_skipped>"));
1982 unsigned long fcnt
= eregs
->esp_fflags
& ESP_FF_FBYTES
;
1984 /* The HME stores bytes in multiples of 2 in the fifo. */
1985 ESPHME(("hme_fifo[fcnt=%d", (int)fcnt
));
1987 esp
->hme_fifo_workaround_buffer
[count
++] = eregs
->esp_fdata
;
1988 esp
->hme_fifo_workaround_buffer
[count
++] = eregs
->esp_fdata
;
1989 ESPHME(("<%02x,%02x>", esp
->hme_fifo_workaround_buffer
[count
-2], esp
->hme_fifo_workaround_buffer
[count
-1]));
1992 if(eregs
->esp_status2
& ESP_STAT2_F1BYTE
) {
1993 ESPHME(("<poke_byte>"));
1994 eregs
->esp_fdata
= 0;
1995 esp
->hme_fifo_workaround_buffer
[count
++] = eregs
->esp_fdata
;
1996 ESPHME(("<%02x,0x00>", esp
->hme_fifo_workaround_buffer
[count
-1]));
1997 ESPHME(("CMD_FLUSH"));
1998 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2000 ESPHME(("no_xtra_byte"));
2003 ESPHME(("wkarnd_cnt=%d]", (int)count
));
2004 esp
->hme_fifo_workaround_count
= count
;
2007 static inline void hme_fifo_push(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2008 unchar
*bytes
, unchar count
)
2010 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2012 eregs
->esp_fdata
= *bytes
++;
2013 eregs
->esp_fdata
= 0;
2018 /* We try to avoid some interrupts by jumping ahead and see if the ESP
2019 * has gotten far enough yet. Hence the following.
2021 static inline int skipahead1(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2022 struct sparc_dma_registers
*dregs
,
2023 Scsi_Cmnd
*scp
, int prev_phase
, int new_phase
)
2025 if(scp
->SCp
.sent_command
!= prev_phase
)
2027 if(DMA_IRQ_P(dregs
)) {
2028 /* Yes, we are able to save an interrupt. */
2029 if (esp
->erev
== fashme
)
2030 esp
->sreg2
= eregs
->esp_status2
;
2031 esp
->sreg
= (eregs
->esp_status
& ~(ESP_STAT_INTR
));
2032 esp
->ireg
= eregs
->esp_intrpt
;
2033 if(esp
->erev
== fashme
) {
2034 /* This chip is really losing. */
2036 /* Must latch fifo before reading the interrupt
2037 * register else garbage ends up in the FIFO
2038 * which confuses the driver utterly.
2039 * Happy Meal indeed....
2041 ESPHME(("fifo_workaround]"));
2042 if(!(esp
->sreg2
& ESP_STAT2_FEMPTY
) ||
2043 (esp
->sreg2
& ESP_STAT2_F1BYTE
))
2044 hme_fifo_read(esp
, eregs
);
2046 if(!(esp
->ireg
& ESP_INTR_SR
))
2049 return do_reset_complete
;
2051 /* Ho hum, target is taking forever... */
2052 scp
->SCp
.sent_command
= new_phase
; /* so we don't recurse... */
2056 static inline int skipahead2(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2057 struct sparc_dma_registers
*dregs
,
2058 Scsi_Cmnd
*scp
, int prev_phase1
, int prev_phase2
,
2061 if(scp
->SCp
.sent_command
!= prev_phase1
&&
2062 scp
->SCp
.sent_command
!= prev_phase2
)
2064 if(DMA_IRQ_P(dregs
)) {
2065 /* Yes, we are able to save an interrupt. */
2066 if (esp
->erev
== fashme
)
2067 esp
->sreg2
= eregs
->esp_status2
;
2068 esp
->sreg
= (eregs
->esp_status
& ~(ESP_STAT_INTR
));
2069 esp
->ireg
= eregs
->esp_intrpt
;
2070 if(esp
->erev
== fashme
) {
2071 /* This chip is really losing. */
2074 /* Must latch fifo before reading the interrupt
2075 * register else garbage ends up in the FIFO
2076 * which confuses the driver utterly.
2077 * Happy Meal indeed....
2079 ESPHME(("fifo_workaround]"));
2080 if(!(esp
->sreg2
& ESP_STAT2_FEMPTY
) ||
2081 (esp
->sreg2
& ESP_STAT2_F1BYTE
))
2082 hme_fifo_read(esp
, eregs
);
2084 if(!(esp
->ireg
& ESP_INTR_SR
))
2087 return do_reset_complete
;
2089 /* Ho hum, target is taking forever... */
2090 scp
->SCp
.sent_command
= new_phase
; /* so we don't recurse... */
2094 /* Now some dma helpers. */
2095 static inline void dma_setup(struct sparc_dma_registers
*dregs
, enum dvma_rev drev
,
2096 __u32 addr
, int count
, int write
)
2098 unsigned long nreg
= dregs
->cond_reg
;
2100 nreg
|= DMA_ST_WRITE
;
2102 nreg
&= ~(DMA_ST_WRITE
);
2104 dregs
->cond_reg
= nreg
;
2105 if(drev
== dvmaesc1
) {
2106 /* This ESC gate array sucks! */
2108 __u32 dest
= src
+ count
;
2110 if(dest
& (PAGE_SIZE
- 1))
2111 count
= PAGE_ALIGN(count
);
2114 dregs
->st_addr
= addr
;
2117 static inline void dma_drain(struct sparc_dma_registers
*dregs
, enum dvma_rev drev
)
2121 if(dregs
->cond_reg
& DMA_FIFO_ISDRAIN
) {
2124 dregs
->cond_reg
|= DMA_FIFO_STDRAIN
;
2128 while(dregs
->cond_reg
& DMA_FIFO_ISDRAIN
)
2134 static inline void dma_invalidate(struct Sparc_ESP
*esp
,
2135 struct sparc_dma_registers
*dregs
,
2140 if(drev
== dvmahme
) {
2141 dregs
->cond_reg
= DMA_RST_SCSI
;
2143 esp
->prev_hme_dmacsr
= ((esp
->prev_hme_dmacsr
|
2144 (DMA_PARITY_OFF
| DMA_2CLKS
|
2145 DMA_SCSI_DISAB
| DMA_INT_ENAB
)) &
2146 ~(DMA_ST_WRITE
| DMA_ENABLE
));
2148 dregs
->cond_reg
= 0;
2149 dregs
->cond_reg
= esp
->prev_hme_dmacsr
;
2151 /* This is necessary to avoid having the SCSI channel
2152 * engine lock up on us.
2156 while(dregs
->cond_reg
& DMA_PEND_READ
)
2159 tmp
= dregs
->cond_reg
;
2160 tmp
&= ~(DMA_ENABLE
| DMA_ST_WRITE
| DMA_BCNT_ENAB
);
2161 tmp
|= DMA_FIFO_INV
;
2162 dregs
->cond_reg
= tmp
;
2163 dregs
->cond_reg
= (tmp
& ~(DMA_FIFO_INV
));
2167 static inline void dma_flashclear(struct Sparc_ESP
*esp
,
2168 struct sparc_dma_registers
*dregs
,
2171 dma_drain(dregs
, drev
);
2172 dma_invalidate(esp
, dregs
, drev
);
2175 static inline int dma_can_transfer(Scsi_Cmnd
*sp
, enum dvma_rev drev
)
2177 __u32 base
, end
, sz
;
2179 if(drev
== dvmarev3
) {
2180 sz
= sp
->SCp
.this_residual
;
2184 base
= ((__u32
)((unsigned long)sp
->SCp
.ptr
));
2185 base
&= (0x1000000 - 1);
2186 end
= (base
+ sp
->SCp
.this_residual
);
2194 /* Misc. esp helper macros. */
2195 #define esp_setcount(__eregs, __cnt, __hme) \
2196 (__eregs)->esp_tclow = ((__cnt) & 0xff); \
2197 (__eregs)->esp_tcmed = (((__cnt) >> 8) & 0xff); \
2199 (__eregs)->fas_rlo = 0; \
2200 (__eregs)->fas_rhi = 0; \
2203 #define esp_getcount(__eregs) \
2204 ((((__eregs)->esp_tclow)&0xff) | \
2205 ((((__eregs)->esp_tcmed)&0xff) << 8))
2207 #define fcount(__esp, __eregs) \
2208 (((__esp)->erev == fashme) ? \
2209 (__esp)->hme_fifo_workaround_count : \
2210 (__eregs)->esp_fflags & ESP_FF_FBYTES)
2212 #define fnzero(__esp, __eregs) \
2213 (((__esp)->erev == fashme) ? 0 : \
2214 (__eregs)->esp_fflags & ESP_FF_ONOTZERO)
2216 /* XXX speculative nops unnecessary when continuing amidst a data phase
2217 * XXX even on esp100!!! another case of flooding the bus with I/O reg
2220 #define esp_maybe_nop(__esp, __eregs) \
2221 if((__esp)->erev == esp100) \
2222 esp_cmd((__esp), (__eregs), ESP_CMD_NULL)
2224 #define sreg_to_dataphase(__sreg) \
2225 ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
2227 /* The ESP100 when in synchronous data phase, can mistake a long final
2228 * REQ pulse from the target as an extra byte, it places whatever is on
2229 * the data lines into the fifo. For now, we will assume when this
2230 * happens that the target is a bit quirky and we don't want to
2231 * be talking synchronously to it anyways. Regardless, we need to
2232 * tell the ESP to eat the extraneous byte so that we can proceed
2233 * to the next phase.
2235 static inline int esp100_sync_hwbug(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2236 Scsi_Cmnd
*sp
, int fifocnt
)
2238 /* Do not touch this piece of code. */
2239 if((!(esp
->erev
== esp100
)) ||
2240 (!(sreg_datainp((esp
->sreg
= eregs
->esp_status
)) && !fifocnt
) &&
2241 !(sreg_dataoutp(esp
->sreg
) && !fnzero(esp
, eregs
)))) {
2242 if(sp
->SCp
.phase
== in_dataout
)
2243 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2246 /* Async mode for this guy. */
2247 build_sync_nego_msg(esp
, 0, 0);
2249 /* Ack the bogus byte, but set ATN first. */
2250 esp_cmd(esp
, eregs
, ESP_CMD_SATN
);
2251 esp_cmd(esp
, eregs
, ESP_CMD_MOK
);
2256 /* This closes the window during a selection with a reselect pending, because
2257 * we use DMA for the selection process the FIFO should hold the correct
2258 * contents if we get reselected during this process. So we just need to
2259 * ack the possible illegal cmd interrupt pending on the esp100.
2261 static inline int esp100_reconnect_hwbug(struct Sparc_ESP
*esp
,
2262 struct Sparc_ESP_regs
*eregs
)
2264 volatile unchar junk
;
2266 if(esp
->erev
!= esp100
)
2268 junk
= eregs
->esp_intrpt
;
2269 if(junk
& ESP_INTR_SR
)
2274 /* This verifies the BUSID bits during a reselection so that we know which
2275 * target is talking to us.
2277 static inline int reconnect_target(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
)
2279 int it
, me
= esp
->scsi_id_mask
, targ
= 0;
2281 if(2 != fcount(esp
, eregs
))
2283 if(esp
->erev
== fashme
) {
2284 /* HME does not latch it's own BUS ID bits during
2285 * a reselection. Also the target number is given
2286 * as an unsigned char, not as a sole bit number
2287 * like the other ESP's do.
2288 * Happy Meal indeed....
2290 targ
= esp
->hme_fifo_workaround_buffer
[0];
2292 it
= eregs
->esp_fdata
;
2304 /* This verifies the identify from the target so that we know which lun is
2305 * being reconnected.
2307 static inline int reconnect_lun(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
)
2311 if((esp
->sreg
& ESP_STAT_PMASK
) != ESP_MIP
)
2313 if(esp
->erev
== fashme
)
2314 lun
= esp
->hme_fifo_workaround_buffer
[1];
2316 lun
= eregs
->esp_fdata
;
2318 /* Yes, you read this correctly. We report lun of zero
2319 * if we see parity error. ESP reports parity error for
2320 * the lun byte, and this is the only way to hope to recover
2321 * because the target is connected.
2323 if(esp
->sreg
& ESP_STAT_PERR
)
2326 /* Check for illegal bits being set in the lun. */
2327 if((lun
& 0x40) || !(lun
& 0x80))
2333 /* This puts the driver in a state where it can revitalize a command that
2334 * is being continued due to reselection.
2336 static inline void esp_connect(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2339 Scsi_Device
*dp
= sp
->device
;
2341 if(esp
->prev_soff
!= dp
->sync_max_offset
||
2342 esp
->prev_stp
!= dp
->sync_min_period
||
2343 (esp
->erev
> esp100a
&&
2344 esp
->prev_cfg3
!= esp
->config3
[sp
->target
])) {
2345 eregs
->esp_soff
= esp
->prev_soff
= dp
->sync_max_offset
;
2346 eregs
->esp_stp
= esp
->prev_stp
= dp
->sync_min_period
;
2347 if(esp
->erev
> esp100a
)
2350 esp
->config3
[sp
->target
];
2352 esp
->current_SC
= sp
;
2355 /* This will place the current working command back into the issue queue
2356 * if we are to receive a reselection amidst a selection attempt.
2358 static inline void esp_reconnect(struct Sparc_ESP
*esp
, Scsi_Cmnd
*sp
)
2360 if(!esp
->disconnected_SC
)
2361 ESPLOG(("esp%d: Weird, being reselected but disconnected "
2362 "command queue is empty.\n", esp
->esp_id
));
2364 esp
->current_SC
= 0;
2365 sp
->SCp
.phase
= not_issued
;
2366 append_SC(&esp
->issue_SC
, sp
);
2369 /* Begin message in phase. */
2370 static int esp_do_msgin(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2371 struct sparc_dma_registers
*dregs
)
2373 /* Must be very careful with the fifo on the HME */
2374 if((esp
->erev
!= fashme
) || !(eregs
->esp_status2
& ESP_STAT2_FEMPTY
))
2375 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2376 esp_maybe_nop(esp
, eregs
);
2377 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
2380 esp_advance_phase(esp
->current_SC
, in_msgindone
);
2384 /* This uses various DMA csr fields and the fifo flags count value to
2385 * determine how many bytes were successfully sent/received by the ESP.
2387 static inline int esp_bytes_sent(struct Sparc_ESP
*esp
,
2388 struct sparc_dma_registers
*dregs
,
2391 int rval
= dregs
->st_addr
- esp
->esp_command_dvma
;
2393 if(esp
->dma
->revision
== dvmarev1
)
2394 rval
-= (4 - ((dregs
->cond_reg
& DMA_READ_AHEAD
)>>11));
2395 return rval
- fifo_count
;
2398 static inline void advance_sg(Scsi_Cmnd
*sp
)
2401 --sp
->SCp
.buffers_residual
;
2402 sp
->SCp
.this_residual
= sp
->SCp
.buffer
->length
;
2403 sp
->SCp
.ptr
= (char *)((unsigned long)sp
->SCp
.buffer
->dvma_address
);
2406 /* Please note that the way I've coded these routines is that I _always_
2407 * check for a disconnect during any and all information transfer
2408 * phases. The SCSI standard states that the target _can_ cause a BUS
2409 * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
2410 * that during information transfer phases the target controls every
2411 * change in phase, the only thing the initiator can do is "ask" for
2412 * a message out phase by driving ATN true. The target can, and sometimes
2413 * will, completely ignore this request so we cannot assume anything when
2414 * we try to force a message out phase to abort/reset a target. Most of
2415 * the time the target will eventually be nice and go to message out, so
2416 * we may have to hold on to our state about what we want to tell the target
2417 * for some period of time.
2420 /* I think I have things working here correctly. Even partial transfers
2421 * within a buffer or sub-buffer should not upset us at all no matter
2422 * how bad the target and/or ESP fucks things up.
2424 static int esp_do_data(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2425 struct sparc_dma_registers
*dregs
)
2427 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
2428 int thisphase
, hmuch
;
2430 ESPDATA(("esp_do_data: "));
2431 esp_maybe_nop(esp
, eregs
);
2432 thisphase
= sreg_to_dataphase(esp
->sreg
);
2433 esp_advance_phase(SCptr
, thisphase
);
2434 ESPDATA(("newphase<%s> ", (thisphase
== in_datain
) ? "DATAIN" : "DATAOUT"));
2435 hmuch
= dma_can_transfer(SCptr
, esp
->dma
->revision
);
2436 ESPDATA(("hmuch<%d> ", hmuch
));
2437 esp
->current_transfer_size
= hmuch
;
2438 if(esp
->erev
== fashme
) {
2439 unsigned long tmp
= esp
->prev_hme_dmacsr
;
2441 /* Always set the ESP count registers first. */
2442 esp_setcount(eregs
, hmuch
, 1);
2444 /* Get the DMA csr computed. */
2445 tmp
|= (DMA_SCSI_DISAB
| DMA_ENABLE
);
2446 if (thisphase
== in_datain
)
2447 tmp
|= DMA_ST_WRITE
;
2449 tmp
&= ~(DMA_ST_WRITE
);
2450 esp
->prev_hme_dmacsr
= tmp
;
2452 if (thisphase
== in_datain
) {
2454 esp_cmd(esp
, eregs
, ESP_CMD_DMA
| ESP_CMD_TI
);
2456 esp_cmd(esp
, eregs
, ESP_CMD_DMA
| ESP_CMD_TI
);
2459 dregs
->st_addr
= ((__u32
)((unsigned long)SCptr
->SCp
.ptr
));
2460 dregs
->cond_reg
= esp
->prev_hme_dmacsr
;
2462 esp_setcount(eregs
, hmuch
, 0);
2463 dma_setup(dregs
, esp
->dma
->revision
,
2464 ((__u32
)((unsigned long)SCptr
->SCp
.ptr
)),
2465 hmuch
, (thisphase
== in_datain
));
2466 ESPDATA(("DMA|TI --> do_intr_end\n"));
2467 esp_cmd(esp
, eregs
, ESP_CMD_DMA
| ESP_CMD_TI
);
2472 /* See how successful the data transfer was. */
2473 static int esp_do_data_finale(struct Sparc_ESP
*esp
,
2474 struct Sparc_ESP_regs
*eregs
,
2475 struct sparc_dma_registers
*dregs
)
2477 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
2478 int bogus_data
= 0, bytes_sent
= 0, fifocnt
, ecount
= 0;
2480 ESPDATA(("esp_do_data_finale: "));
2482 if(SCptr
->SCp
.phase
== in_datain
) {
2483 if(esp
->sreg
& ESP_STAT_PERR
) {
2484 /* Yuck, parity error. The ESP asserts ATN
2485 * so that we can go to message out phase
2486 * immediately and inform the target that
2487 * something bad happened.
2489 ESPLOG(("esp%d: data bad parity detected.\n",
2491 esp
->cur_msgout
[0] = INITIATOR_ERROR
;
2492 esp
->msgout_len
= 1;
2494 dma_drain(dregs
, esp
->dma
->revision
);
2496 dma_invalidate(esp
, dregs
, esp
->dma
->revision
);
2498 /* This could happen for the above parity error case. */
2499 if(!(esp
->ireg
== ESP_INTR_BSERV
)) {
2500 /* Please go to msgout phase, please please please... */
2501 ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
2503 return esp_do_phase_determine(esp
, eregs
, dregs
);
2506 /* Check for partial transfers and other horrible events.
2507 * Note, here we read the real fifo flags register even
2508 * on HME broken adapters because we skip the HME fifo
2509 * workaround code in esp_handle() if we are doing data
2510 * phase things. We don't want to fuck directly with
2511 * the fifo like that, especially if doing syncronous
2512 * transfers! Also, will need to double the count on
2513 * HME if we are doing wide transfers, as the HME fifo
2514 * will move and count 16-bit quantities during wide data.
2515 * SMCC _and_ Qlogic can both bite me.
2517 fifocnt
= eregs
->esp_fflags
& ESP_FF_FBYTES
;
2518 if(esp
->erev
!= fashme
)
2519 ecount
= esp_getcount(eregs
);
2520 bytes_sent
= esp
->current_transfer_size
;
2522 ESPDATA(("trans_sz=%d, ", bytes_sent
));
2523 if(esp
->erev
== fashme
) {
2524 if(!(esp
->sreg
& ESP_STAT_TCNT
)) {
2525 ecount
= esp_getcount(eregs
);
2526 bytes_sent
-= ecount
;
2529 /* Always subtract any cruft remaining in the FIFO. */
2530 if(esp
->prev_cfg3
& ESP_CONFIG3_EWIDE
)
2532 if(SCptr
->SCp
.phase
== in_dataout
)
2533 bytes_sent
-= fifocnt
;
2535 /* I have an IBM disk which exhibits the following
2536 * behavior during writes to it. It disconnects in
2537 * the middle of a partial transfer, the current sglist
2538 * buffer is 1024 bytes, the disk stops data transfer
2541 * However the FAS366 reports that 32 more bytes were
2542 * transferred than really were. This is precisely
2543 * the size of a fully loaded FIFO in wide scsi mode.
2544 * The FIFO state recorded indicates that it is empty.
2546 * I have no idea if this is a bug in the FAS366 chip
2547 * or a bug in the firmware on this IBM disk. In any
2548 * event the following seems to be a good workaround. -DaveM
2550 if (bytes_sent
!= esp
->current_transfer_size
&&
2551 SCptr
->SCp
.phase
== in_dataout
) {
2552 int mask
= (64 - 1);
2554 if((esp
->prev_cfg3
& ESP_CONFIG3_EWIDE
) == 0)
2557 if (bytes_sent
& mask
)
2558 bytes_sent
-= (bytes_sent
& mask
);
2561 if(!(esp
->sreg
& ESP_STAT_TCNT
))
2562 bytes_sent
-= ecount
;
2563 if(SCptr
->SCp
.phase
== in_dataout
)
2564 bytes_sent
-= fifocnt
;
2567 ESPDATA(("bytes_sent=%d, ", bytes_sent
));
2569 /* If we were in synchronous mode, check for peculiarities. */
2570 if(esp
->erev
== fashme
) {
2571 if(SCptr
->device
->sync_max_offset
) {
2572 if(SCptr
->SCp
.phase
== in_dataout
)
2573 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2575 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2578 if(SCptr
->device
->sync_max_offset
)
2579 bogus_data
= esp100_sync_hwbug(esp
, eregs
, SCptr
, fifocnt
);
2581 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2584 /* Until we are sure of what has happened, we are certainly
2587 esp_advance_phase(SCptr
, in_the_dark
);
2589 if(bytes_sent
< 0) {
2590 /* I've seen this happen due to lost state in this
2591 * driver. No idea why it happened, but allowing
2592 * this value to be negative caused things to
2593 * lock up. This allows greater chance of recovery.
2594 * In fact every time I've seen this, it has been
2595 * a driver bug without question.
2597 ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp
->esp_id
));
2598 ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
2600 esp
->current_transfer_size
, fifocnt
, ecount
));
2601 ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
2603 SCptr
->use_sg
, SCptr
->SCp
.ptr
, SCptr
->SCp
.this_residual
));
2604 ESPLOG(("esp%d: Forcing async for target %d\n", esp
->esp_id
,
2606 SCptr
->device
->borken
= 1;
2607 SCptr
->device
->sync
= 0;
2611 /* Update the state of our transfer. */
2612 SCptr
->SCp
.ptr
+= bytes_sent
;
2613 SCptr
->SCp
.this_residual
-= bytes_sent
;
2614 if(SCptr
->SCp
.this_residual
< 0) {
2616 ESPLOG(("esp%d: Data transfer overrun.\n", esp
->esp_id
));
2617 SCptr
->SCp
.this_residual
= 0;
2620 /* Maybe continue. */
2622 ESPDATA(("!bogus_data, "));
2623 /* NO MATTER WHAT, we advance the scatterlist,
2624 * if the target should decide to disconnect
2625 * in between scatter chunks (which is common)
2626 * we could die horribly! I used to have the sg
2627 * advance occur only if we are going back into
2628 * (or are staying in) a data phase, you can
2629 * imagine the hell I went through trying to
2632 if(SCptr
->use_sg
&& !SCptr
->SCp
.this_residual
)
2634 if(sreg_datainp(esp
->sreg
) || sreg_dataoutp(esp
->sreg
)) {
2635 ESPDATA(("to more data\n"));
2636 return esp_do_data(esp
, eregs
, dregs
);
2638 ESPDATA(("to new phase\n"));
2639 return esp_do_phase_determine(esp
, eregs
, dregs
);
2641 /* Bogus data, just wait for next interrupt. */
2642 ESPLOG(("esp%d: bogus_data during end of data phase\n",
2647 /* We received a non-good status return at the end of
2648 * running a SCSI command. This is used to decide if
2649 * we should clear our synchronous transfer state for
2650 * such a device when that happens.
2652 * The idea is that when spinning up a disk or rewinding
2653 * a tape, we don't want to go into a loop re-negotiating
2654 * synchronous capabilities over and over.
2656 static int esp_should_clear_sync(Scsi_Cmnd
*sp
)
2658 unchar cmd1
= sp
->cmnd
[0];
2659 unchar cmd2
= sp
->data_cmnd
[0];
2661 /* These cases are for spinning up a disk and
2662 * waiting for that spinup to complete.
2664 if(cmd1
== START_STOP
||
2668 if(cmd1
== TEST_UNIT_READY
||
2669 cmd2
== TEST_UNIT_READY
)
2672 /* One more special case for SCSI tape drives,
2673 * this is what is used to probe the device for
2674 * completion of a rewind or tape load operation.
2676 if(sp
->device
->type
== TYPE_TAPE
) {
2677 if(cmd1
== MODE_SENSE
||
2685 /* Either a command is completing or a target is dropping off the bus
2686 * to continue the command in the background so we can do other work.
2688 static int esp_do_freebus(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2689 struct sparc_dma_registers
*dregs
)
2691 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
2694 rval
= skipahead2(esp
, eregs
, dregs
, SCptr
, in_status
, in_msgindone
, in_freeing
);
2697 if(esp
->ireg
!= ESP_INTR_DC
) {
2698 ESPLOG(("esp%d: Target will not disconnect\n", esp
->esp_id
));
2699 return do_reset_bus
; /* target will not drop BSY... */
2701 esp
->msgout_len
= 0;
2702 esp
->prevmsgout
= NOP
;
2703 if(esp
->prevmsgin
== COMMAND_COMPLETE
) {
2704 /* Normal end of nexus. */
2705 if(esp
->disconnected_SC
|| (esp
->erev
== fashme
))
2706 esp_cmd(esp
, eregs
, ESP_CMD_ESEL
);
2708 if(SCptr
->SCp
.Status
!= GOOD
&&
2709 SCptr
->SCp
.Status
!= CONDITION_GOOD
&&
2710 ((1<<SCptr
->target
) & esp
->targets_present
) &&
2711 SCptr
->device
->sync
&&
2712 SCptr
->device
->sync_max_offset
) {
2713 /* SCSI standard says that the synchronous capabilities
2714 * should be renegotiated at this point. Most likely
2715 * we are about to request sense from this target
2716 * in which case we want to avoid using sync
2717 * transfers until we are sure of the current target
2720 ESPMISC(("esp: Status <%d> for target %d lun %d\n",
2721 SCptr
->SCp
.Status
, SCptr
->target
, SCptr
->lun
));
2723 /* But don't do this when spinning up a disk at
2724 * boot time while we poll for completion as it
2725 * fills up the console with messages. Also, tapes
2726 * can report not ready many times right after
2727 * loading up a tape.
2729 if(esp_should_clear_sync(SCptr
) != 0)
2730 SCptr
->device
->sync
= 0;
2732 ESPDISC(("F<%02x,%02x>", SCptr
->target
, SCptr
->lun
));
2733 esp_done(esp
, ((SCptr
->SCp
.Status
& 0xff) |
2734 ((SCptr
->SCp
.Message
& 0xff)<<8) |
2736 } else if(esp
->prevmsgin
== DISCONNECT
) {
2737 /* Normal disconnect. */
2738 esp_cmd(esp
, eregs
, ESP_CMD_ESEL
);
2739 ESPDISC(("D<%02x,%02x>", SCptr
->target
, SCptr
->lun
));
2740 append_SC(&esp
->disconnected_SC
, SCptr
);
2741 esp
->current_SC
= NULL
;
2745 /* Driver bug, we do not expect a disconnect here
2746 * and should not have advanced the state engine
2749 ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
2751 return do_reset_bus
;
2756 /* When a reselect occurs, and we cannot find the command to
2757 * reconnect to in our queues, we do this.
2759 static int esp_bad_reconnect(struct Sparc_ESP
*esp
)
2763 ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
2765 ESPLOG(("QUEUE DUMP\n"));
2767 ESPLOG(("esp%d: issue_SC[", esp
->esp_id
));
2769 ESPLOG(("<%02x,%02x>", sp
->target
, sp
->lun
));
2770 sp
= (Scsi_Cmnd
*) sp
->host_scribble
;
2773 sp
= esp
->current_SC
;
2774 ESPLOG(("esp%d: current_SC[", esp
->esp_id
));
2776 ESPLOG(("<%02x,%02x>", sp
->target
, sp
->lun
));
2777 sp
= (Scsi_Cmnd
*) sp
->host_scribble
;
2780 sp
= esp
->disconnected_SC
;
2781 ESPLOG(("esp%d: disconnected_SC[", esp
->esp_id
));
2783 ESPLOG(("<%02x,%02x>", sp
->target
, sp
->lun
));
2784 sp
= (Scsi_Cmnd
*) sp
->host_scribble
;
2787 return do_reset_bus
;
2790 /* Do the needy when a target tries to reconnect to us. */
2791 static int esp_do_reconnect(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2792 struct sparc_dma_registers
*dregs
)
2797 /* Check for all bogus conditions first. */
2798 target
= reconnect_target(esp
, eregs
);
2800 ESPDISC(("bad bus bits\n"));
2801 return do_reset_bus
;
2803 lun
= reconnect_lun(esp
, eregs
);
2805 ESPDISC(("target=%2x, bad identify msg\n", target
));
2806 return do_reset_bus
;
2809 /* Things look ok... */
2810 ESPDISC(("R<%02x,%02x>", target
, lun
));
2812 /* Must not flush FIFO or DVMA on HME. */
2813 if(esp
->erev
!= fashme
) {
2814 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2815 if(esp100_reconnect_hwbug(esp
, eregs
))
2816 return do_reset_bus
;
2817 esp_cmd(esp
, eregs
, ESP_CMD_NULL
);
2820 SCptr
= remove_SC(&esp
->disconnected_SC
, (unchar
) target
, (unchar
) lun
);
2822 return esp_bad_reconnect(esp
);
2824 esp_connect(esp
, eregs
, SCptr
);
2825 esp_cmd(esp
, eregs
, ESP_CMD_MOK
);
2827 if(esp
->erev
== fashme
)
2828 eregs
->esp_busid
= (SCptr
->target
& 0xf) |
2829 (ESP_BUSID_RESELID
| ESP_BUSID_CTR32BIT
);
2831 /* Reconnect implies a restore pointers operation. */
2832 esp_restore_pointers(esp
, SCptr
);
2835 esp_advance_phase(SCptr
, in_the_dark
);
2839 /* End of NEXUS (hopefully), pick up status + message byte then leave if
2842 static int esp_do_status(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
2843 struct sparc_dma_registers
*dregs
)
2845 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
2848 rval
= skipahead1(esp
, eregs
, dregs
, SCptr
, in_the_dark
, in_status
);
2852 ESPSTAT(("esp_do_status: "));
2853 if(intr
!= ESP_INTR_DC
) {
2854 int message_out
= 0; /* for parity problems */
2856 /* Ack the message. */
2857 ESPSTAT(("ack msg, "));
2858 esp_cmd(esp
, eregs
, ESP_CMD_MOK
);
2860 if(esp
->erev
!= fashme
) {
2861 dma_flashclear(esp
, dregs
, esp
->dma
->revision
);
2863 /* Wait till the first bits settle. */
2864 while(esp
->esp_command
[0] == 0xff)
2867 esp
->esp_command
[0] = esp
->hme_fifo_workaround_buffer
[0];
2868 esp
->esp_command
[1] = esp
->hme_fifo_workaround_buffer
[1];
2871 ESPSTAT(("got something, "));
2872 /* ESP chimes in with one of
2874 * 1) function done interrupt:
2875 * both status and message in bytes
2878 * 2) bus service interrupt:
2879 * only status byte was acquired
2882 * can't happen, but we test for it
2885 * ALSO: If bad parity was detected on either
2886 * the status _or_ the message byte then
2887 * the ESP has asserted ATN on the bus
2888 * and we must therefore wait for the
2889 * next phase change.
2891 if(intr
& ESP_INTR_FDONE
) {
2892 /* We got it all, hallejulia. */
2893 ESPSTAT(("got both, "));
2894 SCptr
->SCp
.Status
= esp
->esp_command
[0];
2895 SCptr
->SCp
.Message
= esp
->esp_command
[1];
2896 esp
->prevmsgin
= SCptr
->SCp
.Message
;
2897 esp
->cur_msgin
[0] = SCptr
->SCp
.Message
;
2898 if(esp
->sreg
& ESP_STAT_PERR
) {
2899 /* There was bad parity for the
2900 * message byte, the status byte
2903 message_out
= MSG_PARITY_ERROR
;
2905 } else if(intr
== ESP_INTR_BSERV
) {
2906 /* Only got status byte. */
2907 ESPLOG(("esp%d: got status only, ", esp
->esp_id
));
2908 if(!(esp
->sreg
& ESP_STAT_PERR
)) {
2909 SCptr
->SCp
.Status
= esp
->esp_command
[0];
2910 SCptr
->SCp
.Message
= 0xff;
2912 /* The status byte had bad parity.
2913 * we leave the scsi_pointer Status
2914 * field alone as we set it to a default
2915 * of CHECK_CONDITION in esp_queue.
2917 message_out
= INITIATOR_ERROR
;
2920 /* This shouldn't happen ever. */
2921 ESPSTAT(("got bolixed\n"));
2922 esp_advance_phase(SCptr
, in_the_dark
);
2923 return esp_do_phase_determine(esp
, eregs
, dregs
);
2927 ESPSTAT(("status=%2x msg=%2x, ", SCptr
->SCp
.Status
,
2928 SCptr
->SCp
.Message
));
2929 if(SCptr
->SCp
.Message
== COMMAND_COMPLETE
) {
2930 ESPSTAT(("and was COMMAND_COMPLETE\n"));
2931 esp_advance_phase(SCptr
, in_freeing
);
2932 return esp_do_freebus(esp
, eregs
, dregs
);
2934 ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
2936 esp
->msgin_len
= esp
->msgin_ctr
= 1;
2937 esp_advance_phase(SCptr
, in_msgindone
);
2938 return esp_do_msgindone(esp
, eregs
, dregs
);
2941 /* With luck we'll be able to let the target
2942 * know that bad parity happened, it will know
2943 * which byte caused the problems and send it
2944 * again. For the case where the status byte
2945 * receives bad parity, I do not believe most
2946 * targets recover very well. We'll see.
2948 ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
2949 esp
->esp_id
, message_out
));
2950 esp
->cur_msgout
[0] = message_out
;
2951 esp
->msgout_len
= esp
->msgout_ctr
= 1;
2952 esp_advance_phase(SCptr
, in_the_dark
);
2953 return esp_do_phase_determine(esp
, eregs
, dregs
);
2956 /* If we disconnect now, all hell breaks loose. */
2957 ESPLOG(("esp%d: whoops, disconnect\n", esp
->esp_id
));
2958 esp_advance_phase(SCptr
, in_the_dark
);
2959 return esp_do_phase_determine(esp
, eregs
, dregs
);
2963 static int esp_enter_status(struct Sparc_ESP
*esp
,
2964 struct Sparc_ESP_regs
*eregs
,
2965 struct sparc_dma_registers
*dregs
)
2967 unchar thecmd
= ESP_CMD_ICCSEQ
;
2969 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
2970 if(esp
->erev
!= fashme
) {
2971 esp
->esp_command
[0] = esp
->esp_command
[1] = 0xff;
2972 eregs
->esp_tclow
= 2;
2973 eregs
->esp_tcmed
= 0;
2974 dregs
->cond_reg
|= (DMA_ST_WRITE
| DMA_ENABLE
);
2975 if(esp
->dma
->revision
== dvmaesc1
)
2977 dregs
->st_addr
= esp
->esp_command_dvma
;
2978 thecmd
|= ESP_CMD_DMA
;
2980 esp_cmd(esp
, eregs
, thecmd
);
2981 esp_advance_phase(esp
->current_SC
, in_status
);
2983 return esp_do_status(esp
, eregs
, dregs
);
2986 static int esp_disconnect_amidst_phases(struct Sparc_ESP
*esp
,
2987 struct Sparc_ESP_regs
*eregs
,
2988 struct sparc_dma_registers
*dregs
)
2990 Scsi_Cmnd
*sp
= esp
->current_SC
;
2991 Scsi_Device
*dp
= sp
->device
;
2993 /* This means real problems if we see this
2994 * here. Unless we were actually trying
2995 * to force the device to abort/reset.
2997 ESPLOG(("esp%d Disconnect amidst phases, ", esp
->esp_id
));
2998 ESPLOG(("pphase<%s> cphase<%s>, ",
2999 phase_string(sp
->SCp
.phase
),
3000 phase_string(sp
->SCp
.sent_command
)));
3002 if(esp
->disconnected_SC
|| (esp
->erev
== fashme
))
3003 esp_cmd(esp
, eregs
, ESP_CMD_ESEL
);
3005 switch(esp
->cur_msgout
[0]) {
3007 /* We didn't expect this to happen at all. */
3008 ESPLOG(("device is bolixed\n"));
3009 esp_advance_phase(sp
, in_tgterror
);
3010 esp_done(esp
, (DID_ERROR
<< 16));
3013 case BUS_DEVICE_RESET
:
3014 ESPLOG(("device reset successful\n"));
3015 dp
->sync_max_offset
= 0;
3016 dp
->sync_min_period
= 0;
3018 esp_advance_phase(sp
, in_resetdev
);
3019 esp_done(esp
, (DID_RESET
<< 16));
3023 ESPLOG(("device abort successful\n"));
3024 esp_advance_phase(sp
, in_abortone
);
3025 esp_done(esp
, (DID_ABORT
<< 16));
3032 static int esp_enter_msgout(struct Sparc_ESP
*esp
,
3033 struct Sparc_ESP_regs
*eregs
,
3034 struct sparc_dma_registers
*dregs
)
3036 esp_advance_phase(esp
->current_SC
, in_msgout
);
3037 return esp_do_msgout(esp
, eregs
, dregs
);
3040 static int esp_enter_msgin(struct Sparc_ESP
*esp
,
3041 struct Sparc_ESP_regs
*eregs
,
3042 struct sparc_dma_registers
*dregs
)
3044 esp_advance_phase(esp
->current_SC
, in_msgin
);
3045 return esp_do_msgin(esp
, eregs
, dregs
);
3048 static int esp_enter_cmd(struct Sparc_ESP
*esp
,
3049 struct Sparc_ESP_regs
*eregs
,
3050 struct sparc_dma_registers
*dregs
)
3052 esp_advance_phase(esp
->current_SC
, in_cmdbegin
);
3053 return esp_do_cmdbegin(esp
, eregs
, dregs
);
3056 static int esp_enter_badphase(struct Sparc_ESP
*esp
,
3057 struct Sparc_ESP_regs
*eregs
,
3058 struct sparc_dma_registers
*dregs
)
3060 ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp
->esp_id
,
3061 esp
->sreg
& ESP_STAT_PMASK
));
3062 return do_reset_bus
;
3065 typedef int (*espfunc_t
)(struct Sparc_ESP
*,
3066 struct Sparc_ESP_regs
*,
3067 struct sparc_dma_registers
*);
3069 static espfunc_t phase_vector
[] = {
3070 esp_do_data
, /* ESP_DOP */
3071 esp_do_data
, /* ESP_DIP */
3072 esp_enter_cmd
, /* ESP_CMDP */
3073 esp_enter_status
, /* ESP_STATP */
3074 esp_enter_badphase
, /* ESP_STAT_PMSG */
3075 esp_enter_badphase
, /* ESP_STAT_PMSG | ESP_STAT_PIO */
3076 esp_enter_msgout
, /* ESP_MOP */
3077 esp_enter_msgin
, /* ESP_MIP */
3080 /* The target has control of the bus and we have to see where it has
3083 static int esp_do_phase_determine(struct Sparc_ESP
*esp
,
3084 struct Sparc_ESP_regs
*eregs
,
3085 struct sparc_dma_registers
*dregs
)
3087 if ((esp
->ireg
& ESP_INTR_DC
) != 0)
3088 return esp_disconnect_amidst_phases(esp
, eregs
, dregs
);
3089 return phase_vector
[esp
->sreg
& ESP_STAT_PMASK
](esp
, eregs
, dregs
);
3092 /* First interrupt after exec'ing a cmd comes here. */
3093 static int esp_select_complete(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3094 struct sparc_dma_registers
*dregs
)
3096 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
3097 Scsi_Device
*SDptr
= SCptr
->device
;
3098 int cmd_bytes_sent
, fcnt
;
3100 if(esp
->erev
!= fashme
)
3101 esp
->seqreg
= (eregs
->esp_sstep
& ESP_STEP_VBITS
);
3102 if(esp
->erev
== fashme
)
3103 fcnt
= esp
->hme_fifo_workaround_count
;
3105 fcnt
= (eregs
->esp_fflags
& ESP_FF_FBYTES
);
3106 cmd_bytes_sent
= esp_bytes_sent(esp
, dregs
, fcnt
);
3107 dma_invalidate(esp
, dregs
, esp
->dma
->revision
);
3109 /* Let's check to see if a reselect happened
3110 * while we we're trying to select. This must
3113 if(esp
->ireg
== (ESP_INTR_RSEL
| ESP_INTR_FDONE
)) {
3114 esp_reconnect(esp
, SCptr
);
3115 return esp_do_reconnect(esp
, eregs
, dregs
);
3118 /* Looks like things worked, we should see a bus service &
3119 * a function complete interrupt at this point. Note we
3120 * are doing a direct comparison because we don't want to
3121 * be fooled into thinking selection was successful if
3122 * ESP_INTR_DC is set, see below.
3124 if(esp
->ireg
== (ESP_INTR_FDONE
| ESP_INTR_BSERV
)) {
3125 /* target speaks... */
3126 esp
->targets_present
|= (1<<SCptr
->target
);
3128 /* What if the target ignores the sdtr? */
3132 /* See how far, if at all, we got in getting
3133 * the information out to the target.
3135 switch(esp
->seqreg
) {
3139 /* Arbitration won, target selected, but
3140 * we are in some phase which is not command
3141 * phase nor is it message out phase.
3143 * XXX We've confused the target, obviously.
3144 * XXX So clear it's state, but we also end
3145 * XXX up clearing everyone elses. That isn't
3146 * XXX so nice. I'd like to just reset this
3147 * XXX target, but if I cannot even get it's
3148 * XXX attention and finish selection to talk
3149 * XXX to it, there is not much more I can do.
3150 * XXX If we have a loaded bus we're going to
3151 * XXX spend the next second or so renegotiating
3152 * XXX for synchronous transfers.
3154 ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
3155 esp
->esp_id
, SCptr
->target
));
3158 /* Arbitration won, target selected, went
3159 * to message out phase, sent one message
3160 * byte, then we stopped. ATN is asserted
3161 * on the SCSI bus and the target is still
3162 * there hanging on. This is a legal
3163 * sequence step if we gave the ESP a select
3166 * XXX See above, I could set the borken flag
3167 * XXX in the device struct and retry the
3168 * XXX command. But would that help for
3169 * XXX tagged capable targets?
3173 /* Arbitration won, target selected, maybe
3174 * sent the one message byte in message out
3175 * phase, but we did not go to command phase
3176 * in the end. Actually, we could have sent
3177 * only some of the message bytes if we tried
3178 * to send out the entire identify and tag
3179 * message using ESP_CMD_SA3.
3185 /* No, not the powerPC pinhead. Arbitration
3186 * won, all message bytes sent if we went to
3187 * message out phase, went to command phase
3188 * but only part of the command was sent.
3190 * XXX I've seen this, but usually in conjunction
3191 * XXX with a gross error which appears to have
3192 * XXX occurred between the time I told the
3193 * XXX ESP to arbitrate and when I got the
3194 * XXX interrupt. Could I have misloaded the
3195 * XXX command bytes into the fifo? Actually,
3196 * XXX I most likely missed a phase, and therefore
3197 * XXX went into never never land and didn't even
3198 * XXX know it. That was the old driver though.
3199 * XXX What is even more peculiar is that the ESP
3200 * XXX showed the proper function complete and
3201 * XXX bus service bits in the interrupt register.
3204 case ESP_STEP_FINI4
:
3205 case ESP_STEP_FINI5
:
3206 case ESP_STEP_FINI6
:
3207 case ESP_STEP_FINI7
:
3208 /* Account for the identify message */
3209 if(SCptr
->SCp
.phase
== in_slct_norm
)
3210 cmd_bytes_sent
-= 1;
3212 if(esp
->erev
!= fashme
)
3213 esp_cmd(esp
, eregs
, ESP_CMD_NULL
);
3215 /* Be careful, we could really get fucked during synchronous
3216 * data transfers if we try to flush the fifo now.
3218 if((esp
->erev
!= fashme
) && /* not a Happy Meal and... */
3219 !fcnt
&& /* Fifo is empty and... */
3220 /* either we are not doing synchronous transfers or... */
3221 (!SDptr
->sync_max_offset
||
3222 /* We are not going into data in phase. */
3223 ((esp
->sreg
& ESP_STAT_PMASK
) != ESP_DIP
)))
3224 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
); /* flush is safe */
3226 /* See how far we got if this is not a slow command. */
3227 if(!esp
->esp_slowcmd
) {
3228 if(cmd_bytes_sent
< 0)
3230 if(cmd_bytes_sent
!= SCptr
->cmd_len
) {
3231 /* Crapola, mark it as a slowcmd
3232 * so that we have some chance of
3233 * keeping the command alive with
3236 * XXX Actually, if we didn't send it all
3237 * XXX this means either we didn't set things
3238 * XXX up properly (driver bug) or the target
3239 * XXX or the ESP detected parity on one of
3240 * XXX the command bytes. This makes much
3241 * XXX more sense, and therefore this code
3242 * XXX should be changed to send out a
3243 * XXX parity error message or if the status
3244 * XXX register shows no parity error then
3245 * XXX just expect the target to bring the
3246 * XXX bus into message in phase so that it
3247 * XXX can send us the parity error message.
3250 esp
->esp_slowcmd
= 1;
3251 esp
->esp_scmdp
= &(SCptr
->cmnd
[cmd_bytes_sent
]);
3252 esp
->esp_scmdleft
= (SCptr
->cmd_len
- cmd_bytes_sent
);
3256 /* Now figure out where we went. */
3257 esp_advance_phase(SCptr
, in_the_dark
);
3258 return esp_do_phase_determine(esp
, eregs
, dregs
);
3261 /* Did the target even make it? */
3262 if(esp
->ireg
== ESP_INTR_DC
) {
3263 /* wheee... nobody there or they didn't like
3264 * what we told it to do, clean up.
3267 /* If anyone is off the bus, but working on
3268 * a command in the background for us, tell
3269 * the ESP to listen for them.
3271 if(esp
->disconnected_SC
)
3272 esp_cmd(esp
, eregs
, ESP_CMD_ESEL
);
3274 if(((1<<SCptr
->target
) & esp
->targets_present
) &&
3275 esp
->seqreg
&& esp
->cur_msgout
[0] == EXTENDED_MESSAGE
&&
3276 (SCptr
->SCp
.phase
== in_slct_msg
||
3277 SCptr
->SCp
.phase
== in_slct_stop
)) {
3280 ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
3281 "lun %d\n", esp
->esp_id
, SCptr
->target
, SCptr
->lun
));
3282 SDptr
->sync_max_offset
= 0;
3283 SDptr
->sync_min_period
= 0;
3284 SDptr
->sync
= 1; /* so we don't negotiate again */
3286 /* Run the command again, this time though we
3287 * won't try to negotiate for synchronous transfers.
3289 * XXX I'd like to do something like send an
3290 * XXX INITIATOR_ERROR or ABORT message to the
3291 * XXX target to tell it, "Sorry I confused you,
3292 * XXX please come back and I will be nicer next
3293 * XXX time". But that requires having the target
3294 * XXX on the bus, and it has dropped BSY on us.
3296 esp
->current_SC
= NULL
;
3297 esp_advance_phase(SCptr
, not_issued
);
3298 prepend_SC(&esp
->issue_SC
, SCptr
);
3303 /* Ok, this is normal, this is what we see during boot
3304 * or whenever when we are scanning the bus for targets.
3305 * But first make sure that is really what is happening.
3307 if(((1<<SCptr
->target
) & esp
->targets_present
)) {
3308 ESPLOG(("esp%d: Warning, live target %d not responding to "
3309 "selection.\n", esp
->esp_id
, SCptr
->target
));
3311 /* This _CAN_ happen. The SCSI standard states that
3312 * the target is to _not_ respond to selection if
3313 * _it_ detects bad parity on the bus for any reason.
3314 * Therefore, we assume that if we've talked successfully
3315 * to this target before, bad parity is the problem.
3317 esp_done(esp
, (DID_PARITY
<< 16));
3319 /* Else, there really isn't anyone there. */
3320 ESPMISC(("esp: selection failure, maybe nobody there?\n"));
3321 ESPMISC(("esp: target %d lun %d\n",
3322 SCptr
->target
, SCptr
->lun
));
3323 esp_done(esp
, (DID_BAD_TARGET
<< 16));
3329 ESPLOG(("esp%d: Selection failure.\n", esp
->esp_id
));
3330 printk("esp%d: Currently -- ", esp
->esp_id
);
3331 esp_print_ireg(esp
->ireg
);
3333 esp_print_statreg(esp
->sreg
);
3335 esp_print_seqreg(esp
->seqreg
);
3337 printk("esp%d: New -- ", esp
->esp_id
);
3338 esp
->sreg
= eregs
->esp_status
;
3339 esp
->seqreg
= eregs
->esp_sstep
;
3340 esp
->ireg
= eregs
->esp_intrpt
;
3341 esp_print_ireg(esp
->ireg
);
3343 esp_print_statreg(esp
->sreg
);
3345 esp_print_seqreg(esp
->seqreg
);
3347 ESPLOG(("esp%d: resetting bus\n", esp
->esp_id
));
3348 return do_reset_bus
; /* ugh... */
3351 /* Continue reading bytes for msgin phase. */
3352 static int esp_do_msgincont(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3353 struct sparc_dma_registers
*dregs
)
3355 if(esp
->ireg
& ESP_INTR_BSERV
) {
3356 /* in the right phase too? */
3357 if((esp
->sreg
& ESP_STAT_PMASK
) == ESP_MIP
) {
3359 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3360 esp_advance_phase(esp
->current_SC
, in_msgindone
);
3364 /* We changed phase but ESP shows bus service,
3365 * in this case it is most likely that we, the
3366 * hacker who has been up for 20hrs straight
3367 * staring at the screen, drowned in coffee
3368 * smelling like retched cigarette ashes
3369 * have miscoded something..... so, try to
3370 * recover as best we can.
3372 ESPLOG(("esp%d: message in mis-carriage.\n", esp
->esp_id
));
3374 esp_advance_phase(esp
->current_SC
, in_the_dark
);
3375 return do_phase_determine
;
3378 static int check_singlebyte_msg(struct Sparc_ESP
*esp
,
3379 struct Sparc_ESP_regs
*eregs
,
3380 struct sparc_dma_registers
*dregs
)
3382 esp
->prevmsgin
= esp
->cur_msgin
[0];
3383 if(esp
->cur_msgin
[0] & 0x80) {
3385 ESPLOG(("esp%d: target sends identify amidst phases\n",
3387 esp_advance_phase(esp
->current_SC
, in_the_dark
);
3389 } else if(((esp
->cur_msgin
[0] & 0xf0) == 0x20) ||
3390 (esp
->cur_msgin
[0] == EXTENDED_MESSAGE
)) {
3392 esp_advance_phase(esp
->current_SC
, in_msgincont
);
3395 esp_advance_phase(esp
->current_SC
, in_the_dark
);
3396 switch(esp
->cur_msgin
[0]) {
3398 /* We don't want to hear about it. */
3399 ESPLOG(("esp%d: msg %02x which we don't know about\n", esp
->esp_id
,
3400 esp
->cur_msgin
[0]));
3401 return MESSAGE_REJECT
;
3404 ESPLOG(("esp%d: target %d sends a nop\n", esp
->esp_id
,
3405 esp
->current_SC
->target
));
3408 case RESTORE_POINTERS
:
3409 /* In this case we might also have to backup the
3410 * "slow command" pointer. It is rare to get such
3411 * a save/restore pointer sequence so early in the
3412 * bus transition sequences, but cover it.
3414 if(esp
->esp_slowcmd
) {
3415 esp
->esp_scmdleft
= esp
->current_SC
->cmd_len
;
3416 esp
->esp_scmdp
= &esp
->current_SC
->cmnd
[0];
3418 esp_restore_pointers(esp
, esp
->current_SC
);
3422 esp_save_pointers(esp
, esp
->current_SC
);
3425 case COMMAND_COMPLETE
:
3427 /* Freeing the bus, let it go. */
3428 esp
->current_SC
->SCp
.phase
= in_freeing
;
3431 case MESSAGE_REJECT
:
3432 ESPMISC(("msg reject, "));
3433 if(esp
->prevmsgout
== EXTENDED_MESSAGE
) {
3434 Scsi_Device
*SDptr
= esp
->current_SC
->device
;
3436 /* Doesn't look like this target can
3437 * do synchronous or WIDE transfers.
3439 ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
3442 SDptr
->sync_min_period
= 0;
3443 SDptr
->sync_max_offset
= 0;
3446 ESPMISC(("not sync nego, sending ABORT\n"));
3452 /* Target negotiates for synchronous transfers before we do, this
3453 * is legal although very strange. What is even funnier is that
3454 * the SCSI2 standard specifically recommends against targets doing
3455 * this because so many initiators cannot cope with this occuring.
3457 static int target_with_ants_in_pants(struct Sparc_ESP
*esp
,
3461 if(SDptr
->sync
|| SDptr
->borken
) {
3462 /* sorry, no can do */
3463 ESPSDTR(("forcing to async, "));
3464 build_sync_nego_msg(esp
, 0, 0);
3467 ESPLOG(("esp%d: hoping for msgout\n", esp
->esp_id
));
3468 esp_advance_phase(SCptr
, in_the_dark
);
3469 return EXTENDED_MESSAGE
;
3472 /* Ok, we'll check them out... */
3476 static void sync_report(struct Sparc_ESP
*esp
)
3481 msg3
= esp
->cur_msgin
[3];
3482 msg4
= esp
->cur_msgin
[4];
3484 int hz
= 1000000000 / (msg3
* 4);
3485 int integer
= hz
/ 1000000;
3486 int fraction
= (hz
- (integer
* 1000000)) / 10000;
3487 if((esp
->erev
== fashme
) &&
3488 (esp
->config3
[esp
->current_SC
->target
] & ESP_CONFIG3_EWIDE
)) {
3492 } else if((msg3
* 4) < 200) {
3495 type
= "synchronous";
3498 /* Do not transform this back into one big printk
3499 * again, it triggers a bug in our sparc64-gcc272
3500 * sibling call optimization. -DaveM
3502 ESPLOG((KERN_INFO
"esp%d: target %d ",
3503 esp
->esp_id
, esp
->current_SC
->target
));
3504 ESPLOG(("[period %dns offset %d %d.%02dMHz ",
3505 (int) msg3
* 4, (int) msg4
,
3506 integer
, fraction
));
3507 ESPLOG(("%s SCSI%s]\n", type
,
3508 (((msg3
* 4) < 200) ? "-II" : "")));
3510 ESPLOG((KERN_INFO
"esp%d: target %d asynchronous\n",
3511 esp
->esp_id
, esp
->current_SC
->target
));
3515 static int check_multibyte_msg(struct Sparc_ESP
*esp
,
3516 struct Sparc_ESP_regs
*eregs
,
3517 struct sparc_dma_registers
*dregs
)
3519 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
3520 Scsi_Device
*SDptr
= SCptr
->device
;
3522 int message_out
= 0;
3524 ESPSDTR(("chk multibyte msg: "));
3525 if(esp
->cur_msgin
[2] == EXTENDED_SDTR
) {
3526 int period
= esp
->cur_msgin
[3];
3527 int offset
= esp
->cur_msgin
[4];
3529 ESPSDTR(("is sync nego response, "));
3533 /* Target negotiates first! */
3534 ESPSDTR(("target jumps the gun, "));
3535 message_out
= EXTENDED_MESSAGE
; /* we must respond */
3536 rval
= target_with_ants_in_pants(esp
, SCptr
, SDptr
);
3541 ESPSDTR(("examining sdtr, "));
3543 /* Offset cannot be larger than ESP fifo size. */
3545 ESPSDTR(("offset too big %2x, ", offset
));
3547 ESPSDTR(("sending back new offset\n"));
3548 build_sync_nego_msg(esp
, period
, offset
);
3549 return EXTENDED_MESSAGE
;
3552 if(offset
&& period
> esp
->max_period
) {
3553 /* Yeee, async for this slow device. */
3554 ESPSDTR(("period too long %2x, ", period
));
3555 build_sync_nego_msg(esp
, 0, 0);
3556 ESPSDTR(("hoping for msgout\n"));
3557 esp_advance_phase(esp
->current_SC
, in_the_dark
);
3558 return EXTENDED_MESSAGE
;
3559 } else if (offset
&& period
< esp
->min_period
) {
3560 ESPSDTR(("period too short %2x, ", period
));
3561 period
= esp
->min_period
;
3562 if(esp
->erev
> esp236
)
3569 ESPSDTR(("period is ok, "));
3570 tmp
= esp
->ccycle
/ 1000;
3571 regval
= (((period
<< 2) + tmp
- 1) / tmp
);
3572 if(regval
&& ((esp
->erev
== fas100a
||
3573 esp
->erev
== fas236
||
3574 esp
->erev
== fashme
))) {
3583 SDptr
->sync_min_period
= (regval
& 0x1f);
3584 SDptr
->sync_max_offset
= (offset
| esp
->radelay
);
3585 if((esp
->erev
== fas100a
|| esp
->erev
== fas236
|| esp
->erev
== fashme
)) {
3586 if((esp
->erev
== fas100a
) || (esp
->erev
== fashme
))
3587 bit
= ESP_CONFIG3_FAST
;
3589 bit
= ESP_CONFIG3_FSCSI
;
3591 esp
->config3
[SCptr
->target
] |= bit
;
3593 esp
->config3
[SCptr
->target
] &= ~bit
;
3594 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[SCptr
->target
];
3596 eregs
->esp_soff
= esp
->prev_soff
= SDptr
->sync_min_period
;
3597 eregs
->esp_stp
= esp
->prev_stp
= SDptr
->sync_max_offset
;
3599 ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
3600 SDptr
->sync_max_offset
,
3601 SDptr
->sync_min_period
,
3602 esp
->config3
[SCptr
->target
]));
3605 } else if(SDptr
->sync_max_offset
) {
3608 /* back to async mode */
3609 ESPSDTR(("unaccaptable sync nego, forcing async\n"));
3610 SDptr
->sync_max_offset
= 0;
3611 SDptr
->sync_min_period
= 0;
3612 eregs
->esp_soff
= esp
->prev_soff
= 0;
3613 eregs
->esp_stp
= esp
->prev_stp
= 0;
3614 if((esp
->erev
== fas100a
|| esp
->erev
== fas236
|| esp
->erev
== fashme
)) {
3615 if((esp
->erev
== fas100a
) || (esp
->erev
== fashme
))
3616 bit
= ESP_CONFIG3_FAST
;
3618 bit
= ESP_CONFIG3_FSCSI
;
3619 esp
->config3
[SCptr
->target
] &= ~bit
;
3620 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[SCptr
->target
];
3626 ESPSDTR(("chk multibyte msg: sync is known, "));
3630 ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
3632 build_sync_nego_msg(esp
, period
, offset
);
3633 esp_advance_phase(SCptr
, in_the_dark
);
3634 return EXTENDED_MESSAGE
;
3637 ESPSDTR(("returning zero\n"));
3638 esp_advance_phase(SCptr
, in_the_dark
); /* ...or else! */
3640 } else if(esp
->cur_msgin
[2] == EXTENDED_WDTR
) {
3641 int size
= 8 << esp
->cur_msgin
[3];
3644 if(esp
->erev
!= fashme
) {
3645 ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
3647 message_out
= MESSAGE_REJECT
;
3648 } else if(size
> 16) {
3649 ESPLOG(("esp%d: AIEEE wide transfer for %d size "
3650 "not supported.\n", esp
->esp_id
, size
));
3651 message_out
= MESSAGE_REJECT
;
3653 /* Things look good; let's see what we got. */
3655 /* Set config 3 register for this target. */
3656 esp
->config3
[SCptr
->target
] |= ESP_CONFIG3_EWIDE
;
3658 /* Just make sure it was one byte sized. */
3660 ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
3661 esp
->esp_id
, size
));
3662 message_out
= MESSAGE_REJECT
;
3665 /* Pure paranoia. */
3666 esp
->config3
[SCptr
->target
] &= ~(ESP_CONFIG3_EWIDE
);
3668 eregs
->esp_cfg3
= esp
->prev_cfg3
= esp
->config3
[SCptr
->target
];
3670 /* Regardless, next try for sync transfers. */
3671 build_sync_nego_msg(esp
, esp
->sync_defp
, 15);
3674 message_out
= EXTENDED_MESSAGE
;
3676 } else if(esp
->cur_msgin
[2] == EXTENDED_MODIFY_DATA_POINTER
) {
3677 ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp
->esp_id
));
3678 message_out
= MESSAGE_REJECT
;
3681 esp_advance_phase(SCptr
, in_the_dark
);
3685 static int esp_do_msgindone(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3686 struct sparc_dma_registers
*dregs
)
3688 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
3689 int message_out
= 0, it
= 0, rval
;
3691 rval
= skipahead1(esp
, eregs
, dregs
, SCptr
, in_msgin
, in_msgindone
);
3694 if(SCptr
->SCp
.sent_command
!= in_status
) {
3695 if(!(esp
->ireg
& ESP_INTR_DC
)) {
3696 if(esp
->msgin_len
&& (esp
->sreg
& ESP_STAT_PERR
)) {
3697 message_out
= MSG_PARITY_ERROR
;
3698 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3699 } else if(esp
->erev
!= fashme
&&
3700 (it
= (eregs
->esp_fflags
& ESP_FF_FBYTES
))!=1) {
3701 /* We certainly dropped the ball somewhere. */
3702 message_out
= INITIATOR_ERROR
;
3703 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3704 } else if(!esp
->msgin_len
) {
3705 if(esp
->erev
== fashme
)
3706 it
= esp
->hme_fifo_workaround_buffer
[0];
3708 it
= eregs
->esp_fdata
;
3709 esp_advance_phase(SCptr
, in_msgincont
);
3711 /* it is ok and we want it */
3712 if(esp
->erev
== fashme
)
3713 it
= esp
->cur_msgin
[esp
->msgin_ctr
] =
3714 esp
->hme_fifo_workaround_buffer
[0];
3716 it
= esp
->cur_msgin
[esp
->msgin_ctr
] =
3721 esp_advance_phase(SCptr
, in_the_dark
);
3725 it
= esp
->cur_msgin
[0];
3727 if(!message_out
&& esp
->msgin_len
) {
3728 if(esp
->msgin_ctr
< esp
->msgin_len
) {
3729 esp_advance_phase(SCptr
, in_msgincont
);
3730 } else if(esp
->msgin_len
== 1) {
3731 message_out
= check_singlebyte_msg(esp
, eregs
, dregs
);
3732 } else if(esp
->msgin_len
== 2) {
3733 if(esp
->cur_msgin
[0] == EXTENDED_MESSAGE
) {
3735 message_out
= MESSAGE_REJECT
;
3737 esp
->msgin_len
= (it
+ 2);
3738 esp_advance_phase(SCptr
, in_msgincont
);
3741 message_out
= MESSAGE_REJECT
; /* foo on you */
3744 message_out
= check_multibyte_msg(esp
, eregs
, dregs
);
3747 if(message_out
< 0) {
3748 return -message_out
;
3749 } else if(message_out
) {
3750 if(((message_out
!= 1) &&
3751 ((message_out
< 0x20) || (message_out
& 0x80))))
3752 esp
->msgout_len
= 1;
3753 esp
->cur_msgout
[0] = message_out
;
3754 esp_cmd(esp
, eregs
, ESP_CMD_SATN
);
3755 esp_advance_phase(SCptr
, in_the_dark
);
3758 esp
->sreg
= eregs
->esp_status
;
3759 esp
->sreg
&= ~(ESP_STAT_INTR
);
3760 if((esp
->sreg
& (ESP_STAT_PMSG
|ESP_STAT_PCD
)) == (ESP_STAT_PMSG
|ESP_STAT_PCD
))
3761 esp_cmd(esp
, eregs
, ESP_CMD_MOK
);
3762 if((SCptr
->SCp
.sent_command
== in_msgindone
) &&
3763 (SCptr
->SCp
.phase
== in_freeing
))
3764 return esp_do_freebus(esp
, eregs
, dregs
);
3768 static int esp_do_cmdbegin(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3769 struct sparc_dma_registers
*dregs
)
3771 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
3773 esp_advance_phase(SCptr
, in_cmdend
);
3774 if(esp
->erev
== fashme
) {
3775 unsigned long tmp
= dregs
->cond_reg
;
3778 for(i
= 0; i
< esp
->esp_scmdleft
; i
++)
3779 esp
->esp_command
[i
] = *esp
->esp_scmdp
++;
3780 esp
->esp_scmdleft
= 0;
3781 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3782 esp_setcount(eregs
, i
, 1);
3783 esp_cmd(esp
, eregs
, (ESP_CMD_DMA
| ESP_CMD_TI
));
3784 tmp
|= (DMA_SCSI_DISAB
| DMA_ENABLE
);
3785 tmp
&= ~(DMA_ST_WRITE
);
3787 dregs
->st_addr
= esp
->esp_command_dvma
;
3788 dregs
->cond_reg
= tmp
;
3791 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3792 tmp
= *esp
->esp_scmdp
++;
3793 esp
->esp_scmdleft
--;
3794 eregs
->esp_fdata
= tmp
;
3795 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3800 static int esp_do_cmddone(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3801 struct sparc_dma_registers
*dregs
)
3803 if(esp
->erev
== fashme
)
3804 dma_invalidate(esp
, dregs
, dvmahme
);
3806 esp_cmd(esp
, eregs
, ESP_CMD_NULL
);
3807 if(esp
->ireg
& ESP_INTR_BSERV
) {
3808 esp_advance_phase(esp
->current_SC
, in_the_dark
);
3809 return esp_do_phase_determine(esp
, eregs
, dregs
);
3811 ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
3813 return do_reset_bus
;
3816 static int esp_do_msgout(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3817 struct sparc_dma_registers
*dregs
)
3819 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3820 switch(esp
->msgout_len
) {
3822 if(esp
->erev
== fashme
)
3823 hme_fifo_push(esp
, eregs
, &esp
->cur_msgout
[0], 1);
3825 eregs
->esp_fdata
= esp
->cur_msgout
[0];
3826 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3830 esp
->esp_command
[0] = esp
->cur_msgout
[0];
3831 esp
->esp_command
[1] = esp
->cur_msgout
[1];
3832 if(esp
->erev
== fashme
) {
3833 hme_fifo_push(esp
, eregs
, &esp
->cur_msgout
[0], 2);
3834 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3836 dma_setup(dregs
, esp
->dma
->revision
,
3837 esp
->esp_command_dvma
, 2, 0);
3838 esp_setcount(eregs
, 2, 0);
3839 esp_cmd(esp
, eregs
, ESP_CMD_DMA
| ESP_CMD_TI
);
3844 esp
->esp_command
[0] = esp
->cur_msgout
[0];
3845 esp
->esp_command
[1] = esp
->cur_msgout
[1];
3846 esp
->esp_command
[2] = esp
->cur_msgout
[2];
3847 esp
->esp_command
[3] = esp
->cur_msgout
[3];
3849 if(esp
->erev
== fashme
) {
3850 hme_fifo_push(esp
, eregs
, &esp
->cur_msgout
[0], 4);
3851 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3853 dma_setup(dregs
, esp
->dma
->revision
,
3854 esp
->esp_command_dvma
, 4, 0);
3855 esp_setcount(eregs
, 4, 0);
3856 esp_cmd(esp
, eregs
, ESP_CMD_DMA
| ESP_CMD_TI
);
3861 esp
->esp_command
[0] = esp
->cur_msgout
[0];
3862 esp
->esp_command
[1] = esp
->cur_msgout
[1];
3863 esp
->esp_command
[2] = esp
->cur_msgout
[2];
3864 esp
->esp_command
[3] = esp
->cur_msgout
[3];
3865 esp
->esp_command
[4] = esp
->cur_msgout
[4];
3867 if(esp
->erev
== fashme
) {
3868 hme_fifo_push(esp
, eregs
, &esp
->cur_msgout
[0], 5);
3869 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3871 dma_setup(dregs
, esp
->dma
->revision
,
3872 esp
->esp_command_dvma
, 5, 0);
3873 esp_setcount(eregs
, 5, 0);
3874 esp_cmd(esp
, eregs
, ESP_CMD_DMA
| ESP_CMD_TI
);
3880 ESPMISC(("bogus msgout sending NOP\n"));
3881 esp
->cur_msgout
[0] = NOP
;
3882 if(esp
->erev
== fashme
) {
3883 hme_fifo_push(esp
, eregs
, &esp
->cur_msgout
[0], 1);
3885 eregs
->esp_fdata
= esp
->cur_msgout
[0];
3887 esp
->msgout_len
= 1;
3888 esp_cmd(esp
, eregs
, ESP_CMD_TI
);
3891 esp_advance_phase(esp
->current_SC
, in_msgoutdone
);
3895 static int esp_do_msgoutdone(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3896 struct sparc_dma_registers
*dregs
)
3898 if(esp
->msgout_len
> 1) {
3899 /* XXX HME/FAS ATN deassert workaround required,
3900 * XXX no DMA flushing, only possible ESP_CMD_FLUSH
3901 * XXX to kill the fifo.
3903 if(esp
->erev
!= fashme
) {
3904 while(dregs
->cond_reg
& DMA_PEND_READ
)
3906 dregs
->cond_reg
&= ~(DMA_ENABLE
);
3907 dma_invalidate(esp
, dregs
, esp
->dma
->revision
);
3909 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3912 if(!(esp
->ireg
& ESP_INTR_DC
)) {
3913 if(esp
->erev
!= fashme
)
3914 esp_cmd(esp
, eregs
, ESP_CMD_NULL
);
3915 switch(esp
->sreg
& ESP_STAT_PMASK
) {
3917 /* whoops, parity error */
3918 ESPLOG(("esp%d: still in msgout, parity error assumed\n",
3920 if(esp
->msgout_len
> 1)
3921 esp_cmd(esp
, eregs
, ESP_CMD_SATN
);
3922 esp_advance_phase(esp
->current_SC
, in_msgout
);
3929 /* Happy Meal fifo is touchy... */
3930 if((esp
->erev
!= fashme
) &&
3931 !fcount(esp
, eregs
) &&
3932 !(esp
->current_SC
->device
->sync_max_offset
))
3933 esp_cmd(esp
, eregs
, ESP_CMD_FLUSH
);
3938 ESPLOG(("esp%d: disconnect, resetting bus\n", esp
->esp_id
));
3939 return do_reset_bus
;
3942 /* If we sent out a synchronous negotiation message, update
3945 if(esp
->cur_msgout
[2] == EXTENDED_MESSAGE
&&
3946 esp
->cur_msgout
[4] == EXTENDED_SDTR
) {
3947 esp
->snip
= 1; /* anal retentiveness... */
3950 esp
->prevmsgout
= esp
->cur_msgout
[0];
3951 esp
->msgout_len
= 0;
3952 esp_advance_phase(esp
->current_SC
, in_the_dark
);
3953 return esp_do_phase_determine(esp
, eregs
, dregs
);
3956 static int esp_bus_unexpected(struct Sparc_ESP
*esp
, struct Sparc_ESP_regs
*eregs
,
3957 struct sparc_dma_registers
*dregs
)
3959 ESPLOG(("esp%d: command in weird state %2x\n",
3960 esp
->esp_id
, esp
->current_SC
->SCp
.phase
));
3961 return do_reset_bus
;
3964 static espfunc_t bus_vector
[] = {
3977 esp_do_phase_determine
,
3983 /* This is the second tier in our dual-level SCSI state machine. */
3984 static int esp_work_bus(struct Sparc_ESP
*esp
,
3985 struct Sparc_ESP_regs
*eregs
,
3986 struct sparc_dma_registers
*dregs
)
3988 Scsi_Cmnd
*SCptr
= esp
->current_SC
;
3991 ESPBUS(("esp_work_bus: "));
3993 ESPBUS(("reconnect\n"));
3994 return esp_do_reconnect(esp
, eregs
, dregs
);
3996 phase
= SCptr
->SCp
.phase
;
3997 if ((phase
& 0xf0) == in_phases_mask
)
3998 return bus_vector
[(phase
& 0x0f)](esp
, eregs
, dregs
);
3999 else if((phase
& 0xf0) == in_slct_mask
)
4000 return esp_select_complete(esp
, eregs
, dregs
);
4002 return esp_bus_unexpected(esp
, eregs
, dregs
);
4005 static espfunc_t isvc_vector
[] = {
4007 esp_do_phase_determine
,
4013 /* Main interrupt handler for an esp adapter. */
4014 static void esp_handle(struct Sparc_ESP
*esp
)
4016 struct sparc_dma_registers
*dregs
;
4017 struct Sparc_ESP_regs
*eregs
;
4019 int what_next
= do_intr_end
;
4023 SCptr
= esp
->current_SC
;
4025 /* Check for errors. */
4026 esp
->sreg
= eregs
->esp_status
;
4027 esp
->sreg
&= (~ESP_STAT_INTR
);
4028 if(esp
->erev
== fashme
) {
4029 esp
->sreg2
= eregs
->esp_status2
;
4030 esp
->seqreg
= (eregs
->esp_sstep
& ESP_STEP_VBITS
);
4032 if(esp
->sreg
& (ESP_STAT_SPAM
)) {
4033 /* Gross error, could be due to one of:
4035 * - top of fifo overwritten, could be because
4036 * we tried to do a synchronous transfer with
4037 * an offset greater than ESP fifo size
4039 * - top of command register overwritten
4041 * - DMA setup to go in one direction, SCSI
4042 * bus points in the other, whoops
4044 * - weird phase change during asynchronous
4045 * data phase while we are initiator
4047 ESPLOG(("esp%d: Gross error sreg=%2x\n", esp
->esp_id
, esp
->sreg
));
4049 /* If a command is live on the bus we cannot safely
4050 * reset the bus, so we'll just let the pieces fall
4051 * where they may. Here we are hoping that the
4052 * target will be able to cleanly go away soon
4053 * so we can safely reset things.
4056 ESPLOG(("esp%d: No current cmd during gross error, "
4057 "resetting bus\n", esp
->esp_id
));
4058 what_next
= do_reset_bus
;
4063 if(dregs
->cond_reg
& DMA_HNDL_ERROR
) {
4064 /* A DMA gate array error. Here we must
4065 * be seeing one of two things. Either the
4066 * virtual to physical address translation
4067 * on the SBUS could not occur, else the
4068 * translation it did get pointed to a bogus
4071 ESPLOG(("esp%d: DMA error %08x\n", esp
->esp_id
,
4074 /* DMA gate array itself must be reset to clear the
4079 what_next
= do_reset_bus
;
4083 esp
->ireg
= eregs
->esp_intrpt
; /* Unlatch intr and stat regs */
4085 if(esp
->erev
== fashme
) {
4086 /* This chip is really losing. */
4089 ESPHME(("sreg2=%02x,", esp
->sreg2
));
4090 /* Must latch fifo before reading the interrupt
4091 * register else garbage ends up in the FIFO
4092 * which confuses the driver utterly.
4094 if(!(esp
->sreg2
& ESP_STAT2_FEMPTY
) ||
4095 (esp
->sreg2
& ESP_STAT2_F1BYTE
)) {
4096 ESPHME(("fifo_workaround]"));
4097 hme_fifo_read(esp
, eregs
);
4099 ESPHME(("no_fifo_workaround]"));
4103 /* No current cmd is only valid at this point when there are
4104 * commands off the bus or we are trying a reset.
4106 if(!SCptr
&& !esp
->disconnected_SC
&& !(esp
->ireg
& ESP_INTR_SR
)) {
4107 /* Panic is safe, since current_SC is null. */
4108 ESPLOG(("esp%d: no command in esp_handle()\n", esp
->esp_id
));
4109 panic("esp_handle: current_SC == penguin within interrupt!");
4112 if(esp
->ireg
& (ESP_INTR_IC
)) {
4113 /* Illegal command fed to ESP. Outside of obvious
4114 * software bugs that could cause this, there is
4115 * a condition with esp100 where we can confuse the
4116 * ESP into an erroneous illegal command interrupt
4117 * because it does not scrape the FIFO properly
4118 * for reselection. See esp100_reconnect_hwbug()
4119 * to see how we try very hard to avoid this.
4121 ESPLOG(("esp%d: illegal command\n", esp
->esp_id
));
4123 esp_dump_state(esp
, eregs
, dregs
);
4126 /* Devices with very buggy firmware can drop BSY
4127 * during a scatter list interrupt when using sync
4128 * mode transfers. We continue the transfer as
4129 * expected, the target drops the bus, the ESP
4130 * gets confused, and we get a illegal command
4131 * interrupt because the bus is in the disconnected
4132 * state now and ESP_CMD_TI is only allowed when
4133 * a nexus is alive on the bus.
4135 ESPLOG(("esp%d: Forcing async and disabling disconnect for "
4136 "target %d\n", esp
->esp_id
, SCptr
->target
));
4137 SCptr
->device
->borken
= 1; /* foo on you */
4140 what_next
= do_reset_bus
;
4141 } else if(!(esp
->ireg
& ~(ESP_INTR_FDONE
| ESP_INTR_BSERV
| ESP_INTR_DC
))) {
4145 phase
= SCptr
->SCp
.phase
;
4146 if(phase
& in_phases_mask
) {
4147 what_next
= esp_work_bus(esp
, eregs
, dregs
);
4148 } else if(phase
& in_slct_mask
) {
4149 what_next
= esp_select_complete(esp
, eregs
, dregs
);
4151 ESPLOG(("esp%d: interrupt for no good reason...\n",
4153 what_next
= do_intr_end
;
4156 ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
4158 what_next
= do_reset_bus
;
4160 } else if(esp
->ireg
& ESP_INTR_SR
) {
4161 ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp
->esp_id
));
4162 what_next
= do_reset_complete
;
4163 } else if(esp
->ireg
& (ESP_INTR_S
| ESP_INTR_SATN
)) {
4164 ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
4166 what_next
= do_reset_bus
;
4167 } else if(esp
->ireg
& ESP_INTR_RSEL
) {
4170 what_next
= esp_do_reconnect(esp
, eregs
, dregs
);
4171 } else if(SCptr
->SCp
.phase
& in_slct_mask
) {
4172 /* Only selection code knows how to clean
4175 ESPDISC(("Reselected during selection attempt\n"));
4176 what_next
= esp_select_complete(esp
, eregs
, dregs
);
4178 ESPLOG(("esp%d: Reselected while bus is busy\n",
4180 what_next
= do_reset_bus
;
4184 /* This is tier-one in our dual level SCSI state machine. */
4186 while(what_next
!= do_intr_end
) {
4187 if (what_next
>= do_phase_determine
&&
4188 what_next
< do_intr_end
)
4189 what_next
= isvc_vector
[what_next
](esp
, eregs
, dregs
);
4191 /* state is completely lost ;-( */
4192 ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
4194 what_next
= do_reset_bus
;
4199 #ifndef __sparc_v9__
4202 static void esp_intr(int irq
, void *dev_id
, struct pt_regs
*pregs
)
4204 struct Sparc_ESP
*esp
;
4205 unsigned long flags
;
4208 /* Handle all ESP interrupts showing at this IRQ level. */
4209 spin_lock_irqsave(&io_request_lock
, flags
);
4213 if((esp
->irq
& 0xf) == irq
) {
4214 if(DMA_IRQ_P(esp
->dregs
)) {
4217 DMA_INTSOFF(esp
->dregs
);
4219 ESPIRQ(("I%d(", esp
->esp_id
));
4223 DMA_INTSON(esp
->dregs
);
4229 spin_unlock_irqrestore(&io_request_lock
, flags
);
4232 /* For SMP we only service one ESP on the list list at our IRQ level! */
4233 static void esp_intr(int irq
, void *dev_id
, struct pt_regs
*pregs
)
4235 struct Sparc_ESP
*esp
;
4236 unsigned long flags
;
4238 /* Handle all ESP interrupts showing at this IRQ level. */
4239 spin_lock_irqsave(&io_request_lock
, flags
);
4241 if(((esp
)->irq
& 0xf) == irq
) {
4242 if(DMA_IRQ_P(esp
->dregs
)) {
4243 DMA_INTSOFF(esp
->dregs
);
4245 ESPIRQ(("I[%d:%d](",
4246 smp_processor_id(), esp
->esp_id
));
4250 DMA_INTSON(esp
->dregs
);
4256 spin_unlock_irqrestore(&io_request_lock
, flags
);
4260 static void esp_intr_4d(int irq
, void *dev_id
, struct pt_regs
*pregs
)
4262 struct Sparc_ESP
*esp
= dev_id
;
4263 unsigned long flags
;
4265 spin_lock_irqsave(&io_request_lock
, flags
);
4266 if(DMA_IRQ_P(esp
->dregs
)) {
4267 DMA_INTSOFF(esp
->dregs
);
4269 ESPIRQ(("I[%d:%d](", smp_processor_id(), esp
->esp_id
));
4273 DMA_INTSON(esp
->dregs
);
4275 spin_unlock_irqrestore(&io_request_lock
, flags
);
4278 #else /* __sparc_v9__ */
4280 static void esp_intr(int irq
, void *dev_id
, struct pt_regs
*pregs
)
4282 struct Sparc_ESP
*esp
= dev_id
;
4283 unsigned long flags
;
4285 spin_lock_irqsave(&io_request_lock
, flags
);
4286 if(DMA_IRQ_P(esp
->dregs
)) {
4287 DMA_INTSOFF(esp
->dregs
);
4289 ESPIRQ(("I[%d:%d](", smp_processor_id(), esp
->esp_id
));
4293 DMA_INTSON(esp
->dregs
);
4295 spin_unlock_irqrestore(&io_request_lock
, flags
);