Add support for DragonFlyBSD target.
[binutils.git] / gas / config / tc-i386.c
Commit [+]AuthorDateLineData
e1a49b25 H.J. Lu2006-12-27 18:34:08 +00001/* tc-i386.c -- Assemble code for the Intel 80386
1d15d626 Nick Clifton2001-03-08 23:24:26 +00002 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
24d37da6 H.J. Lu2010-02-11 13:41:18 +00003 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00004 Free Software Foundation, Inc.
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +00005
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
5ae6f5fa Nick Clifton2007-07-03 11:01:12 +000010 the Free Software Foundation; either version 3, or (at your option)
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +000011 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
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Nick Clifton2005-05-05 09:13:19 +000020 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +000022
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Kazu Hirata2000-08-04 18:43:45 +000023/* Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +000025 x86_64 support by Jan Hubicka (jh@suse.cz)
24f9c390 Michal Ludvig2004-03-12 10:14:29 +000026 VIA PadLock support by Michal Ludvig (mludvig@suse.cz)
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Kazu Hirata2000-08-04 18:43:45 +000027 Bugs & suggestions are completely welcome. This is free software.
28 Please help us make it better. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +000029
aa2289c2 Richard Henderson1999-05-03 07:29:11 +000030#include "as.h"
75e56203 H.J. Lu2001-09-19 05:33:36 +000031#include "safe-ctype.h"
aa2289c2 Richard Henderson1999-05-03 07:29:11 +000032#include "subsegs.h"
437c1654 Richard Henderson2000-11-17 18:15:53 +000033#include "dwarf2dbg.h"
e25bbcb1 Alan Modra2003-05-20 07:58:07 +000034#include "dw2gencfi.h"
9f17dd73 Daniel Jacobowitz2004-10-08 13:55:11 +000035#include "elf/x86-64.h"
bcc882a9 H.J. Lu2007-09-09 01:22:57 +000036#include "opcodes/i386-init.h"
aa2289c2 Richard Henderson1999-05-03 07:29:11 +000037
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +000038#ifndef REGISTER_WARNINGS
39#define REGISTER_WARNINGS 1
40#endif
41
9d820096 Alan Modra1999-08-03 05:47:26 +000042#ifndef INFER_ADDR_PREFIX
c01badee Alan Modra1999-08-04 10:07:41 +000043#define INFER_ADDR_PREFIX 1
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Alan Modra1999-08-03 05:47:26 +000044#endif
45
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Alan Modra2002-03-09 05:36:51 +000046#ifndef DEFAULT_ARCH
47#define DEFAULT_ARCH "i386"
983e12a1 Daniel Jacobowitz2002-01-29 17:07:57 +000048#endif
aa2289c2 Richard Henderson1999-05-03 07:29:11 +000049
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Alan Modra2002-04-10 13:00:02 +000050#ifndef INLINE
51#if __GNUC__ >= 2
52#define INLINE __inline__
53#else
54#define INLINE
55#endif
56#endif
57
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H.J. Lu2008-01-22 19:16:45 +000058/* Prefixes will be emitted in the order defined below.
59 WAIT_PREFIX must be the first prefix since FWAIT is really is an
60 instruction, and so must come before any prefixes.
61 The preferred prefix order is SEG_PREFIX, ADDR_PREFIX, DATA_PREFIX,
24600a0d H.J. Lu2009-11-12 18:57:13 +000062 REP_PREFIX, LOCK_PREFIX. */
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H.J. Lu2008-01-22 19:16:45 +000063#define WAIT_PREFIX 0
64#define SEG_PREFIX 1
65#define ADDR_PREFIX 2
66#define DATA_PREFIX 3
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H.J. Lu2009-11-12 18:57:13 +000067#define REP_PREFIX 4
68#define LOCK_PREFIX 5
69#define REX_PREFIX 6 /* must come last. */
70#define MAX_PREFIXES 7 /* max prefixes per opcode */
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H.J. Lu2008-01-22 19:16:45 +000071
72/* we define the syntax here (modulo base,index,scale syntax) */
73#define REGISTER_PREFIX '%'
74#define IMMEDIATE_PREFIX '$'
75#define ABSOLUTE_PREFIX '*'
76
77/* these are the instruction mnemonic suffixes in AT&T syntax or
78 memory operand size in Intel syntax. */
79#define WORD_MNEM_SUFFIX 'w'
80#define BYTE_MNEM_SUFFIX 'b'
81#define SHORT_MNEM_SUFFIX 's'
82#define LONG_MNEM_SUFFIX 'l'
83#define QWORD_MNEM_SUFFIX 'q'
84#define XMMWORD_MNEM_SUFFIX 'x'
4dc46206 H.J. Lu2008-04-03 14:03:21 +000085#define YMMWORD_MNEM_SUFFIX 'y'
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H.J. Lu2008-01-22 19:16:45 +000086/* Intel Syntax. Use a non-ascii letter since since it never appears
87 in instructions. */
88#define LONG_DOUBLE_MNEM_SUFFIX '\1'
89
90#define END_OF_INSN '\0'
91
92/*
93 'templates' is for grouping together 'template' structures for opcodes
94 of the same name. This is only used for storing the insns in the grand
95 ole hash table of insns.
96 The templates themselves start at START and range up to (but not including)
97 END.
98 */
99typedef struct
100{
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Nick Clifton2009-08-29 22:11:02 +0000101 const insn_template *start;
102 const insn_template *end;
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H.J. Lu2008-01-22 19:16:45 +0000103}
104templates;
105
106/* 386 operand encoding bytes: see 386 book for details of this. */
107typedef struct
108{
109 unsigned int regmem; /* codes register or memory operand */
110 unsigned int reg; /* codes register operand (or extended opcode) */
111 unsigned int mode; /* how to interpret regmem & reg */
112}
113modrm_byte;
114
115/* x86-64 extension prefix. */
116typedef int rex_byte;
117
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H.J. Lu2008-01-22 19:16:45 +0000118/* 386 opcode byte to code indirect addressing. */
119typedef struct
120{
121 unsigned base;
122 unsigned index;
123 unsigned scale;
124}
125sib_byte;
126
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H.J. Lu2008-01-22 19:16:45 +0000127/* x86 arch names, types and features */
128typedef struct
129{
130 const char *name; /* arch name */
3e87535f H.J. Lu2009-12-10 02:51:39 +0000131 unsigned int len; /* arch string length */
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H.J. Lu2008-01-22 19:16:45 +0000132 enum processor_type type; /* arch type */
133 i386_cpu_flags flags; /* cpu feature flags */
3e87535f H.J. Lu2009-12-10 02:51:39 +0000134 unsigned int skip; /* show_arch should skip this. */
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000135 unsigned int negated; /* turn off indicated flags. */
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H.J. Lu2008-01-22 19:16:45 +0000136}
137arch_entry;
138
518c709a H.J. Lu2010-06-10 16:38:16 +0000139static void update_code_flag (int, int);
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H.J. Lu2007-01-03 22:36:19 +0000140static void set_code_flag (int);
141static void set_16bit_gcc_code_flag (int);
142static void set_intel_syntax (int);
f7f69592 H.J. Lu2007-12-24 05:27:39 +0000143static void set_intel_mnemonic (int);
277002d9 H.J. Lu2007-09-20 17:38:38 +0000144static void set_allow_index_reg (int);
3824acfd H.J. Lu2008-06-03 17:31:52 +0000145static void set_sse_check (int);
b354ba01 H.J. Lu2007-01-03 22:36:19 +0000146static void set_cpu_arch (int);
385264ac Nick Clifton2004-04-20 12:17:16 +0000147#ifdef TE_PE
b354ba01 H.J. Lu2007-01-03 22:36:19 +0000148static void pe_directive_secrel (int);
385264ac Nick Clifton2004-04-20 12:17:16 +0000149#endif
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H.J. Lu2007-01-03 22:36:19 +0000150static void signed_cons (int);
151static char *output_invalid (int c);
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Jan Beulich2009-04-20 06:31:50 +0000152static int i386_finalize_immediate (segT, expressionS *, i386_operand_type,
153 const char *);
154static int i386_finalize_displacement (segT, expressionS *, i386_operand_type,
155 const char *);
cfc01daf H.J. Lu2008-01-08 19:51:24 +0000156static int i386_att_operand (char *);
b354ba01 H.J. Lu2007-01-03 22:36:19 +0000157static int i386_intel_operand (char *, int);
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Jan Beulich2009-04-20 06:31:50 +0000158static int i386_intel_simplify (expressionS *);
159static int i386_intel_parse_name (const char *, expressionS *);
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H.J. Lu2007-01-03 22:36:19 +0000160static const reg_entry *parse_register (char *, char **);
161static char *parse_insn (char *, char *);
162static char *parse_operands (char *, const char *);
163static void swap_operands (void);
ef6c73cb H.J. Lu2007-01-28 16:14:33 +0000164static void swap_2_operands (int, int);
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H.J. Lu2007-01-03 22:36:19 +0000165static void optimize_imm (void);
166static void optimize_disp (void);
d0c9616f Nick Clifton2009-08-29 22:11:02 +0000167static const insn_template *match_template (void);
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H.J. Lu2007-01-03 22:36:19 +0000168static int check_string (void);
169static int process_suffix (void);
170static int check_byte_reg (void);
171static int check_long_reg (void);
172static int check_qword_reg (void);
173static int check_word_reg (void);
174static int finalize_imm (void);
175static int process_operands (void);
176static const seg_entry *build_modrm_byte (void);
177static void output_insn (void);
178static void output_imm (fragS *, offsetT);
179static void output_disp (fragS *, offsetT);
73d6cada Alan Modra2002-03-09 05:36:51 +0000180#ifndef I386COFF
b354ba01 H.J. Lu2007-01-03 22:36:19 +0000181static void s_bss (int);
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000182#endif
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H.J. Lu2005-07-27 14:08:08 +0000183#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
184static void handle_large_common (int small ATTRIBUTE_UNUSED);
185#endif
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000186
2f5832d5 Alan Modra2001-11-15 13:19:46 +0000187static const char *default_arch = DEFAULT_ARCH;
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +0000188
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H.J. Lu2008-04-03 14:03:21 +0000189/* VEX prefix. */
190typedef struct
191{
192 /* VEX prefix is either 2 byte or 3 byte. */
193 unsigned char bytes[3];
194 unsigned int length;
195 /* Destination or source register specifier. */
196 const reg_entry *register_specifier;
197} vex_prefix;
198
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000199/* 'md_assemble ()' gathers together information and puts it into a
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000200 i386_insn. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000201
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AM
Alan Modra2000-02-24 08:18:20 +0000202union i386_op
203 {
204 expressionS *disps;
205 expressionS *imms;
206 const reg_entry *regs;
207 };
208
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H.J. Lu2010-03-22 02:20:58 +0000209enum i386_error
210 {
041c6bda H.J. Lu2010-03-22 03:29:46 +0000211 operand_size_mismatch,
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H.J. Lu2010-03-22 02:20:58 +0000212 operand_type_mismatch,
213 register_type_mismatch,
214 number_of_operands_mismatch,
215 invalid_instruction_suffix,
216 bad_imm4,
217 old_gcc_only,
218 unsupported_with_intel_mnemonic,
219 unsupported_syntax,
220 unsupported
221 };
222
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Richard Henderson1999-05-03 07:29:11 +0000223struct _i386_insn
224 {
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000225 /* TM holds the template for the insn were currently assembling. */
d0c9616f Nick Clifton2009-08-29 22:11:02 +0000226 insn_template tm;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000227
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H.J. Lu2008-01-12 16:05:42 +0000228 /* SUFFIX holds the instruction size suffix for byte, word, dword
229 or qword, if given. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000230 char suffix;
231
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000232 /* OPERANDS gives the number of given operands. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000233 unsigned int operands;
234
235 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
236 of given register, displacement, memory operands and immediate
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000237 operands. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000238 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
239
240 /* TYPES [i] is the type (see above #defines) which tells us how to
3f1d1371 Alan Modra2000-02-24 08:18:20 +0000241 use OP[i] for the corresponding operand. */
bcc882a9 H.J. Lu2007-09-09 01:22:57 +0000242 i386_operand_type types[MAX_OPERANDS];
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000243
3f1d1371
AM
Alan Modra2000-02-24 08:18:20 +0000244 /* Displacement expression, immediate expression, or register for each
245 operand. */
246 union i386_op op[MAX_OPERANDS];
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000247
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Jan Hubicka2000-12-20 13:24:13 +0000248 /* Flags for operands. */
249 unsigned int flags[MAX_OPERANDS];
250#define Operand_PCrel 1
251
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000252 /* Relocation type for operand */
11dbd09e Alan Modra2003-08-14 08:05:44 +0000253 enum bfd_reloc_code_real reloc[MAX_OPERANDS];
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000254
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000255 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
256 the base index byte below. */
257 const reg_entry *base_reg;
258 const reg_entry *index_reg;
259 unsigned int log2_scale_factor;
260
261 /* SEG gives the seg_entries of this insn. They are zero unless
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000262 explicit segment overrides are given. */
435c3556 Alan Modra2000-10-05 01:49:36 +0000263 const seg_entry *seg[2];
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000264
265 /* PREFIX holds all the given prefix opcodes (usually null).
266 PREFIXES is the number of prefix opcodes. */
267 unsigned int prefixes;
268 unsigned char prefix[MAX_PREFIXES];
269
270 /* RM and SIB are the modrm byte and the sib byte where the
94e9ef08 Dwarakanath Rajagopal2009-05-22 15:57:25 +0000271 addressing modes of this insn are encoded. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000272 modrm_byte rm;
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +0000273 rex_byte rex;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000274 sib_byte sib;
4dc46206 H.J. Lu2008-04-03 14:03:21 +0000275 vex_prefix vex;
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H.J. Lu2008-12-20 17:40:51 +0000276
277 /* Swap operand in encoding. */
19d64f39 H.J. Lu2009-11-14 01:46:28 +0000278 unsigned int swap_operand;
36c10109 H.J. Lu2010-02-25 17:59:52 +0000279
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H.J. Lu2010-10-14 13:31:11 +0000280 /* Force 32bit displacement in encoding. */
281 unsigned int disp32_encoding;
282
36c10109 H.J. Lu2010-02-25 17:59:52 +0000283 /* Error message. */
f6ec67db H.J. Lu2010-03-22 02:20:58 +0000284 enum i386_error error;
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000285 };
286
287typedef struct _i386_insn i386_insn;
288
289/* List of chars besides those in app.c:symbol_chars that can start an
290 operand. Used to prevent the scrubber eating vital white-space. */
a3d4c9a7 Nick Clifton2004-06-18 14:55:49 +0000291const char extra_symbol_chars[] = "*%-(["
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000292#ifdef LEX_AT
a3d4c9a7
NC
Nick Clifton2004-06-18 14:55:49 +0000293 "@"
294#endif
295#ifdef LEX_QM
296 "?"
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000297#endif
a3d4c9a7 Nick Clifton2004-06-18 14:55:49 +0000298 ;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000299
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Alan Modra2002-03-09 05:36:51 +0000300#if (defined (TE_I386AIX) \
301 || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) \
c0f3f72a Alan Modra2005-11-16 03:44:10 +0000302 && !defined (TE_GNU) \
73d6cada Alan Modra2002-03-09 05:36:51 +0000303 && !defined (TE_LINUX) \
a3d4c9a7 Nick Clifton2004-06-18 14:55:49 +0000304 && !defined (TE_NETWARE) \
73d6cada Alan Modra2002-03-09 05:36:51 +0000305 && !defined (TE_FreeBSD) \
9f9a0b1a Nick Clifton2011-03-28 11:18:20 +0000306 && !defined (TE_DragonFly) \
73d6cada Alan Modra2002-03-09 05:36:51 +0000307 && !defined (TE_NetBSD)))
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000308/* This array holds the chars that always start a comment. If the
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AM
Alan Modra2005-11-07 06:01:18 +0000309 pre-processor is disabled, these aren't very useful. The option
310 --divide will remove '/' from this list. */
311const char *i386_comment_chars = "#/";
312#define SVR4_COMMENT_CHARS 1
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000313#define PREFIX_SEPARATOR '\\'
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000314
e8740c3b
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Alan Modra2005-11-07 06:01:18 +0000315#else
316const char *i386_comment_chars = "#";
317#define PREFIX_SEPARATOR '/'
318#endif
319
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000320/* This array holds the chars that only start a comment at the beginning of
321 a line. If the line seems to have the form '# 123 filename'
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Alan Modra2000-10-05 01:49:36 +0000322 .line and .file directives will appear in the pre-processed output.
323 Note that input_file.c hand checks for '#' at the beginning of the
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000324 first line of the input file. This is because the compiler outputs
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AM
Alan Modra2000-10-05 01:49:36 +0000325 #NO_APP at the beginning of its output.
326 Also note that comments started like this one will always work if
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000327 '/' isn't otherwise defined. */
e8740c3b Alan Modra2005-11-07 06:01:18 +0000328const char line_comment_chars[] = "#/";
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000329
38752062 Alan Modra2000-06-09 00:00:04 +0000330const char line_separator_chars[] = ";";
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000331
435c3556
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Alan Modra2000-10-05 01:49:36 +0000332/* Chars that can be used to separate mant from exp in floating point
333 nums. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000334const char EXP_CHARS[] = "eE";
335
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Alan Modra2000-10-05 01:49:36 +0000336/* Chars that mean this number is a floating point constant
337 As in 0f12.456
338 or 0d1.2345e12. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000339const char FLT_CHARS[] = "fFdDxX";
340
435c3556 Alan Modra2000-10-05 01:49:36 +0000341/* Tables for lexical analysis. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000342static char mnemonic_chars[256];
343static char register_chars[256];
344static char operand_chars[256];
345static char identifier_chars[256];
346static char digit_chars[256];
347
435c3556 Alan Modra2000-10-05 01:49:36 +0000348/* Lexical macros. */
aa2289c2
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Richard Henderson1999-05-03 07:29:11 +0000349#define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
350#define is_operand_char(x) (operand_chars[(unsigned char) x])
351#define is_register_char(x) (register_chars[(unsigned char) x])
352#define is_space_char(x) ((x) == ' ')
353#define is_identifier_char(x) (identifier_chars[(unsigned char) x])
354#define is_digit_char(x) (digit_chars[(unsigned char) x])
355
78c7b889 Kazu Hirata2003-11-21 14:38:06 +0000356/* All non-digit non-letter characters that may occur in an operand. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000357static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:[@]";
358
359/* md_assemble() always leaves the strings it's passed unaltered. To
360 effect this we maintain a stack of saved characters that we've smashed
361 with '\0's (indicating end of strings for various sub-fields of the
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000362 assembler instruction). */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000363static char save_stack[32];
435c3556 Alan Modra2000-10-05 01:49:36 +0000364static char *save_stack_p;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000365#define END_STRING_AND_SAVE(s) \
366 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
367#define RESTORE_END_STRING(s) \
368 do { *(s) = *--save_stack_p; } while (0)
369
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000370/* The instruction we're assembling. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000371static i386_insn i;
372
373/* Possible templates for current insn. */
374static const templates *current_templates;
375
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H.J. Lu2006-12-28 07:09:16 +0000376/* Per instruction expressionS buffers: max displacements & immediates. */
377static expressionS disp_expressions[MAX_MEMORY_OPERANDS];
378static expressionS im_expressions[MAX_IMMEDIATE_OPERANDS];
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000379
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000380/* Current operand we are working on. */
0ed176da Jan Beulich2009-04-20 06:31:50 +0000381static int this_operand = -1;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000382
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +0000383/* We support four different modes. FLAG_CODE variable is used to distinguish
384 these. */
385
386enum flag_code {
387 CODE_32BIT,
388 CODE_16BIT,
389 CODE_64BIT };
390
391static enum flag_code flag_code;
f655d074 Jan Beulich2005-08-22 12:37:37 +0000392static unsigned int object_64bit;
64fef30e H.J. Lu2011-01-16 17:06:11 +0000393static unsigned int disallow_64bit_reloc;
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +0000394static int use_rela_relocations = 0;
395
dfc89720
NC
Nick Clifton2011-01-10 10:10:05 +0000396#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
397 || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
398 || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
399
c4f7d3b9
L
H.J. Lu2010-12-31 00:33:30 +0000400/* The ELF ABI to use. */
401enum x86_elf_abi
402{
403 I386_ABI,
bf501893
L
H.J. Lu2011-01-15 15:48:01 +0000404 X86_64_ABI,
405 X86_64_X32_ABI
c4f7d3b9
L
H.J. Lu2010-12-31 00:33:30 +0000406};
407
408static enum x86_elf_abi x86_elf_abi = I386_ABI;
dfc89720 Nick Clifton2011-01-10 10:10:05 +0000409#endif
c4f7d3b9 H.J. Lu2010-12-31 00:33:30 +0000410
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +0000411/* The names used to print error messages. */
d3a44b93 Andreas Jaeger2001-01-08 09:37:43 +0000412static const char *flag_code_names[] =
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +0000413 {
414 "32",
415 "16",
416 "64"
417 };
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000418
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +0000419/* 1 for intel syntax,
420 0 if att syntax. */
421static int intel_syntax = 0;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000422
f7f69592
L
H.J. Lu2007-12-24 05:27:39 +0000423/* 1 for intel mnemonic,
424 0 if att mnemonic. */
425static int intel_mnemonic = !SYSV386_COMPAT;
426
21c23e36 H.J. Lu2007-12-24 06:10:17 +0000427/* 1 if support old (<= 2.8.1) versions of gcc. */
f7f69592
L
H.J. Lu2007-12-24 05:27:39 +0000428static int old_gcc = OLDGCC_COMPAT;
429
056676f7
JB
Jan Beulich2008-02-13 10:14:40 +0000430/* 1 if pseudo registers are permitted. */
431static int allow_pseudo_reg = 0;
432
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +0000433/* 1 if register prefix % not required. */
434static int allow_naked_reg = 0;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000435
547ff196 H.J. Lu2007-12-29 14:15:20 +0000436/* 1 if pseudo index register, eiz/riz, is allowed . */
277002d9
L
H.J. Lu2007-09-20 17:38:38 +0000437static int allow_index_reg = 0;
438
abc66fea
L
H.J. Lu2008-04-10 17:53:40 +0000439static enum
440 {
441 sse_check_none = 0,
442 sse_check_warning,
443 sse_check_error
444 }
445sse_check;
446
08fd9c64
L
H.J. Lu2007-01-04 18:03:31 +0000447/* Register prefix used for error message. */
448static const char *register_prefix = "%";
449
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +0000450/* Used in 16 bit gcc mode to add an l suffix to call, ret, enter,
451 leave, push, and pop instructions so that gcc has the same stack
452 frame as in 32 bit mode. */
453static char stackop_size = '\0';
c01badee Alan Modra1999-08-04 10:07:41 +0000454
912dab94
L
H.J. Lu2003-06-10 06:46:34 +0000455/* Non-zero to optimize code alignment. */
456int optimize_align_code = 1;
457
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +0000458/* Non-zero to quieten some warnings. */
459static int quiet_warnings = 0;
2658889f Alan Modra2000-05-13 12:49:55 +0000460
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +0000461/* CPU name. */
462static const char *cpu_arch_name = NULL;
b4aa1229 H.J. Lu2008-01-22 19:16:45 +0000463static char *cpu_sub_arch_name = NULL;
2658889f Alan Modra2000-05-13 12:49:55 +0000464
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000465/* CPU feature flags. */
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +0000466static i386_cpu_flags cpu_arch_flags = CPU_UNKNOWN_FLAGS;
467
b5235943
L
H.J. Lu2006-06-23 21:47:36 +0000468/* If we have selected a cpu we are generating instructions for. */
469static int cpu_arch_tune_set = 0;
470
e90ed00d H.J. Lu2006-06-16 15:46:11 +0000471/* Cpu we are generating instructions for. */
7414b498 H.J. Lu2008-10-12 12:37:09 +0000472enum processor_type cpu_arch_tune = PROCESSOR_UNKNOWN;
e90ed00d
L
H.J. Lu2006-06-16 15:46:11 +0000473
474/* CPU feature flags of cpu we are generating instructions for. */
bcc882a9 H.J. Lu2007-09-09 01:22:57 +0000475static i386_cpu_flags cpu_arch_tune_flags;
e90ed00d H.J. Lu2006-06-16 15:46:11 +0000476
b5235943 H.J. Lu2006-06-23 21:47:36 +0000477/* CPU instruction set architecture used. */
7414b498 H.J. Lu2008-10-12 12:37:09 +0000478enum processor_type cpu_arch_isa = PROCESSOR_UNKNOWN;
b5235943 H.J. Lu2006-06-23 21:47:36 +0000479
e90ed00d H.J. Lu2006-06-16 15:46:11 +0000480/* CPU feature flags of instruction set architecture used. */
7414b498 H.J. Lu2008-10-12 12:37:09 +0000481i386_cpu_flags cpu_arch_isa_flags;
e90ed00d H.J. Lu2006-06-16 15:46:11 +0000482
b09b4846
AM
Alan Modra2001-02-13 12:44:19 +0000483/* If set, conditional jumps are not automatically promoted to handle
484 larger than a byte offset. */
485static unsigned int no_cond_jump_promotion = 0;
486
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +0000487/* Encode SSE instructions with VEX prefix. */
488static unsigned int sse2avx;
489
d3e1dfc9
L
H.J. Lu2010-01-27 14:34:39 +0000490/* Encode scalar AVX instructions with specific vector length. */
491static enum
492 {
493 vex128 = 0,
494 vex256
495 } avxscalar;
496
73d6cada Alan Modra2002-03-09 05:36:51 +0000497/* Pre-defined "_GLOBAL_OFFSET_TABLE_". */
fa03d8e4 Ben Elliston2005-04-29 00:22:29 +0000498static symbolS *GOT_symbol;
73d6cada Alan Modra2002-03-09 05:36:51 +0000499
f4d41394
RH
Richard Henderson2003-05-27 16:52:49 +0000500/* The dwarf2 return column, adjusted for 32 or 64 bit. */
501unsigned int x86_dwarf2_return_column;
502
503/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
504int x86_cie_data_alignment;
505
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000506/* Interface to relax_segment.
b09b4846
AM
Alan Modra2001-02-13 12:44:19 +0000507 There are 3 major relax states for 386 jump insns because the
508 different types of jumps add different sizes to frags when we're
509 figuring out what sort of jump to choose to reach a given label. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000510
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000511/* Types. */
7077c9f5
AM
Alan Modra2001-03-30 00:06:10 +0000512#define UNCOND_JUMP 0
513#define COND_JUMP 1
514#define COND_JUMP86 2
b09b4846 Alan Modra2001-02-13 12:44:19 +0000515
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +0000516/* Sizes. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000517#define CODE16 1
518#define SMALL 0
73d6cada Alan Modra2002-03-09 05:36:51 +0000519#define SMALL16 (SMALL | CODE16)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000520#define BIG 2
73d6cada Alan Modra2002-03-09 05:36:51 +0000521#define BIG16 (BIG | CODE16)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000522
523#ifndef INLINE
524#ifdef __GNUC__
525#define INLINE __inline__
526#else
527#define INLINE
528#endif
529#endif
530
b09b4846
AM
Alan Modra2001-02-13 12:44:19 +0000531#define ENCODE_RELAX_STATE(type, size) \
532 ((relax_substateT) (((type) << 2) | (size)))
533#define TYPE_FROM_RELAX_STATE(s) \
534 ((s) >> 2)
535#define DISP_SIZE_FROM_RELAX_STATE(s) \
536 ((((s) & 3) == BIG ? 4 : (((s) & 3) == BIG16 ? 2 : 1)))
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000537
538/* This table is used by relax_frag to promote short jumps to long
539 ones where necessary. SMALL (short) jumps may be promoted to BIG
540 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
541 don't allow a short jump in a 32 bit code segment to be promoted to
542 a 16 bit offset jump because it's slower (requires data size
543 prefix), and doesn't work, unless the destination is in the bottom
544 64k of the code segment (The top 16 bits of eip are zeroed). */
545
546const relax_typeS md_relax_table[] =
547{
c5477d1b
AM
Alan Modra1999-08-03 14:30:05 +0000548 /* The fields are:
549 1) most positive reach of this state,
550 2) most negative reach of this state,
7077c9f5 Alan Modra2001-03-30 00:06:10 +0000551 3) how many bytes this mode will have in the variable part of the frag
435c3556 Alan Modra2000-10-05 01:49:36 +0000552 4) which index into the table to try if we can't fit into this one. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000553
b09b4846 Alan Modra2001-02-13 12:44:19 +0000554 /* UNCOND_JUMP states. */
7077c9f5
AM
Alan Modra2001-03-30 00:06:10 +0000555 {127 + 1, -128 + 1, 1, ENCODE_RELAX_STATE (UNCOND_JUMP, BIG)},
556 {127 + 1, -128 + 1, 1, ENCODE_RELAX_STATE (UNCOND_JUMP, BIG16)},
557 /* dword jmp adds 4 bytes to frag:
558 0 extra opcode bytes, 4 displacement bytes. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000559 {0, 0, 4, 0},
7077c9f5
AM
Alan Modra2001-03-30 00:06:10 +0000560 /* word jmp adds 2 byte2 to frag:
561 0 extra opcode bytes, 2 displacement bytes. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000562 {0, 0, 2, 0},
563
7077c9f5
AM
Alan Modra2001-03-30 00:06:10 +0000564 /* COND_JUMP states. */
565 {127 + 1, -128 + 1, 1, ENCODE_RELAX_STATE (COND_JUMP, BIG)},
566 {127 + 1, -128 + 1, 1, ENCODE_RELAX_STATE (COND_JUMP, BIG16)},
567 /* dword conditionals adds 5 bytes to frag:
568 1 extra opcode byte, 4 displacement bytes. */
569 {0, 0, 5, 0},
b09b4846 Alan Modra2001-02-13 12:44:19 +0000570 /* word conditionals add 3 bytes to frag:
7077c9f5
AM
Alan Modra2001-03-30 00:06:10 +0000571 1 extra opcode byte, 2 displacement bytes. */
572 {0, 0, 3, 0},
573
574 /* COND_JUMP86 states. */
575 {127 + 1, -128 + 1, 1, ENCODE_RELAX_STATE (COND_JUMP86, BIG)},
576 {127 + 1, -128 + 1, 1, ENCODE_RELAX_STATE (COND_JUMP86, BIG16)},
577 /* dword conditionals adds 5 bytes to frag:
578 1 extra opcode byte, 4 displacement bytes. */
579 {0, 0, 5, 0},
580 /* word conditionals add 4 bytes to frag:
581 1 displacement byte and a 3 byte long branch insn. */
582 {0, 0, 4, 0}
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000583};
584
e90ed00d
L
H.J. Lu2006-06-16 15:46:11 +0000585static const arch_entry cpu_arch[] =
586{
09d0384e
JB
Jan Beulich2010-06-10 07:10:02 +0000587 /* Do not replace the first two entries - i386_target_format()
588 relies on them being there in this order. */
3e87535f H.J. Lu2009-12-10 02:51:39 +0000589 { STRING_COMMA_LEN ("generic32"), PROCESSOR_GENERIC32,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000590 CPU_GENERIC32_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000591 { STRING_COMMA_LEN ("generic64"), PROCESSOR_GENERIC64,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000592 CPU_GENERIC64_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000593 { STRING_COMMA_LEN ("i8086"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000594 CPU_NONE_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000595 { STRING_COMMA_LEN ("i186"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000596 CPU_I186_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000597 { STRING_COMMA_LEN ("i286"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000598 CPU_I286_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000599 { STRING_COMMA_LEN ("i386"), PROCESSOR_I386,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000600 CPU_I386_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000601 { STRING_COMMA_LEN ("i486"), PROCESSOR_I486,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000602 CPU_I486_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000603 { STRING_COMMA_LEN ("i586"), PROCESSOR_PENTIUM,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000604 CPU_I586_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000605 { STRING_COMMA_LEN ("i686"), PROCESSOR_PENTIUMPRO,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000606 CPU_I686_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000607 { STRING_COMMA_LEN ("pentium"), PROCESSOR_PENTIUM,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000608 CPU_I586_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000609 { STRING_COMMA_LEN ("pentiumpro"), PROCESSOR_PENTIUMPRO,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000610 CPU_PENTIUMPRO_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000611 { STRING_COMMA_LEN ("pentiumii"), PROCESSOR_PENTIUMPRO,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000612 CPU_P2_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000613 { STRING_COMMA_LEN ("pentiumiii"),PROCESSOR_PENTIUMPRO,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000614 CPU_P3_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000615 { STRING_COMMA_LEN ("pentium4"), PROCESSOR_PENTIUM4,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000616 CPU_P4_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000617 { STRING_COMMA_LEN ("prescott"), PROCESSOR_NOCONA,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000618 CPU_CORE_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000619 { STRING_COMMA_LEN ("nocona"), PROCESSOR_NOCONA,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000620 CPU_NOCONA_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000621 { STRING_COMMA_LEN ("yonah"), PROCESSOR_CORE,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000622 CPU_CORE_FLAGS, 1, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000623 { STRING_COMMA_LEN ("core"), PROCESSOR_CORE,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000624 CPU_CORE_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000625 { STRING_COMMA_LEN ("merom"), PROCESSOR_CORE2,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000626 CPU_CORE2_FLAGS, 1, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000627 { STRING_COMMA_LEN ("core2"), PROCESSOR_CORE2,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000628 CPU_CORE2_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000629 { STRING_COMMA_LEN ("corei7"), PROCESSOR_COREI7,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000630 CPU_COREI7_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000631 { STRING_COMMA_LEN ("l1om"), PROCESSOR_L1OM,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000632 CPU_L1OM_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000633 { STRING_COMMA_LEN ("k6"), PROCESSOR_K6,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000634 CPU_K6_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000635 { STRING_COMMA_LEN ("k6_2"), PROCESSOR_K6,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000636 CPU_K6_2_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000637 { STRING_COMMA_LEN ("athlon"), PROCESSOR_ATHLON,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000638 CPU_ATHLON_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000639 { STRING_COMMA_LEN ("sledgehammer"), PROCESSOR_K8,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000640 CPU_K8_FLAGS, 1, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000641 { STRING_COMMA_LEN ("opteron"), PROCESSOR_K8,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000642 CPU_K8_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000643 { STRING_COMMA_LEN ("k8"), PROCESSOR_K8,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000644 CPU_K8_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000645 { STRING_COMMA_LEN ("amdfam10"), PROCESSOR_AMDFAM10,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000646 CPU_AMDFAM10_FLAGS, 0, 0 },
a2be5b1c spop2010-02-03 20:36:13 +0000647 { STRING_COMMA_LEN ("bdver1"), PROCESSOR_BDVER1,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000648 CPU_BDVER1_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000649 { STRING_COMMA_LEN (".8087"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000650 CPU_8087_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000651 { STRING_COMMA_LEN (".287"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000652 CPU_287_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000653 { STRING_COMMA_LEN (".387"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000654 CPU_387_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000655 { STRING_COMMA_LEN (".no87"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000656 CPU_ANY87_FLAGS, 0, 1 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000657 { STRING_COMMA_LEN (".mmx"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000658 CPU_MMX_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000659 { STRING_COMMA_LEN (".nommx"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000660 CPU_3DNOWA_FLAGS, 0, 1 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000661 { STRING_COMMA_LEN (".sse"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000662 CPU_SSE_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000663 { STRING_COMMA_LEN (".sse2"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000664 CPU_SSE2_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000665 { STRING_COMMA_LEN (".sse3"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000666 CPU_SSE3_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000667 { STRING_COMMA_LEN (".ssse3"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000668 CPU_SSSE3_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000669 { STRING_COMMA_LEN (".sse4.1"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000670 CPU_SSE4_1_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000671 { STRING_COMMA_LEN (".sse4.2"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000672 CPU_SSE4_2_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000673 { STRING_COMMA_LEN (".sse4"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000674 CPU_SSE4_2_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000675 { STRING_COMMA_LEN (".nosse"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000676 CPU_ANY_SSE_FLAGS, 0, 1 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000677 { STRING_COMMA_LEN (".avx"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000678 CPU_AVX_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000679 { STRING_COMMA_LEN (".noavx"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000680 CPU_ANY_AVX_FLAGS, 0, 1 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000681 { STRING_COMMA_LEN (".vmx"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000682 CPU_VMX_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000683 { STRING_COMMA_LEN (".smx"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000684 CPU_SMX_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000685 { STRING_COMMA_LEN (".xsave"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000686 CPU_XSAVE_FLAGS, 0, 0 },
97d31180 H.J. Lu2010-07-01 21:54:57 +0000687 { STRING_COMMA_LEN (".xsaveopt"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000688 CPU_XSAVEOPT_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000689 { STRING_COMMA_LEN (".aes"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000690 CPU_AES_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000691 { STRING_COMMA_LEN (".pclmul"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000692 CPU_PCLMUL_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000693 { STRING_COMMA_LEN (".clmul"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000694 CPU_PCLMUL_FLAGS, 1, 0 },
97d31180 H.J. Lu2010-07-01 21:54:57 +0000695 { STRING_COMMA_LEN (".fsgsbase"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000696 CPU_FSGSBASE_FLAGS, 0, 0 },
97d31180 H.J. Lu2010-07-01 21:54:57 +0000697 { STRING_COMMA_LEN (".rdrnd"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000698 CPU_RDRND_FLAGS, 0, 0 },
97d31180 H.J. Lu2010-07-01 21:54:57 +0000699 { STRING_COMMA_LEN (".f16c"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000700 CPU_F16C_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000701 { STRING_COMMA_LEN (".fma"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000702 CPU_FMA_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000703 { STRING_COMMA_LEN (".fma4"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000704 CPU_FMA4_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000705 { STRING_COMMA_LEN (".xop"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000706 CPU_XOP_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000707 { STRING_COMMA_LEN (".lwp"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000708 CPU_LWP_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000709 { STRING_COMMA_LEN (".movbe"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000710 CPU_MOVBE_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000711 { STRING_COMMA_LEN (".ept"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000712 CPU_EPT_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000713 { STRING_COMMA_LEN (".clflush"), PROCESSOR_UNKNOWN,
3f7bad27
L
H.J. Lu2010-08-06 18:22:48 +0000714 CPU_CLFLUSH_FLAGS, 0, 0 },
715 { STRING_COMMA_LEN (".nop"), PROCESSOR_UNKNOWN,
716 CPU_NOP_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000717 { STRING_COMMA_LEN (".syscall"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000718 CPU_SYSCALL_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000719 { STRING_COMMA_LEN (".rdtscp"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000720 CPU_RDTSCP_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000721 { STRING_COMMA_LEN (".3dnow"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000722 CPU_3DNOW_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000723 { STRING_COMMA_LEN (".3dnowa"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000724 CPU_3DNOWA_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000725 { STRING_COMMA_LEN (".padlock"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000726 CPU_PADLOCK_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000727 { STRING_COMMA_LEN (".pacifica"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000728 CPU_SVME_FLAGS, 1, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000729 { STRING_COMMA_LEN (".svme"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000730 CPU_SVME_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000731 { STRING_COMMA_LEN (".sse4a"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000732 CPU_SSE4A_FLAGS, 0, 0 },
3e87535f H.J. Lu2009-12-10 02:51:39 +0000733 { STRING_COMMA_LEN (".abm"), PROCESSOR_UNKNOWN,
3f7bad27 H.J. Lu2010-08-06 18:22:48 +0000734 CPU_ABM_FLAGS, 0, 0 },
d2df637e qneill2011-01-07 17:44:28 +0000735 { STRING_COMMA_LEN (".bmi"), PROCESSOR_UNKNOWN,
736 CPU_BMI_FLAGS, 0, 0 },
1568ec31 qneill2011-01-17 18:40:28 +0000737 { STRING_COMMA_LEN (".tbm"), PROCESSOR_UNKNOWN,
738 CPU_TBM_FLAGS, 0, 0 },
d541af7f
AM
Alan Modra2000-05-13 09:26:23 +0000739};
740
84bffc03 Nick Clifton2008-09-03 15:44:33 +0000741#ifdef I386COFF
944d4505
NC
Nick Clifton2008-09-03 14:02:30 +0000742/* Like s_lcomm_internal in gas/read.c but the alignment string
743 is allowed to be optional. */
744
745static symbolS *
746pe_lcomm_internal (int needs_align, symbolS *symbolP, addressT size)
747{
748 addressT align = 0;
749
750 SKIP_WHITESPACE ();
751
217a5cf4 H.J. Lu2009-06-29 17:44:37 +0000752 if (needs_align
944d4505
NC
Nick Clifton2008-09-03 14:02:30 +0000753 && *input_line_pointer == ',')
754 {
755 align = parse_align (needs_align - 1);
217a5cf4 H.J. Lu2009-06-29 17:44:37 +0000756
944d4505
NC
Nick Clifton2008-09-03 14:02:30 +0000757 if (align == (addressT) -1)
758 return NULL;
759 }
760 else
761 {
762 if (size >= 8)
763 align = 3;
764 else if (size >= 4)
765 align = 2;
766 else if (size >= 2)
767 align = 1;
768 else
769 align = 0;
770 }
771
772 bss_alloc (symbolP, size, align);
773 return symbolP;
774}
775
84bffc03 Nick Clifton2008-09-03 15:44:33 +0000776static void
944d4505
NC
Nick Clifton2008-09-03 14:02:30 +0000777pe_lcomm (int needs_align)
778{
779 s_comm_internal (needs_align * 2, pe_lcomm_internal);
780}
84bffc03 Nick Clifton2008-09-03 15:44:33 +0000781#endif
944d4505 Nick Clifton2008-09-03 14:02:30 +0000782
73d6cada
AM
Alan Modra2002-03-09 05:36:51 +0000783const pseudo_typeS md_pseudo_table[] =
784{
785#if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
786 {"align", s_align_bytes, 0},
787#else
788 {"align", s_align_ptwo, 0},
789#endif
790 {"arch", set_cpu_arch, 0},
791#ifndef I386COFF
792 {"bss", s_bss, 0},
944d4505
NC
Nick Clifton2008-09-03 14:02:30 +0000793#else
794 {"lcomm", pe_lcomm, 1},
73d6cada
AM
Alan Modra2002-03-09 05:36:51 +0000795#endif
796 {"ffloat", float_cons, 'f'},
797 {"dfloat", float_cons, 'd'},
798 {"tfloat", float_cons, 'x'},
799 {"value", cons, 2},
08bab77e Jan Beulich2005-09-28 14:44:25 +0000800 {"slong", signed_cons, 4},
73d6cada
AM
Alan Modra2002-03-09 05:36:51 +0000801 {"noopt", s_ignore, 0},
802 {"optim", s_ignore, 0},
803 {"code16gcc", set_16bit_gcc_code_flag, CODE_16BIT},
804 {"code16", set_code_flag, CODE_16BIT},
805 {"code32", set_code_flag, CODE_32BIT},
806 {"code64", set_code_flag, CODE_64BIT},
807 {"intel_syntax", set_intel_syntax, 1},
808 {"att_syntax", set_intel_syntax, 0},
f7f69592
L
H.J. Lu2007-12-24 05:27:39 +0000809 {"intel_mnemonic", set_intel_mnemonic, 1},
810 {"att_mnemonic", set_intel_mnemonic, 0},
277002d9
L
H.J. Lu2007-09-20 17:38:38 +0000811 {"allow_index_reg", set_allow_index_reg, 1},
812 {"disallow_index_reg", set_allow_index_reg, 0},
3824acfd H.J. Lu2008-06-03 17:31:52 +0000813 {"sse_check", set_sse_check, 0},
282f34f8
L
H.J. Lu2005-07-25 15:41:08 +0000814#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
815 {"largecomm", handle_large_common, 0},
b760a3c7 Richard Henderson2005-09-20 18:24:48 +0000816#else
b354ba01 H.J. Lu2007-01-03 22:36:19 +0000817 {"file", (void (*) (int)) dwarf2_directive_file, 0},
b760a3c7
RH
Richard Henderson2005-09-20 18:24:48 +0000818 {"loc", dwarf2_directive_loc, 0},
819 {"loc_mark_labels", dwarf2_directive_loc_mark_labels, 0},
282f34f8 H.J. Lu2005-07-25 15:41:08 +0000820#endif
385264ac
NC
Nick Clifton2004-04-20 12:17:16 +0000821#ifdef TE_PE
822 {"secrel32", pe_directive_secrel, 0},
823#endif
73d6cada
AM
Alan Modra2002-03-09 05:36:51 +0000824 {0, 0, 0}
825};
826
827/* For interface with expression (). */
828extern char *input_line_pointer;
829
830/* Hash table for instruction mnemonic lookup. */
831static struct hash_control *op_hash;
832
833/* Hash table for register lookup. */
834static struct hash_control *reg_hash;
835\f
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000836void
b354ba01 H.J. Lu2007-01-03 22:36:19 +0000837i386_align_code (fragS *fragP, int count)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000838{
435c3556
AM
Alan Modra2000-10-05 01:49:36 +0000839 /* Various efficient no-op patterns for aligning code labels.
840 Note: Don't try to assemble the instructions in the comments.
841 0L and 0w are not legal. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000842 static const char f32_1[] =
843 {0x90}; /* nop */
844 static const char f32_2[] =
b5235943 H.J. Lu2006-06-23 21:47:36 +0000845 {0x66,0x90}; /* xchg %ax,%ax */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000846 static const char f32_3[] =
847 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
848 static const char f32_4[] =
849 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
850 static const char f32_5[] =
851 {0x90, /* nop */
852 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
853 static const char f32_6[] =
854 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
855 static const char f32_7[] =
856 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
857 static const char f32_8[] =
858 {0x90, /* nop */
859 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
860 static const char f32_9[] =
861 {0x89,0xf6, /* movl %esi,%esi */
862 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
863 static const char f32_10[] =
864 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
865 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
866 static const char f32_11[] =
867 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
868 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
869 static const char f32_12[] =
870 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
871 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
872 static const char f32_13[] =
873 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
874 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
875 static const char f32_14[] =
876 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
877 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
9d820096
AM
Alan Modra1999-08-03 05:47:26 +0000878 static const char f16_3[] =
879 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000880 static const char f16_4[] =
881 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
882 static const char f16_5[] =
883 {0x90, /* nop */
884 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
885 static const char f16_6[] =
886 {0x89,0xf6, /* mov %si,%si */
887 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
888 static const char f16_7[] =
889 {0x8d,0x74,0x00, /* lea 0(%si),%si */
890 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
891 static const char f16_8[] =
892 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
893 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +0000894 static const char jump_31[] =
895 {0xeb,0x1d,0x90,0x90,0x90,0x90,0x90, /* jmp .+31; lotsa nops */
896 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90,
897 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90,
898 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000899 static const char *const f32_patt[] = {
900 f32_1, f32_2, f32_3, f32_4, f32_5, f32_6, f32_7, f32_8,
c14b2a0c H.J. Lu2007-07-23 20:03:23 +0000901 f32_9, f32_10, f32_11, f32_12, f32_13, f32_14
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +0000902 };
903 static const char *const f16_patt[] = {
c14b2a0c H.J. Lu2007-07-23 20:03:23 +0000904 f32_1, f32_2, f16_3, f16_4, f16_5, f16_6, f16_7, f16_8
aa2289c2 Richard Henderson1999-05-03 07:29:11 +0000905 };
b5235943
L
H.J. Lu2006-06-23 21:47:36 +0000906 /* nopl (%[re]ax) */
907 static const char alt_3[] =
908 {0x0f,0x1f,0x00};
909 /* nopl 0(%[re]ax) */
910 static const char alt_4[] =
911 {0x0f,0x1f,0x40,0x00};
912 /* nopl 0(%[re]ax,%[re]ax,1) */
913 static const char alt_5[] =
914 {0x0f,0x1f,0x44,0x00,0x00};
915 /* nopw 0(%[re]ax,%[re]ax,1) */
916 static const char alt_6[] =
917 {0x66,0x0f,0x1f,0x44,0x00,0x00};
918 /* nopl 0L(%[re]ax) */
919 static const char alt_7[] =
920 {0x0f,0x1f,0x80,0x00,0x00,0x00,0x00};
921 /* nopl 0L(%[re]ax,%[re]ax,1) */
922 static const char alt_8[] =
923 {0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
924 /* nopw 0L(%[re]ax,%[re]ax,1) */
925 static const char alt_9[] =
926 {0x66,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
927 /* nopw %cs:0L(%[re]ax,%[re]ax,1) */
928 static const char alt_10[] =
929 {0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
930 /* data16
931 nopw %cs:0L(%[re]ax,%[re]ax,1) */
932 static const char alt_long_11[] =
933 {0x66,
934 0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
935 /* data16
936 data16
937 nopw %cs:0L(%[re]ax,%[re]ax,1) */
938 static const char alt_long_12[] =
939 {0x66,
940 0x66,
941 0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
942 /* data16
943 data16
944 data16
945 nopw %cs:0L(%[re]ax,%[re]ax,1) */
946 static const char alt_long_13[] =
947 {0x66,
948 0x66,
949 0x66,
950 0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
951 /* data16
952 data16
953 data16
954 data16
955 nopw %cs:0L(%[re]ax,%[re]ax,1) */
956 static const char alt_long_14[] =
957 {0x66,
958 0x66,
959 0x66,
960 0x66,
961 0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
962 /* data16
963 data16
964 data16
965 data16
966 data16
967 nopw %cs:0L(%[re]ax,%[re]ax,1) */
968 static const char alt_long_15[] =
969 {0x66,
970 0x66,
971 0x66,
972 0x66,
973 0x66,
974 0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
975 /* nopl 0(%[re]ax,%[re]ax,1)
976 nopw 0(%[re]ax,%[re]ax,1) */
977 static const char alt_short_11[] =
978 {0x0f,0x1f,0x44,0x00,0x00,
979 0x66,0x0f,0x1f,0x44,0x00,0x00};
980 /* nopw 0(%[re]ax,%[re]ax,1)
981 nopw 0(%[re]ax,%[re]ax,1) */
982 static const char alt_short_12[] =
983 {0x66,0x0f,0x1f,0x44,0x00,0x00,
984 0x66,0x0f,0x1f,0x44,0x00,0x00};
985 /* nopw 0(%[re]ax,%[re]ax,1)
986 nopl 0L(%[re]ax) */
987 static const char alt_short_13[] =
988 {0x66,0x0f,0x1f,0x44,0x00,0x00,
989 0x0f,0x1f,0x80,0x00,0x00,0x00,0x00};
990 /* nopl 0L(%[re]ax)
991 nopl 0L(%[re]ax) */
992 static const char alt_short_14[] =
993 {0x0f,0x1f,0x80,0x00,0x00,0x00,0x00,
994 0x0f,0x1f,0x80,0x00,0x00,0x00,0x00};
995 /* nopl 0L(%[re]ax)
996 nopl 0L(%[re]ax,%[re]ax,1) */
997 static const char alt_short_15[] =
998 {0x0f,0x1f,0x80,0x00,0x00,0x00,0x00,
999 0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00};
1000 static const char *const alt_short_patt[] = {
1001 f32_1, f32_2, alt_3, alt_4, alt_5, alt_6, alt_7, alt_8,
1002 alt_9, alt_10, alt_short_11, alt_short_12, alt_short_13,
1003 alt_short_14, alt_short_15
1004 };
1005 static const char *const alt_long_patt[] = {
1006 f32_1, f32_2, alt_3, alt_4, alt_5, alt_6, alt_7, alt_8,
1007 alt_9, alt_10, alt_long_11, alt_long_12, alt_long_13,
1008 alt_long_14, alt_long_15
1009 };
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001010
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001011 /* Only align for at least a positive non-zero boundary. */
1012 if (count <= 0 || count > MAX_MEM_FOR_RS_ALIGN_CODE)
09b2f373 Jan Hubicka2002-07-16 22:31:19 +00001013 return;
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001014
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001015 /* We need to decide which NOP sequence to use for 32bit and
1016 64bit. When -mtune= is used:
64288991 Alan Modra2007-02-13 23:23:54 +00001017
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001018 1. For PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM and
1019 PROCESSOR_GENERIC32, f32_patt will be used.
1020 2. For PROCESSOR_PENTIUMPRO, PROCESSOR_PENTIUM4, PROCESSOR_NOCONA,
64c3b15b
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H.J. Lu2009-01-10 17:25:52 +00001021 PROCESSOR_CORE, PROCESSOR_CORE2, PROCESSOR_COREI7, and
1022 PROCESSOR_GENERIC64, alt_long_patt will be used.
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001023 3. For PROCESSOR_ATHLON, PROCESSOR_K6, PROCESSOR_K8 and
a2be5b1c spop2010-02-03 20:36:13 +00001024 PROCESSOR_AMDFAM10, and PROCESSOR_BDVER1, alt_short_patt
5f7c44df spop2010-01-06 22:52:46 +00001025 will be used.
b5235943 H.J. Lu2006-06-23 21:47:36 +00001026
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001027 When -mtune= isn't used, alt_long_patt will be used if
3f7bad27 H.J. Lu2010-08-06 18:22:48 +00001028 cpu_arch_isa_flags has CpuNop. Otherwise, f32_patt will
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001029 be used.
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001030
1031 When -march= or .arch is used, we can't use anything beyond
1032 cpu_arch_isa_flags. */
1033
1034 if (flag_code == CODE_16BIT)
1035 {
b5235943 H.J. Lu2006-06-23 21:47:36 +00001036 if (count > 8)
09b2f373 Jan Hubicka2002-07-16 22:31:19 +00001037 {
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001038 memcpy (fragP->fr_literal + fragP->fr_fix,
1039 jump_31, count);
1040 /* Adjust jump offset. */
1041 fragP->fr_literal[fragP->fr_fix + 1] = count - 2;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001042 }
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001043 else
1044 memcpy (fragP->fr_literal + fragP->fr_fix,
1045 f16_patt[count - 1], count);
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001046 }
09b2f373 Jan Hubicka2002-07-16 22:31:19 +00001047 else
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001048 {
1049 const char *const *patt = NULL;
1050
7414b498 H.J. Lu2008-10-12 12:37:09 +00001051 if (fragP->tc_frag_data.isa == PROCESSOR_UNKNOWN)
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001052 {
1053 /* PROCESSOR_UNKNOWN means that all ISAs may be used. */
1054 switch (cpu_arch_tune)
1055 {
1056 case PROCESSOR_UNKNOWN:
1057 /* We use cpu_arch_isa_flags to check if we SHOULD
3f7bad27
L
H.J. Lu2010-08-06 18:22:48 +00001058 optimize with nops. */
1059 if (fragP->tc_frag_data.isa_flags.bitfield.cpunop)
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001060 patt = alt_long_patt;
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001061 else
1062 patt = f32_patt;
1063 break;
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001064 case PROCESSOR_PENTIUM4:
1065 case PROCESSOR_NOCONA:
a2428d82 H.J. Lu2006-09-28 14:06:36 +00001066 case PROCESSOR_CORE:
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001067 case PROCESSOR_CORE2:
64c3b15b H.J. Lu2009-01-10 17:25:52 +00001068 case PROCESSOR_COREI7:
8dd40dce H.J. Lu2009-08-28 21:42:16 +00001069 case PROCESSOR_L1OM:
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001070 case PROCESSOR_GENERIC64:
1071 patt = alt_long_patt;
1072 break;
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001073 case PROCESSOR_K6:
1074 case PROCESSOR_ATHLON:
1075 case PROCESSOR_K8:
64288991 Alan Modra2007-02-13 23:23:54 +00001076 case PROCESSOR_AMDFAM10:
a2be5b1c spop2010-02-03 20:36:13 +00001077 case PROCESSOR_BDVER1:
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001078 patt = alt_short_patt;
1079 break;
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001080 case PROCESSOR_I386:
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001081 case PROCESSOR_I486:
1082 case PROCESSOR_PENTIUM:
39637246 H.J. Lu2011-02-08 20:21:25 +00001083 case PROCESSOR_PENTIUMPRO:
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001084 case PROCESSOR_GENERIC32:
1085 patt = f32_patt;
1086 break;
64288991 Alan Modra2007-02-13 23:23:54 +00001087 }
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001088 }
1089 else
1090 {
7414b498 H.J. Lu2008-10-12 12:37:09 +00001091 switch (fragP->tc_frag_data.tune)
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001092 {
1093 case PROCESSOR_UNKNOWN:
66510170 H.J. Lu2008-08-18 18:21:15 +00001094 /* When cpu_arch_isa is set, cpu_arch_tune shouldn't be
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001095 PROCESSOR_UNKNOWN. */
1096 abort ();
1097 break;
1098
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001099 case PROCESSOR_I386:
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001100 case PROCESSOR_I486:
1101 case PROCESSOR_PENTIUM:
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001102 case PROCESSOR_K6:
1103 case PROCESSOR_ATHLON:
1104 case PROCESSOR_K8:
64288991 Alan Modra2007-02-13 23:23:54 +00001105 case PROCESSOR_AMDFAM10:
a2be5b1c spop2010-02-03 20:36:13 +00001106 case PROCESSOR_BDVER1:
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001107 case PROCESSOR_GENERIC32:
1108 /* We use cpu_arch_isa_flags to check if we CAN optimize
3f7bad27
L
H.J. Lu2010-08-06 18:22:48 +00001109 with nops. */
1110 if (fragP->tc_frag_data.isa_flags.bitfield.cpunop)
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001111 patt = alt_short_patt;
1112 else
1113 patt = f32_patt;
1114 break;
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001115 case PROCESSOR_PENTIUMPRO:
1116 case PROCESSOR_PENTIUM4:
1117 case PROCESSOR_NOCONA:
1118 case PROCESSOR_CORE:
a2428d82 H.J. Lu2006-09-28 14:06:36 +00001119 case PROCESSOR_CORE2:
64c3b15b H.J. Lu2009-01-10 17:25:52 +00001120 case PROCESSOR_COREI7:
8dd40dce H.J. Lu2009-08-28 21:42:16 +00001121 case PROCESSOR_L1OM:
3f7bad27 H.J. Lu2010-08-06 18:22:48 +00001122 if (fragP->tc_frag_data.isa_flags.bitfield.cpunop)
b5235943
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H.J. Lu2006-06-23 21:47:36 +00001123 patt = alt_long_patt;
1124 else
1125 patt = f32_patt;
1126 break;
1127 case PROCESSOR_GENERIC64:
c14b2a0c H.J. Lu2007-07-23 20:03:23 +00001128 patt = alt_long_patt;
b5235943 H.J. Lu2006-06-23 21:47:36 +00001129 break;
64288991 Alan Modra2007-02-13 23:23:54 +00001130 }
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00001131 }
1132
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001133 if (patt == f32_patt)
1134 {
1135 /* If the padding is less than 15 bytes, we use the normal
1136 ones. Otherwise, we use a jump instruction and adjust
c4150252
L
H.J. Lu2009-07-21 17:50:21 +00001137 its offset. */
1138 int limit;
cf3c878e H.J. Lu2009-09-21 21:50:19 +00001139
c4150252
L
H.J. Lu2009-07-21 17:50:21 +00001140 /* For 64bit, the limit is 3 bytes. */
1141 if (flag_code == CODE_64BIT
1142 && fragP->tc_frag_data.isa_flags.bitfield.cpulm)
1143 limit = 3;
1144 else
1145 limit = 15;
1146 if (count < limit)
c14b2a0c
L
H.J. Lu2007-07-23 20:03:23 +00001147 memcpy (fragP->fr_literal + fragP->fr_fix,
1148 patt[count - 1], count);
1149 else
1150 {
1151 memcpy (fragP->fr_literal + fragP->fr_fix,
1152 jump_31, count);
1153 /* Adjust jump offset. */
1154 fragP->fr_literal[fragP->fr_fix + 1] = count - 2;
1155 }
1156 }
1157 else
1158 {
1159 /* Maximum length of an instruction is 15 byte. If the
1160 padding is greater than 15 bytes and we don't use jump,
1161 we have to break it into smaller pieces. */
1162 int padding = count;
1163 while (padding > 15)
1164 {
1165 padding -= 15;
1166 memcpy (fragP->fr_literal + fragP->fr_fix + padding,
1167 patt [14], 15);
1168 }
1169
1170 if (padding)
1171 memcpy (fragP->fr_literal + fragP->fr_fix,
1172 patt [padding - 1], padding);
1173 }
b5235943 H.J. Lu2006-06-23 21:47:36 +00001174 }
09b2f373 Jan Hubicka2002-07-16 22:31:19 +00001175 fragP->fr_var = count;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001176}
1177
a187a170 H.J. Lu2007-09-09 02:49:25 +00001178static INLINE int
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001179operand_type_all_zero (const union i386_operand_type *x)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001180{
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001181 switch (ARRAY_SIZE(x->array))
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001182 {
1183 case 3:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001184 if (x->array[2])
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001185 return 0;
1186 case 2:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001187 if (x->array[1])
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001188 return 0;
1189 case 1:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001190 return !x->array[0];
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001191 default:
1192 abort ();
1193 }
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001194}
1195
a187a170 H.J. Lu2007-09-09 02:49:25 +00001196static INLINE void
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001197operand_type_set (union i386_operand_type *x, unsigned int v)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001198{
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001199 switch (ARRAY_SIZE(x->array))
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001200 {
1201 case 3:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001202 x->array[2] = v;
a187a170 H.J. Lu2007-09-09 02:49:25 +00001203 case 2:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001204 x->array[1] = v;
a187a170 H.J. Lu2007-09-09 02:49:25 +00001205 case 1:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001206 x->array[0] = v;
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001207 break;
1208 default:
1209 abort ();
1210 }
1211}
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001212
a187a170 H.J. Lu2007-09-09 02:49:25 +00001213static INLINE int
469d9e85
L
H.J. Lu2008-02-14 22:54:02 +00001214operand_type_equal (const union i386_operand_type *x,
1215 const union i386_operand_type *y)
a187a170 H.J. Lu2007-09-09 02:49:25 +00001216{
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001217 switch (ARRAY_SIZE(x->array))
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001218 {
1219 case 3:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001220 if (x->array[2] != y->array[2])
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001221 return 0;
1222 case 2:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001223 if (x->array[1] != y->array[1])
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001224 return 0;
1225 case 1:
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001226 return x->array[0] == y->array[0];
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001227 break;
1228 default:
1229 abort ();
1230 }
1231}
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001232
469d9e85
L
H.J. Lu2008-02-14 22:54:02 +00001233static INLINE int
1234cpu_flags_all_zero (const union i386_cpu_flags *x)
1235{
1236 switch (ARRAY_SIZE(x->array))
1237 {
1238 case 3:
1239 if (x->array[2])
1240 return 0;
1241 case 2:
1242 if (x->array[1])
1243 return 0;
1244 case 1:
1245 return !x->array[0];
1246 default:
1247 abort ();
1248 }
1249}
1250
1251static INLINE void
1252cpu_flags_set (union i386_cpu_flags *x, unsigned int v)
1253{
1254 switch (ARRAY_SIZE(x->array))
1255 {
1256 case 3:
1257 x->array[2] = v;
1258 case 2:
1259 x->array[1] = v;
1260 case 1:
1261 x->array[0] = v;
1262 break;
1263 default:
1264 abort ();
1265 }
1266}
1267
1268static INLINE int
1269cpu_flags_equal (const union i386_cpu_flags *x,
1270 const union i386_cpu_flags *y)
1271{
1272 switch (ARRAY_SIZE(x->array))
1273 {
1274 case 3:
1275 if (x->array[2] != y->array[2])
1276 return 0;
1277 case 2:
1278 if (x->array[1] != y->array[1])
1279 return 0;
1280 case 1:
1281 return x->array[0] == y->array[0];
1282 break;
1283 default:
1284 abort ();
1285 }
1286}
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001287
1288static INLINE int
1289cpu_flags_check_cpu64 (i386_cpu_flags f)
1290{
1291 return !((flag_code == CODE_64BIT && f.bitfield.cpuno64)
1292 || (flag_code != CODE_64BIT && f.bitfield.cpu64));
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001293}
1294
a187a170 H.J. Lu2007-09-09 02:49:25 +00001295static INLINE i386_cpu_flags
a187a170 H.J. Lu2007-09-09 02:49:25 +00001296cpu_flags_and (i386_cpu_flags x, i386_cpu_flags y)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001297{
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001298 switch (ARRAY_SIZE (x.array))
1299 {
1300 case 3:
1301 x.array [2] &= y.array [2];
1302 case 2:
1303 x.array [1] &= y.array [1];
1304 case 1:
1305 x.array [0] &= y.array [0];
1306 break;
1307 default:
1308 abort ();
1309 }
1310 return x;
1311}
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001312
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001313static INLINE i386_cpu_flags
1314cpu_flags_or (i386_cpu_flags x, i386_cpu_flags y)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001315{
a187a170 H.J. Lu2007-09-09 02:49:25 +00001316 switch (ARRAY_SIZE (x.array))
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001317 {
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001318 case 3:
1319 x.array [2] |= y.array [2];
1320 case 2:
1321 x.array [1] |= y.array [1];
1322 case 1:
1323 x.array [0] |= y.array [0];
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001324 break;
1325 default:
1326 abort ();
1327 }
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001328 return x;
1329}
1330
2a3a7559
JB
Jan Beulich2009-07-24 15:41:20 +00001331static INLINE i386_cpu_flags
1332cpu_flags_and_not (i386_cpu_flags x, i386_cpu_flags y)
1333{
1334 switch (ARRAY_SIZE (x.array))
1335 {
1336 case 3:
1337 x.array [2] &= ~y.array [2];
1338 case 2:
1339 x.array [1] &= ~y.array [1];
1340 case 1:
1341 x.array [0] &= ~y.array [0];
1342 break;
1343 default:
1344 abort ();
1345 }
1346 return x;
1347}
1348
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001349#define CPU_FLAGS_ARCH_MATCH 0x1
1350#define CPU_FLAGS_64BIT_MATCH 0x2
a039313a H.J. Lu2008-08-20 18:38:40 +00001351#define CPU_FLAGS_AES_MATCH 0x4
fd7e0dd2
L
H.J. Lu2009-02-04 16:03:31 +00001352#define CPU_FLAGS_PCLMUL_MATCH 0x8
1353#define CPU_FLAGS_AVX_MATCH 0x10
4dc46206 H.J. Lu2008-04-03 14:03:21 +00001354
a039313a H.J. Lu2008-08-20 18:38:40 +00001355#define CPU_FLAGS_32BIT_MATCH \
fd7e0dd2
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H.J. Lu2009-02-04 16:03:31 +00001356 (CPU_FLAGS_ARCH_MATCH | CPU_FLAGS_AES_MATCH \
1357 | CPU_FLAGS_PCLMUL_MATCH | CPU_FLAGS_AVX_MATCH)
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001358#define CPU_FLAGS_PERFECT_MATCH \
1359 (CPU_FLAGS_32BIT_MATCH | CPU_FLAGS_64BIT_MATCH)
1360
1361/* Return CPU flags match bits. */
369b46a1 H.J. Lu2008-01-04 01:05:45 +00001362
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001363static int
d0c9616f Nick Clifton2009-08-29 22:11:02 +00001364cpu_flags_match (const insn_template *t)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001365{
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001366 i386_cpu_flags x = t->cpu_flags;
1367 int match = cpu_flags_check_cpu64 (x) ? CPU_FLAGS_64BIT_MATCH : 0;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001368
1369 x.bitfield.cpu64 = 0;
1370 x.bitfield.cpuno64 = 0;
1371
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001372 if (cpu_flags_all_zero (&x))
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001373 {
1374 /* This instruction is available on all archs. */
1375 match |= CPU_FLAGS_32BIT_MATCH;
1376 }
369b46a1
L
H.J. Lu2008-01-04 01:05:45 +00001377 else
1378 {
4dc46206 H.J. Lu2008-04-03 14:03:21 +00001379 /* This instruction is available only on some archs. */
369b46a1
L
H.J. Lu2008-01-04 01:05:45 +00001380 i386_cpu_flags cpu = cpu_arch_flags;
1381
1382 cpu.bitfield.cpu64 = 0;
1383 cpu.bitfield.cpuno64 = 0;
1384 cpu = cpu_flags_and (x, cpu);
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001385 if (!cpu_flags_all_zero (&cpu))
1386 {
a039313a
L
H.J. Lu2008-08-20 18:38:40 +00001387 if (x.bitfield.cpuavx)
1388 {
fd7e0dd2 H.J. Lu2009-02-04 16:03:31 +00001389 /* We only need to check AES/PCLMUL/SSE2AVX with AVX. */
a039313a
L
H.J. Lu2008-08-20 18:38:40 +00001390 if (cpu.bitfield.cpuavx)
1391 {
1392 /* Check SSE2AVX. */
1393 if (!t->opcode_modifier.sse2avx|| sse2avx)
1394 {
1395 match |= (CPU_FLAGS_ARCH_MATCH
1396 | CPU_FLAGS_AVX_MATCH);
1397 /* Check AES. */
1398 if (!x.bitfield.cpuaes || cpu.bitfield.cpuaes)
1399 match |= CPU_FLAGS_AES_MATCH;
fd7e0dd2
L
H.J. Lu2009-02-04 16:03:31 +00001400 /* Check PCLMUL. */
1401 if (!x.bitfield.cpupclmul
1402 || cpu.bitfield.cpupclmul)
1403 match |= CPU_FLAGS_PCLMUL_MATCH;
a039313a
L
H.J. Lu2008-08-20 18:38:40 +00001404 }
1405 }
1406 else
1407 match |= CPU_FLAGS_ARCH_MATCH;
1408 }
1409 else
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001410 match |= CPU_FLAGS_32BIT_MATCH;
1411 }
369b46a1 H.J. Lu2008-01-04 01:05:45 +00001412 }
4dc46206 H.J. Lu2008-04-03 14:03:21 +00001413 return match;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001414}
1415
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001416static INLINE i386_operand_type
1417operand_type_and (i386_operand_type x, i386_operand_type y)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001418{
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001419 switch (ARRAY_SIZE (x.array))
1420 {
1421 case 3:
1422 x.array [2] &= y.array [2];
1423 case 2:
1424 x.array [1] &= y.array [1];
1425 case 1:
1426 x.array [0] &= y.array [0];
1427 break;
1428 default:
1429 abort ();
1430 }
1431 return x;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001432}
1433
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001434static INLINE i386_operand_type
1435operand_type_or (i386_operand_type x, i386_operand_type y)
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001436{
a187a170 H.J. Lu2007-09-09 02:49:25 +00001437 switch (ARRAY_SIZE (x.array))
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001438 {
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001439 case 3:
1440 x.array [2] |= y.array [2];
1441 case 2:
1442 x.array [1] |= y.array [1];
1443 case 1:
1444 x.array [0] |= y.array [0];
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001445 break;
1446 default:
1447 abort ();
1448 }
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001449 return x;
1450}
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001451
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00001452static INLINE i386_operand_type
1453operand_type_xor (i386_operand_type x, i386_operand_type y)
1454{
1455 switch (ARRAY_SIZE (x.array))
1456 {
1457 case 3:
1458 x.array [2] ^= y.array [2];
1459 case 2:
1460 x.array [1] ^= y.array [1];
1461 case 1:
1462 x.array [0] ^= y.array [0];
1463 break;
1464 default:
1465 abort ();
1466 }
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001467 return x;
1468}
1469
1470static const i386_operand_type acc32 = OPERAND_TYPE_ACC32;
1471static const i386_operand_type acc64 = OPERAND_TYPE_ACC64;
1472static const i386_operand_type control = OPERAND_TYPE_CONTROL;
7ddd5c7b
L
H.J. Lu2008-02-16 16:16:48 +00001473static const i386_operand_type inoutportreg
1474 = OPERAND_TYPE_INOUTPORTREG;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001475static const i386_operand_type reg16_inoutportreg
1476 = OPERAND_TYPE_REG16_INOUTPORTREG;
1477static const i386_operand_type disp16 = OPERAND_TYPE_DISP16;
1478static const i386_operand_type disp32 = OPERAND_TYPE_DISP32;
1479static const i386_operand_type disp32s = OPERAND_TYPE_DISP32S;
1480static const i386_operand_type disp16_32 = OPERAND_TYPE_DISP16_32;
1481static const i386_operand_type anydisp
1482 = OPERAND_TYPE_ANYDISP;
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001483static const i386_operand_type regxmm = OPERAND_TYPE_REGXMM;
4dc46206 H.J. Lu2008-04-03 14:03:21 +00001484static const i386_operand_type regymm = OPERAND_TYPE_REGYMM;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001485static const i386_operand_type imm8 = OPERAND_TYPE_IMM8;
1486static const i386_operand_type imm8s = OPERAND_TYPE_IMM8S;
1487static const i386_operand_type imm16 = OPERAND_TYPE_IMM16;
1488static const i386_operand_type imm32 = OPERAND_TYPE_IMM32;
1489static const i386_operand_type imm32s = OPERAND_TYPE_IMM32S;
1490static const i386_operand_type imm64 = OPERAND_TYPE_IMM64;
1491static const i386_operand_type imm16_32 = OPERAND_TYPE_IMM16_32;
1492static const i386_operand_type imm16_32s = OPERAND_TYPE_IMM16_32S;
1493static const i386_operand_type imm16_32_32s = OPERAND_TYPE_IMM16_32_32S;
b8322856 spop2010-02-11 05:06:11 +00001494static const i386_operand_type vec_imm4 = OPERAND_TYPE_VEC_IMM4;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001495
1496enum operand_type
1497{
1498 reg,
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001499 imm,
1500 disp,
1501 anymem
1502};
1503
a187a170 H.J. Lu2007-09-09 02:49:25 +00001504static INLINE int
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001505operand_type_check (i386_operand_type t, enum operand_type c)
1506{
1507 switch (c)
1508 {
1509 case reg:
1510 return (t.bitfield.reg8
1511 || t.bitfield.reg16
1512 || t.bitfield.reg32
1513 || t.bitfield.reg64);
1514
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001515 case imm:
1516 return (t.bitfield.imm8
1517 || t.bitfield.imm8s
1518 || t.bitfield.imm16
1519 || t.bitfield.imm32
1520 || t.bitfield.imm32s
1521 || t.bitfield.imm64);
1522
1523 case disp:
1524 return (t.bitfield.disp8
1525 || t.bitfield.disp16
1526 || t.bitfield.disp32
1527 || t.bitfield.disp32s
1528 || t.bitfield.disp64);
1529
1530 case anymem:
1531 return (t.bitfield.disp8
1532 || t.bitfield.disp16
1533 || t.bitfield.disp32
1534 || t.bitfield.disp32s
1535 || t.bitfield.disp64
1536 || t.bitfield.baseindex);
1537
1538 default:
1539 abort ();
1540 }
39be8224
AM
Alan Modra2008-07-28 06:48:00 +00001541
1542 return 0;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001543}
1544
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001545/* Return 1 if there is no conflict in 8bit/16bit/32bit/64bit on
1546 operand J for instruction template T. */
1547
1548static INLINE int
d0c9616f Nick Clifton2009-08-29 22:11:02 +00001549match_reg_size (const insn_template *t, unsigned int j)
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001550{
1551 return !((i.types[j].bitfield.byte
1552 && !t->operand_types[j].bitfield.byte)
1553 || (i.types[j].bitfield.word
1554 && !t->operand_types[j].bitfield.word)
1555 || (i.types[j].bitfield.dword
1556 && !t->operand_types[j].bitfield.dword)
1557 || (i.types[j].bitfield.qword
1558 && !t->operand_types[j].bitfield.qword));
1559}
1560
1561/* Return 1 if there is no conflict in any size on operand J for
1562 instruction template T. */
1563
1564static INLINE int
d0c9616f Nick Clifton2009-08-29 22:11:02 +00001565match_mem_size (const insn_template *t, unsigned int j)
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001566{
1567 return (match_reg_size (t, j)
1568 && !((i.types[j].bitfield.unspecified
1569 && !t->operand_types[j].bitfield.unspecified)
1570 || (i.types[j].bitfield.fword
1571 && !t->operand_types[j].bitfield.fword)
1572 || (i.types[j].bitfield.tbyte
1573 && !t->operand_types[j].bitfield.tbyte)
1574 || (i.types[j].bitfield.xmmword
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00001575 && !t->operand_types[j].bitfield.xmmword)
1576 || (i.types[j].bitfield.ymmword
1577 && !t->operand_types[j].bitfield.ymmword)));
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001578}
1579
1580/* Return 1 if there is no size conflict on any operands for
1581 instruction template T. */
1582
1583static INLINE int
d0c9616f Nick Clifton2009-08-29 22:11:02 +00001584operand_size_match (const insn_template *t)
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001585{
1586 unsigned int j;
1587 int match = 1;
1588
1589 /* Don't check jump instructions. */
1590 if (t->opcode_modifier.jump
1591 || t->opcode_modifier.jumpbyte
1592 || t->opcode_modifier.jumpdword
1593 || t->opcode_modifier.jumpintersegment)
1594 return match;
1595
1596 /* Check memory and accumulator operand size. */
1597 for (j = 0; j < i.operands; j++)
1598 {
1599 if (t->operand_types[j].bitfield.anysize)
1600 continue;
1601
1602 if (t->operand_types[j].bitfield.acc && !match_reg_size (t, j))
1603 {
1604 match = 0;
1605 break;
1606 }
1607
1608 if (i.types[j].bitfield.mem && !match_mem_size (t, j))
1609 {
1610 match = 0;
1611 break;
1612 }
1613 }
1614
36c10109 H.J. Lu2010-02-25 17:59:52 +00001615 if (match)
192d0bb8 H.J. Lu2008-01-15 01:37:56 +00001616 return match;
36c10109
L
H.J. Lu2010-02-25 17:59:52 +00001617 else if (!t->opcode_modifier.d && !t->opcode_modifier.floatd)
1618 {
1619mismatch:
041c6bda H.J. Lu2010-03-22 03:29:46 +00001620 i.error = operand_size_mismatch;
36c10109
L
H.J. Lu2010-02-25 17:59:52 +00001621 return 0;
1622 }
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001623
1624 /* Check reverse. */
f8e34237 Nick Clifton2009-06-22 17:56:02 +00001625 gas_assert (i.operands == 2);
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001626
1627 match = 1;
1628 for (j = 0; j < 2; j++)
1629 {
1630 if (t->operand_types[j].bitfield.acc
1631 && !match_reg_size (t, j ? 0 : 1))
36c10109 H.J. Lu2010-02-25 17:59:52 +00001632 goto mismatch;
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001633
1634 if (i.types[j].bitfield.mem
1635 && !match_mem_size (t, j ? 0 : 1))
36c10109 H.J. Lu2010-02-25 17:59:52 +00001636 goto mismatch;
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001637 }
1638
1639 return match;
1640}
1641
a187a170 H.J. Lu2007-09-09 02:49:25 +00001642static INLINE int
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001643operand_type_match (i386_operand_type overlap,
1644 i386_operand_type given)
1645{
1646 i386_operand_type temp = overlap;
1647
1648 temp.bitfield.jumpabsolute = 0;
d3a3d9c8 H.J. Lu2008-01-12 16:05:42 +00001649 temp.bitfield.unspecified = 0;
192d0bb8
L
H.J. Lu2008-01-15 01:37:56 +00001650 temp.bitfield.byte = 0;
1651 temp.bitfield.word = 0;
1652 temp.bitfield.dword = 0;
1653 temp.bitfield.fword = 0;
1654 temp.bitfield.qword = 0;
1655 temp.bitfield.tbyte = 0;
1656 temp.bitfield.xmmword = 0;
4dc46206 H.J. Lu2008-04-03 14:03:21 +00001657 temp.bitfield.ymmword = 0;
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001658 if (operand_type_all_zero (&temp))
36c10109 H.J. Lu2010-02-25 17:59:52 +00001659 goto mismatch;
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001660
36c10109
L
H.J. Lu2010-02-25 17:59:52 +00001661 if (given.bitfield.baseindex == overlap.bitfield.baseindex
1662 && given.bitfield.jumpabsolute == overlap.bitfield.jumpabsolute)
1663 return 1;
1664
1665mismatch:
f6ec67db H.J. Lu2010-03-22 02:20:58 +00001666 i.error = operand_type_mismatch;
36c10109 H.J. Lu2010-02-25 17:59:52 +00001667 return 0;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001668}
1669
d3a3d9c8 H.J. Lu2008-01-12 16:05:42 +00001670/* If given types g0 and g1 are registers they must be of the same type
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001671 unless the expected operand type register overlap is null.
1672 Note that Acc in a template matches every size of reg. */
1673
a187a170 H.J. Lu2007-09-09 02:49:25 +00001674static INLINE int
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001675operand_type_register_match (i386_operand_type m0,
1676 i386_operand_type g0,
1677 i386_operand_type t0,
1678 i386_operand_type m1,
1679 i386_operand_type g1,
1680 i386_operand_type t1)
1681{
1682 if (!operand_type_check (g0, reg))
1683 return 1;
1684
1685 if (!operand_type_check (g1, reg))
1686 return 1;
1687
1688 if (g0.bitfield.reg8 == g1.bitfield.reg8
1689 && g0.bitfield.reg16 == g1.bitfield.reg16
1690 && g0.bitfield.reg32 == g1.bitfield.reg32
1691 && g0.bitfield.reg64 == g1.bitfield.reg64)
1692 return 1;
1693
1694 if (m0.bitfield.acc)
1695 {
1696 t0.bitfield.reg8 = 1;
1697 t0.bitfield.reg16 = 1;
1698 t0.bitfield.reg32 = 1;
1699 t0.bitfield.reg64 = 1;
1700 }
1701
1702 if (m1.bitfield.acc)
1703 {
1704 t1.bitfield.reg8 = 1;
1705 t1.bitfield.reg16 = 1;
1706 t1.bitfield.reg32 = 1;
1707 t1.bitfield.reg64 = 1;
1708 }
1709
36c10109
L
H.J. Lu2010-02-25 17:59:52 +00001710 if (!(t0.bitfield.reg8 & t1.bitfield.reg8)
1711 && !(t0.bitfield.reg16 & t1.bitfield.reg16)
1712 && !(t0.bitfield.reg32 & t1.bitfield.reg32)
1713 && !(t0.bitfield.reg64 & t1.bitfield.reg64))
1714 return 1;
1715
f6ec67db H.J. Lu2010-03-22 02:20:58 +00001716 i.error = register_type_mismatch;
36c10109
L
H.J. Lu2010-02-25 17:59:52 +00001717
1718 return 0;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001719}
1720
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001721static INLINE unsigned int
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001722mode_from_disp_size (i386_operand_type t)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001723{
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001724 if (t.bitfield.disp8)
1725 return 1;
1726 else if (t.bitfield.disp16
1727 || t.bitfield.disp32
1728 || t.bitfield.disp32s)
1729 return 2;
1730 else
1731 return 0;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001732}
1733
1734static INLINE int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001735fits_in_signed_byte (offsetT num)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001736{
1737 return (num >= -128) && (num <= 127);
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001738}
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001739
1740static INLINE int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001741fits_in_unsigned_byte (offsetT num)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001742{
1743 return (num & 0xff) == num;
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001744}
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001745
1746static INLINE int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001747fits_in_unsigned_word (offsetT num)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001748{
1749 return (num & 0xffff) == num;
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001750}
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001751
1752static INLINE int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001753fits_in_signed_word (offsetT num)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001754{
1755 return (-32768 <= num) && (num <= 32767);
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001756}
603a3ded H.J. Lu2006-12-15 19:43:59 +00001757
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001758static INLINE int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001759fits_in_signed_long (offsetT num ATTRIBUTE_UNUSED)
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00001760{
1761#ifndef BFD64
1762 return 1;
1763#else
1764 return (!(((offsetT) -1 << 31) & num)
1765 || (((offsetT) -1 << 31) & num) == ((offsetT) -1 << 31));
1766#endif
1767} /* fits_in_signed_long() */
603a3ded H.J. Lu2006-12-15 19:43:59 +00001768
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001769static INLINE int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001770fits_in_unsigned_long (offsetT num ATTRIBUTE_UNUSED)
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00001771{
1772#ifndef BFD64
1773 return 1;
1774#else
1775 return (num & (((offsetT) 2 << 31) - 1)) == num;
1776#endif
1777} /* fits_in_unsigned_long() */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001778
b8322856 spop2010-02-11 05:06:11 +00001779static INLINE int
1780fits_in_imm4 (offsetT num)
1781{
1782 return (num & 0xf) == num;
1783}
1784
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001785static i386_operand_type
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001786smallest_imm_type (offsetT num)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001787{
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001788 i386_operand_type t;
217a5cf4 H.J. Lu2009-06-29 17:44:37 +00001789
469d9e85 H.J. Lu2008-02-14 22:54:02 +00001790 operand_type_set (&t, 0);
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001791 t.bitfield.imm64 = 1;
1792
1793 if (cpu_arch_tune != PROCESSOR_I486 && num == 1)
d541af7f
AM
Alan Modra2000-05-13 09:26:23 +00001794 {
1795 /* This code is disabled on the 486 because all the Imm1 forms
1796 in the opcode table are slower on the i486. They're the
1797 versions with the implicitly specified single-position
1798 displacement, which has another syntax if you really want to
1799 use that form. */
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001800 t.bitfield.imm1 = 1;
1801 t.bitfield.imm8 = 1;
1802 t.bitfield.imm8s = 1;
1803 t.bitfield.imm16 = 1;
1804 t.bitfield.imm32 = 1;
1805 t.bitfield.imm32s = 1;
1806 }
1807 else if (fits_in_signed_byte (num))
1808 {
1809 t.bitfield.imm8 = 1;
1810 t.bitfield.imm8s = 1;
1811 t.bitfield.imm16 = 1;
1812 t.bitfield.imm32 = 1;
1813 t.bitfield.imm32s = 1;
1814 }
1815 else if (fits_in_unsigned_byte (num))
1816 {
1817 t.bitfield.imm8 = 1;
1818 t.bitfield.imm16 = 1;
1819 t.bitfield.imm32 = 1;
1820 t.bitfield.imm32s = 1;
1821 }
1822 else if (fits_in_signed_word (num) || fits_in_unsigned_word (num))
1823 {
1824 t.bitfield.imm16 = 1;
1825 t.bitfield.imm32 = 1;
1826 t.bitfield.imm32s = 1;
1827 }
1828 else if (fits_in_signed_long (num))
1829 {
1830 t.bitfield.imm32 = 1;
1831 t.bitfield.imm32s = 1;
1832 }
1833 else if (fits_in_unsigned_long (num))
1834 t.bitfield.imm32 = 1;
1835
1836 return t;
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001837}
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001838
134cbb16 Alan Modra2000-04-10 12:36:06 +00001839static offsetT
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001840offset_in_range (offsetT val, int size)
134cbb16 Alan Modra2000-04-10 12:36:06 +00001841{
67e9d690 H.J. Lu2000-04-18 17:46:31 +00001842 addressT mask;
93860435 Alan Modra2000-04-17 03:18:36 +00001843
134cbb16
AM
Alan Modra2000-04-10 12:36:06 +00001844 switch (size)
1845 {
67e9d690
L
H.J. Lu2000-04-18 17:46:31 +00001846 case 1: mask = ((addressT) 1 << 8) - 1; break;
1847 case 2: mask = ((addressT) 1 << 16) - 1; break;
2d564a02 Alan Modra2000-04-25 08:55:01 +00001848 case 4: mask = ((addressT) 2 << 31) - 1; break;
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00001849#ifdef BFD64
1850 case 8: mask = ((addressT) 2 << 63) - 1; break;
1851#endif
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001852 default: abort ();
134cbb16
AM
Alan Modra2000-04-10 12:36:06 +00001853 }
1854
5b58c53c
L
H.J. Lu2009-09-15 17:47:26 +00001855#ifdef BFD64
1856 /* If BFD64, sign extend val for 32bit address mode. */
1857 if (flag_code != CODE_64BIT
1858 || i.prefix[ADDR_PREFIX])
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00001859 if ((val & ~(((addressT) 2 << 31) - 1)) == 0)
1860 val = (val ^ ((addressT) 1 << 31)) - ((addressT) 1 << 31);
f67edf50 H.J. Lu2009-09-15 18:51:53 +00001861#endif
93860435 Alan Modra2000-04-17 03:18:36 +00001862
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00001863 if ((val & ~mask) != 0 && (val & ~mask) != ~mask)
134cbb16
AM
Alan Modra2000-04-10 12:36:06 +00001864 {
1865 char buf1[40], buf2[40];
1866
1867 sprint_value (buf1, val);
1868 sprint_value (buf2, val & mask);
1869 as_warn (_("%s shortened to %s"), buf1, buf2);
1870 }
1871 return val & mask;
1872}
1873
24600a0d
L
H.J. Lu2009-11-12 18:57:13 +00001874enum PREFIX_GROUP
1875{
1876 PREFIX_EXIST = 0,
1877 PREFIX_LOCK,
1878 PREFIX_REP,
1879 PREFIX_OTHER
1880};
1881
1882/* Returns
1883 a. PREFIX_EXIST if attempting to add a prefix where one from the
1884 same class already exists.
1885 b. PREFIX_LOCK if lock prefix is added.
1886 c. PREFIX_REP if rep/repne prefix is added.
1887 d. PREFIX_OTHER if other prefix is added.
1888 */
1889
1890static enum PREFIX_GROUP
b354ba01 H.J. Lu2007-01-03 22:36:19 +00001891add_prefix (unsigned int prefix)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001892{
24600a0d H.J. Lu2009-11-12 18:57:13 +00001893 enum PREFIX_GROUP ret = PREFIX_OTHER;
8607588d Jan Beulich2005-12-14 08:57:06 +00001894 unsigned int q;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001895
73d6cada
AM
Alan Modra2002-03-09 05:36:51 +00001896 if (prefix >= REX_OPCODE && prefix < REX_OPCODE + 16
1897 && flag_code == CODE_64BIT)
8607588d Jan Beulich2005-12-14 08:57:06 +00001898 {
b62d6aa9
L
H.J. Lu2007-03-21 21:23:44 +00001899 if ((i.prefix[REX_PREFIX] & prefix & REX_W)
1900 || ((i.prefix[REX_PREFIX] & (REX_R | REX_X | REX_B))
1901 && (prefix & (REX_R | REX_X | REX_B))))
24600a0d H.J. Lu2009-11-12 18:57:13 +00001902 ret = PREFIX_EXIST;
8607588d
JB
Jan Beulich2005-12-14 08:57:06 +00001903 q = REX_PREFIX;
1904 }
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001905 else
8607588d
JB
Jan Beulich2005-12-14 08:57:06 +00001906 {
1907 switch (prefix)
1908 {
1909 default:
1910 abort ();
1911
1912 case CS_PREFIX_OPCODE:
1913 case DS_PREFIX_OPCODE:
1914 case ES_PREFIX_OPCODE:
1915 case FS_PREFIX_OPCODE:
1916 case GS_PREFIX_OPCODE:
1917 case SS_PREFIX_OPCODE:
1918 q = SEG_PREFIX;
1919 break;
1920
1921 case REPNE_PREFIX_OPCODE:
1922 case REPE_PREFIX_OPCODE:
24600a0d
L
H.J. Lu2009-11-12 18:57:13 +00001923 q = REP_PREFIX;
1924 ret = PREFIX_REP;
1925 break;
1926
8607588d Jan Beulich2005-12-14 08:57:06 +00001927 case LOCK_PREFIX_OPCODE:
24600a0d
L
H.J. Lu2009-11-12 18:57:13 +00001928 q = LOCK_PREFIX;
1929 ret = PREFIX_LOCK;
8607588d
JB
Jan Beulich2005-12-14 08:57:06 +00001930 break;
1931
1932 case FWAIT_OPCODE:
1933 q = WAIT_PREFIX;
1934 break;
1935
1936 case ADDR_PREFIX_OPCODE:
1937 q = ADDR_PREFIX;
1938 break;
1939
1940 case DATA_PREFIX_OPCODE:
1941 q = DATA_PREFIX;
1942 break;
1943 }
1944 if (i.prefix[q] != 0)
24600a0d H.J. Lu2009-11-12 18:57:13 +00001945 ret = PREFIX_EXIST;
8607588d Jan Beulich2005-12-14 08:57:06 +00001946 }
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001947
8607588d Jan Beulich2005-12-14 08:57:06 +00001948 if (ret)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001949 {
8607588d
JB
Jan Beulich2005-12-14 08:57:06 +00001950 if (!i.prefix[q])
1951 ++i.prefixes;
1952 i.prefix[q] |= prefix;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001953 }
8607588d
JB
Jan Beulich2005-12-14 08:57:06 +00001954 else
1955 as_bad (_("same type of prefix used twice"));
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00001956
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00001957 return ret;
1958}
1959
1960static void
518c709a H.J. Lu2010-06-10 16:38:16 +00001961update_code_flag (int value, int check)
c01badee Alan Modra1999-08-04 10:07:41 +00001962{
518c709a
L
H.J. Lu2010-06-10 16:38:16 +00001963 PRINTF_LIKE ((*as_error));
1964
519e3c67 Nick Clifton2009-09-11 15:27:38 +00001965 flag_code = (enum flag_code) value;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001966 if (flag_code == CODE_64BIT)
1967 {
1968 cpu_arch_flags.bitfield.cpu64 = 1;
1969 cpu_arch_flags.bitfield.cpuno64 = 0;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001970 }
1971 else
1972 {
1973 cpu_arch_flags.bitfield.cpu64 = 0;
1974 cpu_arch_flags.bitfield.cpuno64 = 1;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00001975 }
1976 if (value == CODE_64BIT && !cpu_arch_flags.bitfield.cpulm )
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001977 {
518c709a
L
H.J. Lu2010-06-10 16:38:16 +00001978 if (check)
1979 as_error = as_fatal;
1980 else
1981 as_error = as_bad;
1982 (*as_error) (_("64bit mode not supported on `%s'."),
1983 cpu_arch_name ? cpu_arch_name : default_arch);
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001984 }
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00001985 if (value == CODE_32BIT && !cpu_arch_flags.bitfield.cpui386)
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001986 {
518c709a
L
H.J. Lu2010-06-10 16:38:16 +00001987 if (check)
1988 as_error = as_fatal;
1989 else
1990 as_error = as_bad;
1991 (*as_error) (_("32bit mode not supported on `%s'."),
1992 cpu_arch_name ? cpu_arch_name : default_arch);
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00001993 }
c01badee
AM
Alan Modra1999-08-04 10:07:41 +00001994 stackop_size = '\0';
1995}
1996
1997static void
518c709a
L
H.J. Lu2010-06-10 16:38:16 +00001998set_code_flag (int value)
1999{
2000 update_code_flag (value, 0);
2001}
2002
2003static void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002004set_16bit_gcc_code_flag (int new_code_flag)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002005{
519e3c67 Nick Clifton2009-09-11 15:27:38 +00002006 flag_code = (enum flag_code) new_code_flag;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00002007 if (flag_code != CODE_16BIT)
2008 abort ();
2009 cpu_arch_flags.bitfield.cpu64 = 0;
2010 cpu_arch_flags.bitfield.cpuno64 = 1;
99bd83b3 Jan Beulich2004-11-04 09:16:09 +00002011 stackop_size = LONG_MNEM_SUFFIX;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002012}
2013
2014static void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002015set_intel_syntax (int syntax_flag)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002016{
2017 /* Find out if register prefixing is specified. */
2018 int ask_naked_reg = 0;
2019
2020 SKIP_WHITESPACE ();
73d6cada Alan Modra2002-03-09 05:36:51 +00002021 if (!is_end_of_line[(unsigned char) *input_line_pointer])
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002022 {
2023 char *string = input_line_pointer;
2024 int e = get_symbol_end ();
2025
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002026 if (strcmp (string, "prefix") == 0)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002027 ask_naked_reg = 1;
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002028 else if (strcmp (string, "noprefix") == 0)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002029 ask_naked_reg = -1;
2030 else
ea2bad62 Alan Modra2000-03-26 14:13:02 +00002031 as_bad (_("bad argument to syntax directive."));
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002032 *input_line_pointer = e;
2033 }
2034 demand_empty_rest_of_line ();
9d820096 Alan Modra1999-08-03 05:47:26 +00002035
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002036 intel_syntax = syntax_flag;
2037
2038 if (ask_naked_reg == 0)
11dbd09e
AM
Alan Modra2003-08-14 08:05:44 +00002039 allow_naked_reg = (intel_syntax
2040 && (bfd_get_symbol_leading_char (stdoutput) != '\0'));
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002041 else
2042 allow_naked_reg = (ask_naked_reg < 0);
99bd83b3 Jan Beulich2004-11-04 09:16:09 +00002043
0ed176da Jan Beulich2009-04-20 06:31:50 +00002044 expr_set_rank (O_full_ptr, syntax_flag ? 10 : 0);
217a5cf4 H.J. Lu2009-06-29 17:44:37 +00002045
68f32e91 H.J. Lu2007-01-05 14:55:44 +00002046 identifier_chars['%'] = intel_syntax && allow_naked_reg ? '%' : 0;
99bd83b3 Jan Beulich2004-11-04 09:16:09 +00002047 identifier_chars['$'] = intel_syntax ? '$' : 0;
68f32e91 H.J. Lu2007-01-05 14:55:44 +00002048 register_prefix = allow_naked_reg ? "" : "%";
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002049}
2050
d541af7f Alan Modra2000-05-13 09:26:23 +00002051static void
f7f69592
L
H.J. Lu2007-12-24 05:27:39 +00002052set_intel_mnemonic (int mnemonic_flag)
2053{
fa47d042 H.J. Lu2008-01-05 17:07:25 +00002054 intel_mnemonic = mnemonic_flag;
f7f69592
L
H.J. Lu2007-12-24 05:27:39 +00002055}
2056
2057static void
277002d9
L
H.J. Lu2007-09-20 17:38:38 +00002058set_allow_index_reg (int flag)
2059{
2060 allow_index_reg = flag;
2061}
2062
2063static void
3824acfd
L
H.J. Lu2008-06-03 17:31:52 +00002064set_sse_check (int dummy ATTRIBUTE_UNUSED)
2065{
2066 SKIP_WHITESPACE ();
2067
2068 if (!is_end_of_line[(unsigned char) *input_line_pointer])
2069 {
2070 char *string = input_line_pointer;
2071 int e = get_symbol_end ();
2072
2073 if (strcmp (string, "none") == 0)
2074 sse_check = sse_check_none;
2075 else if (strcmp (string, "warning") == 0)
2076 sse_check = sse_check_warning;
2077 else if (strcmp (string, "error") == 0)
2078 sse_check = sse_check_error;
2079 else
2080 as_bad (_("bad argument to sse_check directive."));
2081 *input_line_pointer = e;
2082 }
2083 else
2084 as_bad (_("missing argument for sse_check directive"));
2085
2086 demand_empty_rest_of_line ();
2087}
2088
2089static void
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002090check_cpu_arch_compatible (const char *name ATTRIBUTE_UNUSED,
519e3c67 Nick Clifton2009-09-11 15:27:38 +00002091 i386_cpu_flags new_flag ATTRIBUTE_UNUSED)
a98cc4b0
L
H.J. Lu2009-07-25 14:58:58 +00002092{
2093#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2094 static const char *arch;
2095
2096 /* Intel LIOM is only supported on ELF. */
2097 if (!IS_ELF)
2098 return;
2099
2100 if (!arch)
2101 {
2102 /* Use cpu_arch_name if it is set in md_parse_option. Otherwise
2103 use default_arch. */
2104 arch = cpu_arch_name;
2105 if (!arch)
2106 arch = default_arch;
2107 }
2108
8dd40dce H.J. Lu2009-08-28 21:42:16 +00002109 /* If we are targeting Intel L1OM, we must enable it. */
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002110 if (get_elf_backend_data (stdoutput)->elf_machine_code != EM_L1OM
519e3c67 Nick Clifton2009-09-11 15:27:38 +00002111 || new_flag.bitfield.cpul1om)
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002112 return;
cf3c878e H.J. Lu2009-09-21 21:50:19 +00002113
a98cc4b0
L
H.J. Lu2009-07-25 14:58:58 +00002114 as_bad (_("`%s' is not supported on `%s'"), name, arch);
2115#endif
2116}
2117
2118static void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002119set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
d541af7f Alan Modra2000-05-13 09:26:23 +00002120{
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002121 SKIP_WHITESPACE ();
d541af7f Alan Modra2000-05-13 09:26:23 +00002122
73d6cada Alan Modra2002-03-09 05:36:51 +00002123 if (!is_end_of_line[(unsigned char) *input_line_pointer])
d541af7f
AM
Alan Modra2000-05-13 09:26:23 +00002124 {
2125 char *string = input_line_pointer;
2126 int e = get_symbol_end ();
5413b548 Nick Clifton2009-12-11 13:41:59 +00002127 unsigned int j;
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002128 i386_cpu_flags flags;
d541af7f Alan Modra2000-05-13 09:26:23 +00002129
5413b548 Nick Clifton2009-12-11 13:41:59 +00002130 for (j = 0; j < ARRAY_SIZE (cpu_arch); j++)
d541af7f Alan Modra2000-05-13 09:26:23 +00002131 {
5413b548 Nick Clifton2009-12-11 13:41:59 +00002132 if (strcmp (string, cpu_arch[j].name) == 0)
d541af7f Alan Modra2000-05-13 09:26:23 +00002133 {
5413b548 Nick Clifton2009-12-11 13:41:59 +00002134 check_cpu_arch_compatible (string, cpu_arch[j].flags);
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002135
4359bd7c
JB
Jan Beulich2004-11-23 07:55:12 +00002136 if (*string != '.')
2137 {
5413b548 Nick Clifton2009-12-11 13:41:59 +00002138 cpu_arch_name = cpu_arch[j].name;
4359bd7c Jan Beulich2004-11-23 07:55:12 +00002139 cpu_sub_arch_name = NULL;
5413b548 Nick Clifton2009-12-11 13:41:59 +00002140 cpu_arch_flags = cpu_arch[j].flags;
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00002141 if (flag_code == CODE_64BIT)
2142 {
2143 cpu_arch_flags.bitfield.cpu64 = 1;
2144 cpu_arch_flags.bitfield.cpuno64 = 0;
2145 }
2146 else
2147 {
2148 cpu_arch_flags.bitfield.cpu64 = 0;
2149 cpu_arch_flags.bitfield.cpuno64 = 1;
2150 }
5413b548
NC
Nick Clifton2009-12-11 13:41:59 +00002151 cpu_arch_isa = cpu_arch[j].type;
2152 cpu_arch_isa_flags = cpu_arch[j].flags;
b5235943
L
H.J. Lu2006-06-23 21:47:36 +00002153 if (!cpu_arch_tune_set)
2154 {
2155 cpu_arch_tune = cpu_arch_isa;
2156 cpu_arch_tune_flags = cpu_arch_isa_flags;
2157 }
4359bd7c
JB
Jan Beulich2004-11-23 07:55:12 +00002158 break;
2159 }
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002160
3f7bad27 H.J. Lu2010-08-06 18:22:48 +00002161 if (!cpu_arch[j].negated)
2a3a7559 Jan Beulich2009-07-24 15:41:20 +00002162 flags = cpu_flags_or (cpu_arch_flags,
5413b548 Nick Clifton2009-12-11 13:41:59 +00002163 cpu_arch[j].flags);
2a3a7559
JB
Jan Beulich2009-07-24 15:41:20 +00002164 else
2165 flags = cpu_flags_and_not (cpu_arch_flags,
e747bf3e H.J. Lu2010-08-06 19:46:59 +00002166 cpu_arch[j].flags);
469d9e85 H.J. Lu2008-02-14 22:54:02 +00002167 if (!cpu_flags_equal (&flags, &cpu_arch_flags))
4359bd7c Jan Beulich2004-11-23 07:55:12 +00002168 {
b4aa1229
L
H.J. Lu2008-01-22 19:16:45 +00002169 if (cpu_sub_arch_name)
2170 {
2171 char *name = cpu_sub_arch_name;
2172 cpu_sub_arch_name = concat (name,
5413b548 Nick Clifton2009-12-11 13:41:59 +00002173 cpu_arch[j].name,
ce2e7e29 Alan Modra2008-02-07 08:40:29 +00002174 (const char *) NULL);
b4aa1229
L
H.J. Lu2008-01-22 19:16:45 +00002175 free (name);
2176 }
2177 else
5413b548 Nick Clifton2009-12-11 13:41:59 +00002178 cpu_sub_arch_name = xstrdup (cpu_arch[j].name);
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002179 cpu_arch_flags = flags;
1c1a29a7 H.J. Lu2011-02-08 18:12:22 +00002180 cpu_arch_isa_flags = flags;
4359bd7c
JB
Jan Beulich2004-11-23 07:55:12 +00002181 }
2182 *input_line_pointer = e;
2183 demand_empty_rest_of_line ();
2184 return;
d541af7f
AM
Alan Modra2000-05-13 09:26:23 +00002185 }
2186 }
5413b548 Nick Clifton2009-12-11 13:41:59 +00002187 if (j >= ARRAY_SIZE (cpu_arch))
d541af7f
AM
Alan Modra2000-05-13 09:26:23 +00002188 as_bad (_("no such architecture: `%s'"), string);
2189
2190 *input_line_pointer = e;
2191 }
2192 else
2193 as_bad (_("missing cpu architecture"));
2194
b09b4846
AM
Alan Modra2001-02-13 12:44:19 +00002195 no_cond_jump_promotion = 0;
2196 if (*input_line_pointer == ','
73d6cada Alan Modra2002-03-09 05:36:51 +00002197 && !is_end_of_line[(unsigned char) input_line_pointer[1]])
b09b4846
AM
Alan Modra2001-02-13 12:44:19 +00002198 {
2199 char *string = ++input_line_pointer;
2200 int e = get_symbol_end ();
2201
2202 if (strcmp (string, "nojumps") == 0)
2203 no_cond_jump_promotion = 1;
2204 else if (strcmp (string, "jumps") == 0)
2205 ;
2206 else
2207 as_bad (_("no such architecture modifier: `%s'"), string);
2208
2209 *input_line_pointer = e;
2210 }
2211
d541af7f
AM
Alan Modra2000-05-13 09:26:23 +00002212 demand_empty_rest_of_line ();
2213}
2214
a98cc4b0
L
H.J. Lu2009-07-25 14:58:58 +00002215enum bfd_architecture
2216i386_arch (void)
2217{
8dd40dce H.J. Lu2009-08-28 21:42:16 +00002218 if (cpu_arch_isa == PROCESSOR_L1OM)
a98cc4b0
L
H.J. Lu2009-07-25 14:58:58 +00002219 {
2220 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
2221 || flag_code != CODE_64BIT)
2222 as_fatal (_("Intel L1OM is 64bit ELF only"));
2223 return bfd_arch_l1om;
2224 }
2225 else
2226 return bfd_arch_i386;
2227}
2228
2c40a3a3
JH
Jan Hubicka2001-01-13 23:37:57 +00002229unsigned long
2230i386_mach ()
2231{
c4f7d3b9 H.J. Lu2010-12-31 00:33:30 +00002232 if (!strncmp (default_arch, "x86_64", 6))
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002233 {
8dd40dce H.J. Lu2009-08-28 21:42:16 +00002234 if (cpu_arch_isa == PROCESSOR_L1OM)
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002235 {
c4f7d3b9
L
H.J. Lu2010-12-31 00:33:30 +00002236 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
2237 || default_arch[6] != '\0')
a98cc4b0
L
H.J. Lu2009-07-25 14:58:58 +00002238 as_fatal (_("Intel L1OM is 64bit ELF only"));
2239 return bfd_mach_l1om;
2240 }
c4f7d3b9 H.J. Lu2010-12-31 00:33:30 +00002241 else if (default_arch[6] == '\0')
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002242 return bfd_mach_x86_64;
c4f7d3b9
L
H.J. Lu2010-12-31 00:33:30 +00002243 else
2244 return bfd_mach_x64_32;
a98cc4b0 H.J. Lu2009-07-25 14:58:58 +00002245 }
2c40a3a3
JH
Jan Hubicka2001-01-13 23:37:57 +00002246 else if (!strcmp (default_arch, "i386"))
2247 return bfd_mach_i386_i386;
2248 else
2249 as_fatal (_("Unknown architecture"));
2250}
2c40a3a3 Jan Hubicka2001-01-13 23:37:57 +00002251\f
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002252void
2253md_begin ()
2254{
2255 const char *hash_err;
2256
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002257 /* Initialize op_hash hash table. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002258 op_hash = hash_new ();
2259
2260 {
d0c9616f Nick Clifton2009-08-29 22:11:02 +00002261 const insn_template *optab;
73d6cada Alan Modra2002-03-09 05:36:51 +00002262 templates *core_optab;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002263
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +00002264 /* Setup for loop. */
2265 optab = i386_optab;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002266 core_optab = (templates *) xmalloc (sizeof (templates));
2267 core_optab->start = optab;
2268
2269 while (1)
2270 {
2271 ++optab;
2272 if (optab->name == NULL
2273 || strcmp (optab->name, (optab - 1)->name) != 0)
2274 {
2275 /* different name --> ship out current template list;
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002276 add to hash table; & begin anew. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002277 core_optab->end = optab;
2278 hash_err = hash_insert (op_hash,
2279 (optab - 1)->name,
b12ec56f Alan Modra2008-08-12 23:39:31 +00002280 (void *) core_optab);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002281 if (hash_err)
2282 {
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002283 as_fatal (_("Internal Error: Can't hash %s: %s"),
2284 (optab - 1)->name,
2285 hash_err);
2286 }
2287 if (optab->name == NULL)
2288 break;
2289 core_optab = (templates *) xmalloc (sizeof (templates));
2290 core_optab->start = optab;
2291 }
2292 }
2293 }
2294
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002295 /* Initialize reg_hash hash table. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002296 reg_hash = hash_new ();
2297 {
73d6cada Alan Modra2002-03-09 05:36:51 +00002298 const reg_entry *regtab;
f6520c39 H.J. Lu2007-03-15 17:30:31 +00002299 unsigned int regtab_size = i386_regtab_size;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002300
f6520c39 H.J. Lu2007-03-15 17:30:31 +00002301 for (regtab = i386_regtab; regtab_size--; regtab++)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002302 {
b12ec56f Alan Modra2008-08-12 23:39:31 +00002303 hash_err = hash_insert (reg_hash, regtab->reg_name, (void *) regtab);
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002304 if (hash_err)
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00002305 as_fatal (_("Internal Error: Can't hash %s: %s"),
2306 regtab->reg_name,
2307 hash_err);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002308 }
2309 }
2310
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002311 /* Fill in lexical tables: mnemonic_chars, operand_chars. */
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002312 {
73d6cada
AM
Alan Modra2002-03-09 05:36:51 +00002313 int c;
2314 char *p;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002315
2316 for (c = 0; c < 256; c++)
2317 {
75e56203 H.J. Lu2001-09-19 05:33:36 +00002318 if (ISDIGIT (c))
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002319 {
2320 digit_chars[c] = c;
2321 mnemonic_chars[c] = c;
2322 register_chars[c] = c;
2323 operand_chars[c] = c;
2324 }
75e56203 H.J. Lu2001-09-19 05:33:36 +00002325 else if (ISLOWER (c))
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002326 {
2327 mnemonic_chars[c] = c;
2328 register_chars[c] = c;
2329 operand_chars[c] = c;
2330 }
75e56203 H.J. Lu2001-09-19 05:33:36 +00002331 else if (ISUPPER (c))
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002332 {
75e56203 H.J. Lu2001-09-19 05:33:36 +00002333 mnemonic_chars[c] = TOLOWER (c);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002334 register_chars[c] = mnemonic_chars[c];
2335 operand_chars[c] = c;
2336 }
2337
75e56203 H.J. Lu2001-09-19 05:33:36 +00002338 if (ISALPHA (c) || ISDIGIT (c))
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002339 identifier_chars[c] = c;
2340 else if (c >= 128)
2341 {
2342 identifier_chars[c] = c;
2343 operand_chars[c] = c;
2344 }
2345 }
2346
2347#ifdef LEX_AT
2348 identifier_chars['@'] = '@';
2349#endif
a3d4c9a7
NC
Nick Clifton2004-06-18 14:55:49 +00002350#ifdef LEX_QM
2351 identifier_chars['?'] = '?';
2352 operand_chars['?'] = '?';
2353#endif
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002354 digit_chars['-'] = '-';
4dc46206 H.J. Lu2008-04-03 14:03:21 +00002355 mnemonic_chars['_'] = '_';
a3719444 Mark Kettenis2005-04-18 20:59:20 +00002356 mnemonic_chars['-'] = '-';
bdae9ad6 H.J. Lu2007-03-23 16:17:21 +00002357 mnemonic_chars['.'] = '.';
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002358 identifier_chars['_'] = '_';
2359 identifier_chars['.'] = '.';
2360
2361 for (p = operand_special_chars; *p != '\0'; p++)
2362 operand_chars[(unsigned char) *p] = *p;
2363 }
2364
2365#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
e4607aca Jan Beulich2005-07-18 15:24:41 +00002366 if (IS_ELF)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002367 {
2368 record_alignment (text_section, 2);
2369 record_alignment (data_section, 2);
2370 record_alignment (bss_section, 2);
2371 }
2372#endif
f4d41394
RH
Richard Henderson2003-05-27 16:52:49 +00002373
2374 if (flag_code == CODE_64BIT)
2375 {
270cc020
KT
Kai Tietz2011-01-26 10:16:11 +00002376#if defined (OBJ_COFF) && defined (TE_PE)
2377 x86_dwarf2_return_column = (OUTPUT_FLAVOR == bfd_target_coff_flavour
2378 ? 32 : 16);
2379#else
f4d41394 Richard Henderson2003-05-27 16:52:49 +00002380 x86_dwarf2_return_column = 16;
270cc020 Kai Tietz2011-01-26 10:16:11 +00002381#endif
148bdaac H.J. Lu2011-03-05 04:31:40 +00002382 x86_cie_data_alignment = -8;
f4d41394
RH
Richard Henderson2003-05-27 16:52:49 +00002383 }
2384 else
2385 {
2386 x86_dwarf2_return_column = 8;
2387 x86_cie_data_alignment = -4;
2388 }
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002389}
2390
2391void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002392i386_print_statistics (FILE *file)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002393{
2394 hash_print_statistics (file, "i386 opcode", op_hash);
2395 hash_print_statistics (file, "i386 register", reg_hash);
2396}
2397\f
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002398#ifdef DEBUG386
2399
435c3556 Alan Modra2000-10-05 01:49:36 +00002400/* Debugging routines for md_assemble. */
d0c9616f Nick Clifton2009-08-29 22:11:02 +00002401static void pte (insn_template *);
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002402static void pt (i386_operand_type);
b354ba01
L
H.J. Lu2007-01-03 22:36:19 +00002403static void pe (expressionS *);
2404static void ps (symbolS *);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002405
2406static void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002407pi (char *line, i386_insn *x)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002408{
515f3c53 spop2010-06-08 15:42:28 +00002409 unsigned int j;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002410
2411 fprintf (stdout, "%s: template ", line);
2412 pte (&x->tm);
6b92e41d
JH
Jan Hubicka2001-01-03 16:27:41 +00002413 fprintf (stdout, " address: base %s index %s scale %x\n",
2414 x->base_reg ? x->base_reg->reg_name : "none",
2415 x->index_reg ? x->index_reg->reg_name : "none",
2416 x->log2_scale_factor);
2417 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x\n",
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002418 x->rm.mode, x->rm.reg, x->rm.regmem);
6b92e41d
JH
Jan Hubicka2001-01-03 16:27:41 +00002419 fprintf (stdout, " sib: base %x index %x scale %x\n",
2420 x->sib.base, x->sib.index, x->sib.scale);
2421 fprintf (stdout, " rex: 64bit %x extX %x extY %x extZ %x\n",
b62d6aa9
L
H.J. Lu2007-03-21 21:23:44 +00002422 (x->rex & REX_W) != 0,
2423 (x->rex & REX_R) != 0,
2424 (x->rex & REX_X) != 0,
2425 (x->rex & REX_B) != 0);
515f3c53 spop2010-06-08 15:42:28 +00002426 for (j = 0; j < x->operands; j++)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002427 {
515f3c53 spop2010-06-08 15:42:28 +00002428 fprintf (stdout, " #%d: ", j + 1);
2429 pt (x->types[j]);
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002430 fprintf (stdout, "\n");
515f3c53 spop2010-06-08 15:42:28 +00002431 if (x->types[j].bitfield.reg8
2432 || x->types[j].bitfield.reg16
2433 || x->types[j].bitfield.reg32
2434 || x->types[j].bitfield.reg64
2435 || x->types[j].bitfield.regmmx
2436 || x->types[j].bitfield.regxmm
2437 || x->types[j].bitfield.regymm
2438 || x->types[j].bitfield.sreg2
2439 || x->types[j].bitfield.sreg3
2440 || x->types[j].bitfield.control
2441 || x->types[j].bitfield.debug
2442 || x->types[j].bitfield.test)
2443 fprintf (stdout, "%s\n", x->op[j].regs->reg_name);
2444 if (operand_type_check (x->types[j], imm))
2445 pe (x->op[j].imms);
2446 if (operand_type_check (x->types[j], disp))
2447 pe (x->op[j].disps);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002448 }
2449}
2450
2451static void
d0c9616f Nick Clifton2009-08-29 22:11:02 +00002452pte (insn_template *t)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002453{
515f3c53 spop2010-06-08 15:42:28 +00002454 unsigned int j;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002455 fprintf (stdout, " %d operands ", t->operands);
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002456 fprintf (stdout, "opcode %x ", t->base_opcode);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002457 if (t->extension_opcode != None)
2458 fprintf (stdout, "ext %x ", t->extension_opcode);
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002459 if (t->opcode_modifier.d)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002460 fprintf (stdout, "D");
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002461 if (t->opcode_modifier.w)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002462 fprintf (stdout, "W");
2463 fprintf (stdout, "\n");
515f3c53 spop2010-06-08 15:42:28 +00002464 for (j = 0; j < t->operands; j++)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002465 {
515f3c53 spop2010-06-08 15:42:28 +00002466 fprintf (stdout, " #%d type ", j + 1);
2467 pt (t->operand_types[j]);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002468 fprintf (stdout, "\n");
2469 }
2470}
2471
2472static void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002473pe (expressionS *e)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002474{
c5477d1b Alan Modra1999-08-03 14:30:05 +00002475 fprintf (stdout, " operation %d\n", e->X_op);
4f88fa9b
AM
Alan Modra1999-07-28 23:19:26 +00002476 fprintf (stdout, " add_number %ld (%lx)\n",
2477 (long) e->X_add_number, (long) e->X_add_number);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002478 if (e->X_add_symbol)
2479 {
2480 fprintf (stdout, " add_symbol ");
2481 ps (e->X_add_symbol);
2482 fprintf (stdout, "\n");
2483 }
2484 if (e->X_op_symbol)
2485 {
2486 fprintf (stdout, " op_symbol ");
2487 ps (e->X_op_symbol);
2488 fprintf (stdout, "\n");
2489 }
2490}
2491
2492static void
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002493ps (symbolS *s)
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002494{
2495 fprintf (stdout, "%s type %s%s",
2496 S_GET_NAME (s),
2497 S_IS_EXTERNAL (s) ? "EXTERNAL " : "",
2498 segment_name (S_GET_SEGMENT (s)));
2499}
2500
0b2fec5a Andreas Jaeger2006-03-23 08:23:09 +00002501static struct type_name
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002502 {
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00002503 i386_operand_type mask;
2504 const char *name;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002505 }
0b2fec5a Andreas Jaeger2006-03-23 08:23:09 +00002506const type_names[] =
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002507{
bcc882a9
L
H.J. Lu2007-09-09 01:22:57 +00002508 { OPERAND_TYPE_REG8, "r8" },
2509 { OPERAND_TYPE_REG16, "r16" },
2510 { OPERAND_TYPE_REG32, "r32" },
2511 { OPERAND_TYPE_REG64, "r64" },
2512 { OPERAND_TYPE_IMM8, "i8" },
2513 { OPERAND_TYPE_IMM8, "i8s" },
2514 { OPERAND_TYPE_IMM16, "i16" },
2515 { OPERAND_TYPE_IMM32, "i32" },
2516 { OPERAND_TYPE_IMM32S, "i32s" },
2517 { OPERAND_TYPE_IMM64, "i64" },
2518 { OPERAND_TYPE_IMM1, "i1" },
2519 { OPERAND_TYPE_BASEINDEX, "BaseIndex" },
2520 { OPERAND_TYPE_DISP8, "d8" },
2521 { OPERAND_TYPE_DISP16, "d16" },
2522 { OPERAND_TYPE_DISP32, "d32" },
2523 { OPERAND_TYPE_DISP32S, "d32s" },
2524 { OPERAND_TYPE_DISP64, "d64" },
2525 { OPERAND_TYPE_INOUTPORTREG, "InOutPortReg" },
2526 { OPERAND_TYPE_SHIFTCOUNT, "ShiftCount" },
2527 { OPERAND_TYPE_CONTROL, "control reg" },
2528 { OPERAND_TYPE_TEST, "test reg" },
2529 { OPERAND_TYPE_DEBUG, "debug reg" },
2530 { OPERAND_TYPE_FLOATREG, "FReg" },
2531 { OPERAND_TYPE_FLOATACC, "FAcc" },
2532 { OPERAND_TYPE_SREG2, "SReg2" },
2533 { OPERAND_TYPE_SREG3, "SReg3" },
2534 { OPERAND_TYPE_ACC, "Acc" },
2535 { OPERAND_TYPE_JUMPABSOLUTE, "Jump Absolute" },
2536 { OPERAND_TYPE_REGMMX, "rMMX" },
2537 { OPERAND_TYPE_REGXMM, "rXMM" },
be10a480 H.J. Lu2009-02-23 23:05:21 +00002538 { OPERAND_TYPE_REGYMM, "rYMM" },
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002539 { OPERAND_TYPE_ESSEG, "es" },
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002540};
2541
2542static void
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002543pt (i386_operand_type t)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002544{
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002545 unsigned int j;
a187a170 H.J. Lu2007-09-09 02:49:25 +00002546 i386_operand_type a;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002547
bcc882a9 H.J. Lu2007-09-09 01:22:57 +00002548 for (j = 0; j < ARRAY_SIZE (type_names); j++)
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00002549 {
2550 a = operand_type_and (t, type_names[j].mask);
be10a480 H.J. Lu2009-02-23 23:05:21 +00002551 if (!operand_type_all_zero (&a))
a187a170
L
H.J. Lu2007-09-09 02:49:25 +00002552 fprintf (stdout, "%s, ", type_names[j].name);
2553 }
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002554 fflush (stdout);
2555}
2556
2557#endif /* DEBUG386 */
2558\f
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002559static bfd_reloc_code_real_type
9b094831 Jan Beulich2005-07-18 06:27:24 +00002560reloc (unsigned int size,
6286a6f8
AM
Alan Modra2006-04-18 10:11:09 +00002561 int pcrel,
2562 int sign,
2563 bfd_reloc_code_real_type other)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002564{
5cdd21c7 Kazu Hirata2000-08-04 18:43:45 +00002565 if (other != NO_RELOC)
9b094831 Jan Beulich2005-07-18 06:27:24 +00002566 {
5413b548 Nick Clifton2009-12-11 13:41:59 +00002567 reloc_howto_type *rel;
9b094831
JB
Jan Beulich2005-07-18 06:27:24 +00002568
2569 if (size == 8)
2570 switch (other)
2571 {
6286a6f8
AM
Alan Modra2006-04-18 10:11:09 +00002572 case BFD_RELOC_X86_64_GOT32:
2573 return BFD_RELOC_X86_64_GOT64;
2574 break;
2575 case BFD_RELOC_X86_64_PLTOFF64:
2576 return BFD_RELOC_X86_64_PLTOFF64;
2577 break;
2578 case BFD_RELOC_X86_64_GOTPC32:
2579 other = BFD_RELOC_X86_64_GOTPC64;
2580 break;
2581 case BFD_RELOC_X86_64_GOTPCREL:
2582 other = BFD_RELOC_X86_64_GOTPCREL64;
2583 break;
2584 case BFD_RELOC_X86_64_TPOFF32:
2585 other = BFD_RELOC_X86_64_TPOFF64;
2586 break;
2587 case BFD_RELOC_X86_64_DTPOFF32:
2588 other = BFD_RELOC_X86_64_DTPOFF64;
2589 break;
2590 default:
2591 break;
9b094831 Jan Beulich2005-07-18 06:27:24 +00002592 }
ec0e54d2
JB
Jan Beulich2005-09-28 15:31:21 +00002593
2594 /* Sign-checking 4-byte relocations in 16-/32-bit code is pointless. */
65043380 H.J. Lu2011-02-25 19:19:44 +00002595 if (size == 4 && (flag_code != CODE_64BIT || disallow_64bit_reloc))
ec0e54d2
JB
Jan Beulich2005-09-28 15:31:21 +00002596 sign = -1;
2597
5413b548
NC
Nick Clifton2009-12-11 13:41:59 +00002598 rel = bfd_reloc_type_lookup (stdoutput, other);
2599 if (!rel)
9b094831 Jan Beulich2005-07-18 06:27:24 +00002600 as_bad (_("unknown relocation (%u)"), other);
5413b548 Nick Clifton2009-12-11 13:41:59 +00002601 else if (size != bfd_get_reloc_size (rel))
9b094831 Jan Beulich2005-07-18 06:27:24 +00002602 as_bad (_("%u-byte relocation cannot be applied to %u-byte field"),
5413b548 Nick Clifton2009-12-11 13:41:59 +00002603 bfd_get_reloc_size (rel),
9b094831 Jan Beulich2005-07-18 06:27:24 +00002604 size);
5413b548 Nick Clifton2009-12-11 13:41:59 +00002605 else if (pcrel && !rel->pc_relative)
9b094831 Jan Beulich2005-07-18 06:27:24 +00002606 as_bad (_("non-pc-relative relocation for pc-relative field"));
5413b548 Nick Clifton2009-12-11 13:41:59 +00002607 else if ((rel->complain_on_overflow == complain_overflow_signed
9b094831 Jan Beulich2005-07-18 06:27:24 +00002608 && !sign)
5413b548 Nick Clifton2009-12-11 13:41:59 +00002609 || (rel->complain_on_overflow == complain_overflow_unsigned
6286a6f8 Alan Modra2006-04-18 10:11:09 +00002610 && sign > 0))
9b094831
JB
Jan Beulich2005-07-18 06:27:24 +00002611 as_bad (_("relocated field and relocation type differ in signedness"));
2612 else
2613 return other;
2614 return NO_RELOC;
2615 }
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002616
2617 if (pcrel)
2618 {
ab09f3c6 Jan Hubicka2000-12-20 13:24:13 +00002619 if (!sign)
9b094831 Jan Beulich2005-07-18 06:27:24 +00002620 as_bad (_("there are no unsigned pc-relative relocations"));
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002621 switch (size)
2622 {
2623 case 1: return BFD_RELOC_8_PCREL;
2624 case 2: return BFD_RELOC_16_PCREL;
2625 case 4: return BFD_RELOC_32_PCREL;
5bd6b9be Jan Beulich2005-06-17 08:03:59 +00002626 case 8: return BFD_RELOC_64_PCREL;
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002627 }
9b094831 Jan Beulich2005-07-18 06:27:24 +00002628 as_bad (_("cannot do %u byte pc-relative relocation"), size);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002629 }
2630 else
2631 {
9b094831 Jan Beulich2005-07-18 06:27:24 +00002632 if (sign > 0)
1031c4e1 Kazu Hirata2001-01-17 23:41:35 +00002633 switch (size)
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00002634 {
2635 case 4: return BFD_RELOC_X86_64_32S;
2636 }
2637 else
2638 switch (size)
2639 {
2640 case 1: return BFD_RELOC_8;
2641 case 2: return BFD_RELOC_16;
2642 case 4: return BFD_RELOC_32;
2643 case 8: return BFD_RELOC_64;
2644 }
9b094831
JB
Jan Beulich2005-07-18 06:27:24 +00002645 as_bad (_("cannot do %s %u byte relocation"),
2646 sign > 0 ? "signed" : "unsigned", size);
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002647 }
2648
fe576f65 Alan Modra2009-03-26 02:41:12 +00002649 return NO_RELOC;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002650}
2651
5cdd21c7
KH
Kazu Hirata2000-08-04 18:43:45 +00002652/* Here we decide which fixups can be adjusted to make them relative to
2653 the beginning of the section instead of the symbol. Basically we need
2654 to make sure that the dynamic relocations are done correctly, so in
2655 some cases we force the original symbol to be used. */
2656
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002657int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002658tc_i386_fix_adjustable (fixS *fixP ATTRIBUTE_UNUSED)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002659{
4617f133 DJ Delorie2000-06-25 01:33:31 +00002660#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
e4607aca Jan Beulich2005-07-18 15:24:41 +00002661 if (!IS_ELF)
2c95b4d3
AM
Alan Modra2002-08-10 14:49:48 +00002662 return 1;
2663
a1b21dcd
AM
Alan Modra2002-09-05 00:01:18 +00002664 /* Don't adjust pc-relative references to merge sections in 64-bit
2665 mode. */
2666 if (use_rela_relocations
2667 && (S_GET_SEGMENT (fixP->fx_addsy)->flags & SEC_MERGE) != 0
2668 && fixP->fx_pcrel)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002669 return 0;
2c95b4d3 Alan Modra2002-08-10 14:49:48 +00002670
8f1b4902
AJ
Andreas Jaeger2003-11-11 09:30:48 +00002671 /* The x86_64 GOTPCREL are represented as 32bit PCrel relocations
2672 and changed later by validate_fix. */
2673 if (GOT_symbol && fixP->fx_subsy == GOT_symbol
2674 && fixP->fx_r_type == BFD_RELOC_32_PCREL)
2675 return 0;
2676
435c3556 Alan Modra2000-10-05 01:49:36 +00002677 /* adjust_reloc_syms doesn't know about the GOT. */
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002678 if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF
2679 || fixP->fx_r_type == BFD_RELOC_386_PLT32
2680 || fixP->fx_r_type == BFD_RELOC_386_GOT32
97b22feb
JJ
Jakub Jelinek2002-05-23 13:12:53 +00002681 || fixP->fx_r_type == BFD_RELOC_386_TLS_GD
2682 || fixP->fx_r_type == BFD_RELOC_386_TLS_LDM
2683 || fixP->fx_r_type == BFD_RELOC_386_TLS_LDO_32
2684 || fixP->fx_r_type == BFD_RELOC_386_TLS_IE_32
5a085f05
JJ
Jakub Jelinek2002-09-19 19:01:18 +00002685 || fixP->fx_r_type == BFD_RELOC_386_TLS_IE
2686 || fixP->fx_r_type == BFD_RELOC_386_TLS_GOTIE
97b22feb
JJ
Jakub Jelinek2002-05-23 13:12:53 +00002687 || fixP->fx_r_type == BFD_RELOC_386_TLS_LE_32
2688 || fixP->fx_r_type == BFD_RELOC_386_TLS_LE
3db1a043
AO
Alexandre Oliva2006-01-18 21:07:51 +00002689 || fixP->fx_r_type == BFD_RELOC_386_TLS_GOTDESC
2690 || fixP->fx_r_type == BFD_RELOC_386_TLS_DESC_CALL
ab09f3c6
JH
Jan Hubicka2000-12-20 13:24:13 +00002691 || fixP->fx_r_type == BFD_RELOC_X86_64_PLT32
2692 || fixP->fx_r_type == BFD_RELOC_X86_64_GOT32
cd101f0f Andreas Jaeger2001-02-20 09:48:45 +00002693 || fixP->fx_r_type == BFD_RELOC_X86_64_GOTPCREL
32963c36
JJ
Jakub Jelinek2002-09-27 19:29:18 +00002694 || fixP->fx_r_type == BFD_RELOC_X86_64_TLSGD
2695 || fixP->fx_r_type == BFD_RELOC_X86_64_TLSLD
2696 || fixP->fx_r_type == BFD_RELOC_X86_64_DTPOFF32
5bd6b9be Jan Beulich2005-06-17 08:03:59 +00002697 || fixP->fx_r_type == BFD_RELOC_X86_64_DTPOFF64
32963c36
JJ
Jakub Jelinek2002-09-27 19:29:18 +00002698 || fixP->fx_r_type == BFD_RELOC_X86_64_GOTTPOFF
2699 || fixP->fx_r_type == BFD_RELOC_X86_64_TPOFF32
5bd6b9be
JB
Jan Beulich2005-06-17 08:03:59 +00002700 || fixP->fx_r_type == BFD_RELOC_X86_64_TPOFF64
2701 || fixP->fx_r_type == BFD_RELOC_X86_64_GOTOFF64
3db1a043
AO
Alexandre Oliva2006-01-18 21:07:51 +00002702 || fixP->fx_r_type == BFD_RELOC_X86_64_GOTPC32_TLSDESC
2703 || fixP->fx_r_type == BFD_RELOC_X86_64_TLSDESC_CALL
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002704 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2705 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2706 return 0;
2c95b4d3 Alan Modra2002-08-10 14:49:48 +00002707#endif
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002708 return 1;
2709}
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002710
efde0d12 Alan Modra1999-07-16 11:09:15 +00002711static int
b354ba01 H.J. Lu2007-01-03 22:36:19 +00002712intel_float_operand (const char *mnemonic)
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002713{
99bd83b3
JB
Jan Beulich2004-11-04 09:16:09 +00002714 /* Note that the value returned is meaningful only for opcodes with (memory)
2715 operands, hence the code here is free to improperly handle opcodes that
2716 have no operands (for better performance and smaller code). */
2717
2718 if (mnemonic[0] != 'f')
2719 return 0; /* non-math */
2720
2721 switch (mnemonic[1])
2722 {
2723 /* fclex, fdecstp, fdisi, femms, feni, fincstp, finit, fsetpm, and
2724 the fs segment override prefix not currently handled because no
2725 call path can make opcodes without operands get here */
2726 case 'i':
2727 return 2 /* integer op */;
2728 case 'l':
2729 if (mnemonic[2] == 'd' && (mnemonic[3] == 'c' || mnemonic[3] == 'e'))
2730 return 3; /* fldcw/fldenv */
2731 break;
2732 case 'n':
2733 if (mnemonic[2] != 'o' /* fnop */)
2734 return 3; /* non-waiting control op */
2735 break;
2736 case 'r':
2737 if (mnemonic[2] == 's')
2738 return 3; /* frstor/frstpm */
2739 break;
2740 case 's':
2741 if (mnemonic[2] == 'a')
2742 return 3; /* fsave */
2743 if (mnemonic[2] == 't')
2744 {
2745 switch (mnemonic[3])
2746 {
2747 case 'c': /* fstcw */
2748 case 'd': /* fstdw */
2749 case 'e': /* fstenv */
2750 case 's': /* fsts[gw] */
2751 return 3;
2752 }
2753 }
2754 break;
2755 case 'x':
2756 if (mnemonic[2] == 'r' || mnemonic[2] == 's')
2757 return 0; /* fxsave/fxrstor are not really math ops */
2758 break;
2759 }
aa2289c2 Richard Henderson1999-05-03 07:29:11 +00002760
99bd83b3 Jan Beulich2004-11-04 09:16:09 +00002761 return 1;
aa2289c2
RH
Richard Henderson1999-05-03 07:29:11 +00002762}
2763
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002764/* Build the VEX prefix. */
2765
2766static void
d0c9616f Nick Clifton2009-08-29 22:11:02 +00002767build_vex_prefix (const insn_template *t)
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002768{
2769 unsigned int register_specifier;
2770 unsigned int implied_prefix;
2771 unsigned int vector_length;
2772
2773 /* Check register specifier. */
2774 if (i.vex.register_specifier)
2775 {
2776 register_specifier = i.vex.register_specifier->reg_num;
2777 if ((i.vex.register_specifier->reg_flags & RegRex))
2778 register_specifier += 8;
2779 register_specifier = ~register_specifier & 0xf;
2780 }
2781 else
2782 register_specifier = 0xf;
2783
c5615800
L
H.J. Lu2008-12-23 15:14:15 +00002784 /* Use 2-byte VEX prefix by swappping destination and source
2785 operand. */
2786 if (!i.swap_operand
2787 && i.operands == i.reg_operands
d503cc23 H.J. Lu2009-12-16 15:43:15 +00002788 && i.tm.opcode_modifier.vexopcode == VEX0F
c5615800
L
H.J. Lu2008-12-23 15:14:15 +00002789 && i.tm.opcode_modifier.s
2790 && i.rex == REX_B)
2791 {
2792 unsigned int xchg = i.operands - 1;
2793 union i386_op temp_op;
2794 i386_operand_type temp_type;
2795
2796 temp_type = i.types[xchg];
2797 i.types[xchg] = i.types[0];
2798 i.types[0] = temp_type;
2799 temp_op = i.op[xchg];
2800 i.op[xchg] = i.op[0];
2801 i.op[0] = temp_op;
2802
f8e34237 Nick Clifton2009-06-22 17:56:02 +00002803 gas_assert (i.rm.mode == 3);
c5615800
L
H.J. Lu2008-12-23 15:14:15 +00002804
2805 i.rex = REX_R;
2806 xchg = i.rm.regmem;
2807 i.rm.regmem = i.rm.reg;
2808 i.rm.reg = xchg;
2809
2810 /* Use the next insn. */
2811 i.tm = t[1];
2812 }
2813
d3e1dfc9
L
H.J. Lu2010-01-27 14:34:39 +00002814 if (i.tm.opcode_modifier.vex == VEXScalar)
2815 vector_length = avxscalar;
2816 else
2817 vector_length = i.tm.opcode_modifier.vex == VEX256 ? 1 : 0;
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002818
2819 switch ((i.tm.base_opcode >> 8) & 0xff)
2820 {
2821 case 0:
2822 implied_prefix = 0;
2823 break;
2824 case DATA_PREFIX_OPCODE:
2825 implied_prefix = 1;
2826 break;
2827 case REPE_PREFIX_OPCODE:
2828 implied_prefix = 2;
2829 break;
2830 case REPNE_PREFIX_OPCODE:
2831 implied_prefix = 3;
2832 break;
2833 default:
2834 abort ();
2835 }
2836
2837 /* Use 2-byte VEX prefix if possible. */
d503cc23 H.J. Lu2009-12-16 15:43:15 +00002838 if (i.tm.opcode_modifier.vexopcode == VEX0F
43d1f272 H.J. Lu2010-09-09 21:12:37 +00002839 && i.tm.opcode_modifier.vexw != VEXW1
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002840 && (i.rex & (REX_W | REX_X | REX_B)) == 0)
2841 {
2842 /* 2-byte VEX prefix. */
2843 unsigned int r;
2844
2845 i.vex.length = 2;
2846 i.vex.bytes[0] = 0xc5;
2847
2848 /* Check the REX.R bit. */
2849 r = (i.rex & REX_R) ? 0 : 1;
2850 i.vex.bytes[1] = (r << 7
2851 | register_specifier << 3
2852 | vector_length << 2
2853 | implied_prefix);
2854 }
2855 else
2856 {
2857 /* 3-byte VEX prefix. */
2858 unsigned int m, w;
2859
096a520d spop2009-11-05 23:40:03 +00002860 i.vex.length = 3;
096a520d spop2009-11-05 23:40:03 +00002861
d503cc23 H.J. Lu2009-12-16 15:43:15 +00002862 switch (i.tm.opcode_modifier.vexopcode)
82a33812 spop2009-11-18 04:04:16 +00002863 {
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002864 case VEX0F:
2865 m = 0x1;
d029e7ff H.J. Lu2010-01-24 15:44:03 +00002866 i.vex.bytes[0] = 0xc4;
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002867 break;
2868 case VEX0F38:
2869 m = 0x2;
d029e7ff H.J. Lu2010-01-24 15:44:03 +00002870 i.vex.bytes[0] = 0xc4;
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002871 break;
2872 case VEX0F3A:
2873 m = 0x3;
d029e7ff H.J. Lu2010-01-24 15:44:03 +00002874 i.vex.bytes[0] = 0xc4;
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002875 break;
2876 case XOP08:
82a33812 spop2009-11-18 04:04:16 +00002877 m = 0x8;
2878 i.vex.bytes[0] = 0x8f;
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002879 break;
2880 case XOP09:
096a520d spop2009-11-05 23:40:03 +00002881 m = 0x9;
2882 i.vex.bytes[0] = 0x8f;
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002883 break;
2884 case XOP0A:
096a520d spop2009-11-05 23:40:03 +00002885 m = 0xa;
2886 i.vex.bytes[0] = 0x8f;
d503cc23
L
H.J. Lu2009-12-16 15:43:15 +00002887 break;
2888 default:
2889 abort ();
096a520d spop2009-11-05 23:40:03 +00002890 }
4dc46206 H.J. Lu2008-04-03 14:03:21 +00002891
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002892 /* The high 3 bits of the second VEX byte are 1's compliment
2893 of RXB bits from REX. */
2894 i.vex.bytes[1] = (~i.rex & 0x7) << 5 | m;
2895
2896 /* Check the REX.W bit. */
2897 w = (i.rex & REX_W) ? 1 : 0;
31ef6c7b H.J. Lu2009-12-16 02:10:43 +00002898 if (i.tm.opcode_modifier.vexw)
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002899 {
2900 if (w)
2901 abort ();
2902
31ef6c7b H.J. Lu2009-12-16 02:10:43 +00002903 if (i.tm.opcode_modifier.vexw == VEXW1)
4dc46206
L
H.J. Lu2008-04-03 14:03:21 +00002904 w = 1;
2905 }
2906
2907 i.vex.bytes[2] = (w << 7
2908 | register_specifier << 3
2909 | vector_length << 2
2910 | implied_prefix);
2911 }
2912}
2913
7ddd5c7b
L
H.J. Lu2008-02-16 16:16:48 +00002914static void
2915process_immext (void)
2916{
2917 expressionS *exp;
2918
2919 if (i.tm.cpu_flags.bitfield.cpusse3 && i.operands > 0)
2920 {
c9a6a072
L
H.J. Lu2008-02-17 00:26:19 +00002921 /* SSE3 Instructions have the fixed operands with an opcode
2922 suffix which is coded in the same place as an 8-bit immediate
2923 field would be. Here we check those operands and remove them
2924 afterwards. */
7ddd5c7b
L
H.J. Lu2008-02-16 16:16:48 +00002925 unsigned int x;
2926
2927 for (x = 0; x < i.operands; x++)
2928 if (i.op[x].regs->reg_num != x)
2929 as_bad (_("can't use register '%s%s' as operand %d in '%s'."),
c9a6a072
L
H.J. Lu2008-02-17 00:26:19 +00002930 register_prefix, i.op[x].regs->reg_name, x + 1,
2931 i.tm.name);
2932
2933 i.operands = 0;
7ddd5c7b
L
H.J. Lu2008-02-16 16:16:48 +00002934 }
2935
4dc46206 H.J. Lu2008-04-03 14:03:21 +00002936 /* These AMD 3DNow! and SSE2 instructions have an opcode suffix
7ddd5c7b
L
H.J. Lu2008-02-16 16:16:48 +00002937 which is coded in the same place as an 8-bit immediate field
2938 would be. Here we fake an 8-bit immediate operand from the
2939 opcode suffix stored in tm.extension_opcode.
2940
94e9ef08 Dwarakanath Rajagopal2009-05-22 15:57:25 +00002