Enable FIQ interrupt handling on BCM mailboxes. Each CPU core has four of them and...
commit779b4cd59795871ab9031e7a5950b0244bc72a65
authorschulz <schulz@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Thu, 30 Apr 2015 18:07:47 +0000 (30 18:07 +0000)
committerschulz <schulz@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Thu, 30 Apr 2015 18:07:47 +0000 (30 18:07 +0000)
treeea8fe80ef2b110f24e5c73e1986a842f20176917
parent3202164fa957d8282c4e828a0d590db29caf20b9
Enable FIQ interrupt handling on BCM mailboxes. Each CPU core has four of them and they all generate a FIQ. The handler is already working and it acknowledges incomming messages. Additionaly FIQ stacks are created.

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@50539 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
arch/arm-native/kernel/kernel_cpu.c
arch/arm-native/kernel/kernel_startup.c
arch/arm-native/kernel/platform_bcm2708.c