| commit | afab56958f1cbb47b831ee3ebff231dfbae74af2 | |
| author | Vineet Gupta <vgupta@synopsys.com> | |
| Thu, 19 Feb 2015 13:43:59 +0000 (19 19:13 +0530) | ||
| committer | Bernhard Reutner-Fischer <rep.dot.nop@gmail.com> | |
| Fri, 20 Feb 2015 10:30:20 +0000 (20 11:30 +0100) | ||
| tree | c6fdf19ecb770319d72048c7c56bd71964d52948 | treesnapshot (tar.gz zip) |
| parent | 89b63496e88c31c2714e42656212078388718b78 | commitdiff |
ARCv2 ISA support
This is next gen Instruction Set Architecture from Synopsys and basis
for the ARC HS family of processors.
http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802
http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
This is next gen Instruction Set Architecture from Synopsys and basis
for the ARC HS family of processors.
http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802
http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>