| commit | c7bd1cb3db98e4e537c6eac095e1a8625267f21d | |
| author | Jeff Connelly <shellreef+git@gmail.com> | |
| Thu, 10 Jul 2008 05:04:10 +0000 (9 22:04 -0700) | ||
| committer | Jeff Connelly <shellreef+git@gmail.com> | |
| Thu, 10 Jul 2008 05:04:10 +0000 (9 22:04 -0700) | ||
| tree | ec69caf14aef516df03496b3364fe8ca9134f2ee | treesnapshot (tar.gz zip) |
| parent | b93469c6a2ad4eaed98da3792fdfc54b6837794f | commitdiff |
Logic board: Reroute, and manually route this one Vss trace.
For some reason (bug in FreePCB?), there was a missing trace
in revision 1 of the logic board, necessitating cancellation
of the order. This is revision 2, where I manually routed the
connection.
For some reason (bug in FreePCB?), there was a missing trace
in revision 1 of the logic board, necessitating cancellation
of the order. This is revision 2, where I manually routed the
connection.
