| commit | fb1fb8219ccf4813d63edf8c40fddc756e0c60cc | |
| author | Michael Matz <matz@suse.de> | |
| Wed, 15 Apr 2020 22:00:13 +0000 (16 00:00 +0200) | ||
| committer | Michael Matz <matz@suse.de> | |
| Wed, 15 Apr 2020 22:02:32 +0000 (16 00:02 +0200) | ||
| tree | 9e1316b5053c0a6ca897b8b789526d3c392fb7ff | treesnapshot (tar.gz zip) |
| parent | 2f943902235f9ee2269828a7b832b484d9b65050 | commitdiff |
riscv64: fcvt.d.s doesn't need a rounding mode
it doesn't round so the RM field can be zero. According to some
sourcs it should be set to zero by software in these cases, and
the binutils disassembler doesn't like us setting it to 7.
This shouldn't matter in practice, but who knows.
it doesn't round so the RM field can be zero. According to some
sourcs it should be set to zero by software in these cases, and
the binutils disassembler doesn't like us setting it to 7.
This shouldn't matter in practice, but who knows.
| riscv64-gen.c | diffblobblamehistory |