PCI: Mask writes to RO bits in the command reg of PCI config space
commit475dc65f6d33d8f457d5731c38618b0b3d4e127c
authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 18 Dec 2008 22:43:40 +0000 (18 22:43 +0000)
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 18 Dec 2008 22:43:40 +0000 (18 22:43 +0000)
tree6ecdf4863bec8c4d42d8f259239afb6d70a90829
parent8098ed414ada4265f646e94d65eca063b3689f50
PCI: Mask writes to RO bits in the command reg of PCI config space

The Command register in the PCI config space has some read-only bits.
Any writes to those bits should be masked out.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6092 c046a42c-6fe2-441c-8c8c-71466251a162
hw/pci.c
hw/pci.h