| commit | 533d177a98c5f73ba34fd04bf232fac1f44cf168 | |
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | |
| Sat, 7 Mar 2009 22:10:28 +0000 (7 22:10 +0000) | ||
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | |
| Sat, 7 Mar 2009 22:10:28 +0000 (7 22:10 +0000) | ||
| tree | 81e34aaf24b7e726cf6601c2f8b240088e000147 | treesnapshot (tar.gz zip) |
| parent | d2c753454eadaf82027c634247554533b8e3544c | commitdiff |
Fix correct reset value for ARM CP15 c1 auxiliary control register
According to ARM Cortex A8 Technical Reference Manual, the reset value for CP15 c1 auxiliary control
register is 2, not zero (page 3.12).
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6771 c046a42c-6fe2-441c-8c8c-71466251a162
According to ARM Cortex A8 Technical Reference Manual, the reset value for CP15 c1 auxiliary control
register is 2, not zero (page 3.12).
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6771 c046a42c-6fe2-441c-8c8c-71466251a162
| target-arm/helper.c | diffblobblamehistory |