From f38b81d43bc780c1ecdf4e36787fd3f357786bc3 Mon Sep 17 00:00:00 2001
From: Michel Pollet <buserror@gmail.com>
Date: Sun, 1 Mar 2009 13:17:52 +0000
Subject: [PATCH] [NAND] Added readraw() to read underlying data storage

s3c2440 reads 4KB of NAND to it's internal SRAM and run that. This
accessor allows to load data from the nand without banging the
registers.
---
 hw/flash.h |  1 +
 hw/nand.c  | 16 ++++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/hw/flash.h b/hw/flash.h
index faba93d7e1..29053e8427 100644
--- a/hw/flash.h
+++ b/hw/flash.h
@@ -25,6 +25,7 @@ void nand_setpins(struct nand_flash_s *s,
 void nand_getpins(struct nand_flash_s *s, int *rb);
 void nand_setio(struct nand_flash_s *s, uint8_t value);
 uint8_t nand_getio(struct nand_flash_s *s);
+uint32_t nand_readraw(struct nand_flash_s *s, uint32_t offset, void * dst, uint32_t length);
 
 #define NAND_MFR_TOSHIBA	0x98
 #define NAND_MFR_SAMSUNG	0xec
diff --git a/hw/nand.c b/hw/nand.c
index e73a1b8a80..e29d6403d9 100644
--- a/hw/nand.c
+++ b/hw/nand.c
@@ -319,6 +319,22 @@ static int nand_load(QEMUFile *f, void *opaque, int version_id)
     return 0;
 }
 
+uint32_t nand_readraw(struct nand_flash_s *s, uint32_t offset, void * dst, uint32_t length)
+{
+	if (s->bdrv) {
+        if (bdrv_pread(s->bdrv, offset, dst, length) == -1) {
+            printf("%s: read error in offset %i\n", __FUNCTION__, offset);
+            return 0;
+        }
+        return length;
+	}
+	if (s->storage) {
+		memcpy((uint8_t*)dst, s->storage + offset, length);
+		return length;
+	}
+	return 0;
+}
+
 /*
  * Chip inputs are CLE, ALE, CE, WP, GND and eight I/O pins.  Chip
  * outputs are R/B and eight I/O pins.
-- 
2.11.4.GIT