From c5ca40b012c5bf331b08ef571d39899ae4e54c57 Mon Sep 17 00:00:00 2001
From: Michel <michel.pollet@peavey-eu.com>
Date: Mon, 23 Feb 2009 12:47:06 +0000
Subject: [PATCH] [S3C] Updated to compile with modern qemu

Mostly no straight functional change, removed a million warnings
---
 hw/s3c.h          |  4 ++--
 hw/s3c2410.c      | 63 +++++++++++++++++++++++++++++--------------------------
 hw/s3c24xx_lcd.c  |  8 +++----
 hw/s3c24xx_mmci.c | 19 +++++++++--------
 hw/s3c24xx_rtc.c  |  8 +++++--
 hw/s3c24xx_udc.c  |  7 ++++---
 6 files changed, 59 insertions(+), 50 deletions(-)

diff --git a/hw/s3c.h b/hw/s3c.h
index 870bed0f88..29bc1a98c1 100644
--- a/hw/s3c.h
+++ b/hw/s3c.h
@@ -158,7 +158,7 @@ void s3c_lcd_reset(struct s3c_lcd_state_s *s);
 /* s3c24xx_mmci.c */
 struct s3c_mmci_state_s;
 struct s3c_mmci_state_s *s3c_mmci_init(target_phys_addr_t base, uint16_t model,
-                struct sd_card_s *mmc, qemu_irq irq, qemu_irq *dma);
+		SDState *mmc, qemu_irq irq, qemu_irq *dma);
 void s3c_mmci_reset(struct s3c_mmci_state_s *s);
 
 /* s3c24xx_rtc.c */
@@ -220,7 +220,7 @@ struct s3c_state_s {
 
 /* s3c2410.c */
 struct s3c_state_s *s3c2410_init(unsigned int sdram_size, DisplayState *ds,
-                struct sd_card_s *mmc);
+		SDState *mmc);
 void s3c_nand_register(struct s3c_state_s *s, struct nand_flash_s *chip);
 void s3c_nand_setwp(struct s3c_state_s *s, int wp);
 
diff --git a/hw/s3c2410.c b/hw/s3c2410.c
index 656c40dbc9..10e47c29e4 100644
--- a/hw/s3c2410.c
+++ b/hw/s3c2410.c
@@ -15,6 +15,7 @@
 #include "devices.h"
 #include "arm-misc.h"
 #include "i2c.h"
+#include "pxa.h"
 #include "sysemu.h"
 
 /* Interrupt controller */
@@ -233,7 +234,7 @@ static uint32_t s3c_pic_read(void *opaque, target_phys_addr_t addr)
     case S3C_INTSUBMSK:
         return s->intsubmsk;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -280,7 +281,7 @@ static void s3c_pic_write(void *opaque, target_phys_addr_t addr,
         s3c_pic_subupdate(s);
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -392,7 +393,7 @@ static uint32_t s3c_mc_read(void *opaque, target_phys_addr_t addr)
     case S3C_BWSCON ... S3C_MRSRB7:
         return s->mc_regs[addr >> 2];
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -409,7 +410,7 @@ static void s3c_mc_write(void *opaque, target_phys_addr_t addr,
         s->mc_regs[addr >> 2] = value;
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -493,7 +494,7 @@ static uint32_t s3c_nand_read(void *opaque, target_phys_addr_t addr)
             0xff;
 #undef ECC
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -534,7 +535,7 @@ static void s3c_nand_write(void *opaque, target_phys_addr_t addr,
             nand_setio(s->nand, ecc_digest(&s->nfecc, value & 0xff));
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -608,7 +609,7 @@ static uint32_t s3c_clkpwr_read(void *opaque, target_phys_addr_t addr)
     case S3C_LOCKTIME ... S3C_CLKDIVN:
         return s->clkpwr_regs[addr >> 2];
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -651,7 +652,7 @@ static void s3c_clkpwr_write(void *opaque, target_phys_addr_t addr,
         s->clkpwr_regs[addr >> 2] = value;
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -839,7 +840,7 @@ static uint32_t s3c_dma_read(void *opaque, target_phys_addr_t addr)
     case S3C_DMASKTRIG:
         return ch->mask;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -888,7 +889,7 @@ static void s3c_dma_write(void *opaque, target_phys_addr_t addr,
         }
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -1126,7 +1127,7 @@ static uint32_t s3c_timers_read(void *opaque, target_phys_addr_t addr)
     case S3C_TCNTO0:
         return s3c_timers_get(s, tm);
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -1182,7 +1183,7 @@ static void s3c_timers_write(void *opaque, target_phys_addr_t addr,
         s->countb[tm] = value & 0xffff;
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -1501,7 +1502,7 @@ static uint32_t s3c_uart_read(void *opaque, target_phys_addr_t addr)
     case S3C_UBRDIV:
         return s->brdiv;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -1539,11 +1540,13 @@ static void s3c_uart_write(void *opaque, target_phys_addr_t addr,
         s3c_uart_update(s);
         break;
     case S3C_UMCON:
+#ifdef CONFIG_S3C_MODEM		/* not handled, openmoko modem.c not imported */
         if ((s->mcontrol ^ value) & (1 << 4)) {
             afc = (value >> 4) & 1;
             for (i = 0; i < s->chr_num; i ++)
                 qemu_chr_ioctl(s->chr[i], CHR_IOCTL_MODEM_HANDSHAKE, &afc);
         }
+#endif
         s->mcontrol = value & 0x11;
         s3c_uart_update(s);
         break;
@@ -1560,7 +1563,7 @@ static void s3c_uart_write(void *opaque, target_phys_addr_t addr,
         s3c_uart_update(s);
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -1748,7 +1751,7 @@ static uint32_t s3c_adc_read(void *opaque, target_phys_addr_t addr)
     case S3C_ADCDAT1:
         return ((!s->down) << 15) | s->ydata;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -1779,7 +1782,7 @@ static void s3c_adc_write(void *opaque, target_phys_addr_t addr,
         s->delay = value & 0xffff;
 
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -2010,7 +2013,7 @@ static uint32_t s3c_i2c_read(void *opaque, target_phys_addr_t addr)
     case S3C_IICDS:
         return s->data;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -2047,7 +2050,7 @@ static void s3c_i2c_write(void *opaque, target_phys_addr_t addr,
         break;
 
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -2074,7 +2077,7 @@ static void s3c_i2c_save(QEMUFile *f, void *opaque)
     qemu_put_be32(f, s->busy);
     qemu_put_be32(f, s->newstart);
 
-    i2c_bus_save(f, s->bus);
+//    i2c_bus_save(f, s->bus);
     i2c_slave_save(f, &s->slave);
 }
 
@@ -2089,7 +2092,7 @@ static int s3c_i2c_load(QEMUFile *f, void *opaque, int version_id)
     s->busy = qemu_get_be32(f);
     s->newstart = qemu_get_be32(f);
 
-    i2c_bus_load(f, s->bus);
+//    i2c_bus_load(f, s->bus);
     i2c_slave_load(f, &s->slave);
     return 0;
 }
@@ -2221,7 +2224,7 @@ static uint32_t s3c_spi_read(void *opaque, target_phys_addr_t addr)
         return s->chan[ch].rxbuf;
 
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -2261,7 +2264,7 @@ static void s3c_spi_write(void *opaque, target_phys_addr_t addr,
         break;
 
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -2503,7 +2506,7 @@ static uint32_t s3c_i2s_read(void *opaque, target_phys_addr_t addr)
                 return s->buffer;
         }
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -2543,7 +2546,7 @@ static void s3c_i2s_write(void *opaque, target_phys_addr_t addr,
         }
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -2697,7 +2700,7 @@ static uint32_t s3c_wdt_read(void *opaque, target_phys_addr_t addr)
         s3c_wdt_stop(s);
         return s->count;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -2723,7 +2726,7 @@ static void s3c_wdt_write(void *opaque, target_phys_addr_t addr,
         s3c_wdt_start(s);
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -2809,7 +2812,7 @@ static struct {
 };
 
 /* General CPU reset */
-void s3c2410_reset(void *opaque)
+static void s3c2410_reset(void *opaque)
 {
     struct s3c_state_s *s = (struct s3c_state_s *) opaque;
     int i;
@@ -2836,14 +2839,14 @@ void s3c2410_reset(void *opaque)
 
 /* Initialise an S3C2410A microprocessor.  */
 struct s3c_state_s *s3c2410_init(unsigned int sdram_size, DisplayState *ds,
-                struct sd_card_s *mmc)
+		SDState *mmc)
 {
     struct s3c_state_s *s;
     int iomemtype, i;
     s = (struct s3c_state_s *) qemu_mallocz(sizeof(struct s3c_state_s));
 
     s->env = cpu_init("arm920t");
-    register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION,
+    register_savevm("s3c2410", 0, 0,
                     cpu_save, cpu_load, s->env);
 
     cpu_register_physical_memory(S3C_RAM_BASE, sdram_size,
@@ -2915,7 +2918,7 @@ struct s3c_state_s *s3c2410_init(unsigned int sdram_size, DisplayState *ds,
                     s->irq[S3C_PIC_SDI], s->drq);
 
     if (usb_enabled) {
-        usb_ohci_init_memio(0x49000000, 3, -1, s->irq[S3C_PIC_USBH]);
+        usb_ohci_init_pxa(0x49000000, 3, -1, s->irq[S3C_PIC_USBH]);
     }
 
     qemu_register_reset(s3c2410_reset, s);
diff --git a/hw/s3c24xx_lcd.c b/hw/s3c24xx_lcd.c
index 8926aeab65..7d33c8d603 100644
--- a/hw/s3c24xx_lcd.c
+++ b/hw/s3c24xx_lcd.c
@@ -266,7 +266,7 @@ static inline void s3c_lcd_resize(struct s3c_lcd_state_s *s)
     if (s->width != new_width || s->height != new_height) {
         s->width = new_width;
         s->height = new_height;
-        dpy_resize(s->ds, s->width, s->height);
+   //     dpy_resize(s->ds, s->width, s->height);
         s->invalidate = 1;
     }
 }
@@ -304,7 +304,7 @@ uint32_t s3c_rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
 static inline uint32_t s3c_rgb(struct s3c_lcd_state_s *s,
                 unsigned int r, unsigned int g, unsigned b)
 {
-    switch (s->ds->depth) {
+    switch (ds_get_bits_per_pixel(s->ds)) {
     case 8:
         return s3c_rgb_to_pixel32(r << 2, g << 2, b << 2);
     case 15:
@@ -413,7 +413,7 @@ static void s3c_update_display(void *opaque)
     src = s->fb;
     src_width = s->src_width;
 
-    dest = s->ds->data;
+    dest = ds_get_data(s->ds);
     dest_width = s->width * s->dest_width;
 
     addr = (ram_addr_t) (s->fb - (void *) phys_ram_base);
@@ -551,7 +551,7 @@ struct s3c_lcd_state_s *s3c_lcd_init(target_phys_addr_t base, DisplayState *ds,
 
     register_savevm("s3c24xx_lcd", 0, 0, s3c_lcd_save, s3c_lcd_load, s);
 
-    switch (s->ds->depth) {
+    switch (ds_get_bits_per_pixel(s->ds)) {
     case 0:
         s->dest_width = 0;
         break;
diff --git a/hw/s3c24xx_mmci.c b/hw/s3c24xx_mmci.c
index ad9dcc0348..348524767a 100644
--- a/hw/s3c24xx_mmci.c
+++ b/hw/s3c24xx_mmci.c
@@ -16,7 +16,7 @@ struct s3c_mmci_state_s {
     qemu_irq irq;
     qemu_irq *dma;
 
-    struct sd_card_s *card;
+    SDState *card;
 
     int blklen;
     int blknum;
@@ -288,7 +288,7 @@ static uint32_t s3c_mmci_readw(void *opaque, target_phys_addr_t addr)
         return s->mask;
     default:
     bad_reg:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long int)addr);
         break;
     }
     return 0;
@@ -361,7 +361,7 @@ static void s3c_mmci_writew(void *opaque, target_phys_addr_t addr,
         break;
     default:
     bad_reg:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long int)addr);
     }
 }
 
@@ -384,7 +384,7 @@ static uint32_t s3c_mmci_readh(void *opaque, target_phys_addr_t addr)
         return ret;
     }
 
-    printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr - s->base);
+    printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long int)(addr - s->base));
     return 0;
 }
 
@@ -398,7 +398,7 @@ static void s3c_mmci_writeh(void *opaque, target_phys_addr_t addr,
         s->fifo[(s->fifostart + s->fifolen ++) & 63] = (value >> 8) & 0xff;
         s3c_mmci_fifo_run(s);
     } else
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr - s->base);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long int)(addr - s->base));
 }
 
 static uint32_t s3c_mmci_readb(void *opaque, target_phys_addr_t addr)
@@ -418,7 +418,7 @@ static uint32_t s3c_mmci_readb(void *opaque, target_phys_addr_t addr)
         return ret;
     }
 
-    printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr - s->base);
+    printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long int)(addr - s->base));
     return 0;
 }
 
@@ -431,7 +431,7 @@ static void s3c_mmci_writeb(void *opaque, target_phys_addr_t addr,
         s->fifo[(s->fifostart + s->fifolen ++) & 63] = value;
         s3c_mmci_fifo_run(s);
     } else
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr - s->base);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long int)(addr - s->base));
 }
 
 static CPUReadMemoryFunc *s3c_mmci_readfn[] = {
@@ -559,7 +559,7 @@ static int s3c_mmci_load(QEMUFile *f, void *opaque, int version_id)
 }
 
 struct s3c_mmci_state_s *s3c_mmci_init(target_phys_addr_t base, uint16_t model,
-                struct sd_card_s *mmc, qemu_irq irq, qemu_irq *dma)
+		SDState *mmc, qemu_irq irq, qemu_irq *dma)
 {
     int iomemtype;
     struct s3c_mmci_state_s *s;
@@ -587,7 +587,8 @@ struct s3c_mmci_state_s *s3c_mmci_init(target_phys_addr_t base, uint16_t model,
         exit(-1);
     }
 
-    mmc->irq = qemu_allocate_irqs(s3c_mmci_cardirq, s, 1)[0];
+    sd_set_cb(mmc, 0, qemu_allocate_irqs(s3c_mmci_cardirq, s, 1)[0]);
+    //mmc->irq = qemu_allocate_irqs(s3c_mmci_cardirq, s, 1)[0];
 
     s3c_mmci_reset(s);
 
diff --git a/hw/s3c24xx_rtc.c b/hw/s3c24xx_rtc.c
index e348b20618..bae17d5823 100644
--- a/hw/s3c24xx_rtc.c
+++ b/hw/s3c24xx_rtc.c
@@ -80,12 +80,16 @@ static void s3c_rtc_hz(void *opaque)
 
 static void s3c_rtc_update(struct s3c_rtc_state_s *s)
 {
+#if 1
+	qemu_get_timedate(&s->tm, 0);
+#else
     void *ret;
     time_t ti = s->sec;
     if (rtc_utc)
         ret = gmtime_r(&ti, &s->tm);
     else
         ret = localtime_r(&ti, &s->tm);
+#endif
 }
 
 static inline uint32_t to_bcd(int val)
@@ -168,7 +172,7 @@ static uint32_t s3c_rtc_read(void *opaque, target_phys_addr_t addr)
         s3c_rtc_update(s);
         return to_bcd(s->tm.tm_year % 100);
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -256,7 +260,7 @@ static void s3c_rtc_write(void *opaque, target_phys_addr_t addr,
         s->sec += diff * 60 * 60 * 24 * 365;
         break;
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
diff --git a/hw/s3c24xx_udc.c b/hw/s3c24xx_udc.c
index b0a372cd83..7303911ad4 100644
--- a/hw/s3c24xx_udc.c
+++ b/hw/s3c24xx_udc.c
@@ -337,7 +337,7 @@ static uint32_t s3c_udc_read(void *opaque, target_phys_addr_t addr)
         return (s->ep1[ep].dma_size >> 16) & 0xf;
     bad_reg:
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
         break;
     }
     return 0;
@@ -510,7 +510,7 @@ static void s3c_udc_write(void *opaque, target_phys_addr_t addr,
 
     bad_reg:
     default:
-        printf("%s: Bad register 0x%lx\n", __FUNCTION__, addr);
+        printf("%s: Bad register 0x%lx\n", __FUNCTION__, (unsigned long)addr);
     }
 }
 
@@ -756,7 +756,8 @@ struct s3c_udc_state_s *s3c_udc_init(target_phys_addr_t base,
 
     register_savevm("s3c24xx_udc", 0, 0, s3c_udc_save, s3c_udc_load, s);
 
-    qemu_register_usb_gadget(&s->dev);
+    // TODO import usb gadget code from openmoko
+//    qemu_register_usb_gadget(&s->dev);
 
     return s;
 }
-- 
2.11.4.GIT