| commit | fea8a08e1691a22cdf379dfb32ac3e64648c72b7 | |
| author | Jens Wiklander <jens.wiklander@linaro.org> | |
| Mon, 6 Jun 2016 15:59:29 +0000 (6 16:59 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 6 Jun 2016 15:59:29 +0000 (6 16:59 +0100) | ||
| tree | 654717c506e6994849dc915e37b388182220511b | treesnapshot (tar.gz zip) |
| parent | e40c3d2e7f4b58669a1b4e5dfb684e57c0bf62ce | commitdiff |
hw/intc/gic: RAZ/WI non-sec access to sec interrupts
Treat non-secure accesses to registers and bits in registers of secure
interrupts as RAZ/WI.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Message-id: 1464273945-2055-1-git-send-email-jens.wiklander@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Treat non-secure accesses to registers and bits in registers of secure
interrupts as RAZ/WI.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Message-id: 1464273945-2055-1-git-send-email-jens.wiklander@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/intc/arm_gic.c | diffblobblamehistory |