| commit | 0a54d68e212a17ae347f40488acef69e63b7bbb4 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Wed, 23 Oct 2019 15:00:44 +0000 (23 11:00 -0400) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 24 Oct 2019 16:16:28 +0000 (24 17:16 +0100) | ||
| tree | 94cdfae6910bc5ba6cefc3f8a5332c752dc3aa2f | treesnapshot (tar.gz zip) |
| parent | 60e12c3776a03a0535fcd4f4ea3eba8f60c0ab6e | commitdiff |
target/arm: Hoist computation of TBFLAG_A32.VFPEN
There are 3 conditions that each enable this flag. M-profile always
enables; A-profile with EL1 as AA64 always enables. Both of these
conditions can easily be cached. The final condition relies on the
FPEXC register which we are not prepared to cache.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191023150057.25731-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
There are 3 conditions that each enable this flag. M-profile always
enables; A-profile with EL1 as AA64 always enables. Both of these
conditions can easily be cached. The final condition relies on the
FPEXC register which we are not prepared to cache.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191023150057.25731-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/cpu.h | diffblobblamehistory | |
| target/arm/helper.c | diffblobblamehistory |