target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0
commitfdb8665672ded05f650d18f8b62d5c8524b4385b
authorWei Huang <wei@redhat.com>
Fri, 10 Feb 2017 17:40:28 +0000 (10 17:40 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 10 Feb 2017 17:40:28 +0000 (10 17:40 +0000)
tree133faa75882fee6ca77cb4b0ad1b1b1b1aa58dff
parent6b0407805d46bbeba70f4be426285d0a0e669750
target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0

In order to support Linux perf, which uses PMXEVTYPER register,
this patch adds read/write access support for PMXEVTYPER. The access
is CONSTRAINED UNPREDICTABLE when PMSELR is not 0x1f. Additionally
this patch adds support for PMXEVTYPER_EL0.

Signed-off-by: Wei Huang <wei@redhat.com>
Message-id: 1486504171-26807-3-git-send-email-wei@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h
target/arm/helper.c