| commit | d1a721ab816d1b954c0988aafdec4e109b953a9f | |
| author | Alexey Kardashevskiy <aik@ozlabs.ru> | |
| Wed, 4 Jun 2014 12:50:55 +0000 (4 22:50 +1000) | ||
| committer | Alexander Graf <agraf@suse.de> | |
| Mon, 16 Jun 2014 11:24:44 +0000 (16 13:24 +0200) | ||
| tree | dcb64980cc93a87f9b3319f1321f79b7302b9b5f | treesnapshot (tar.gz zip) |
| parent | a242881405811ec6e6134452311f1cd1896c8ada | commitdiff |
target-ppc: Add POWER8's TIR SPR
This adds TIR (Thread Identification Register) SPR first defined for server
CPUs in PowerISA 2.07.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This adds TIR (Thread Identification Register) SPR first defined for server
CPUs in PowerISA 2.07.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| target-ppc/cpu.h | diffblobblamehistory | |
| target-ppc/translate_init.c | diffblobblamehistory |