target/arm: Correct load exclusive pair atomicity
commit19514cde3b92938df750acaecf2caaa85e1d36a6
authorRichard Henderson <richard.henderson@linaro.org>
Tue, 15 Aug 2017 14:57:13 +0000 (15 07:57 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 15 Aug 2017 16:38:44 +0000 (15 17:38 +0100)
treeca26a263a22297b65fdc066d756348394e0283e2
parent955fd0ad5d610f62ba2f4ce46a872bf50434dcf8
target/arm: Correct load exclusive pair atomicity

We are not providing the required single-copy atomic semantics for
the 64-bit operation that is the 32-bit paired load.

At the same time, leave the entire 64-bit value in cpu_exclusive_val
and stop writing to cpu_exclusive_high.  This means that we do not
have to re-assemble the 64-bit quantity when it comes time to store.

At the same time, drop a redundant temporary and perform all loads
directly into the cpu_exclusive_* globals.

Tested-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20170815145714.17635-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/translate-a64.c