| commit | 0584d3c33f70445085d3f223015c67dfcea97ba3 | |
| author | Cédric Le Goater <clg@kaod.org> | |
| Tue, 27 Dec 2016 14:59:28 +0000 (27 14:59 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 27 Dec 2016 14:59:28 +0000 (27 14:59 +0000) | ||
| tree | 977c6c12575f8971e015efa1fb6fcbbec7d9749c | treesnapshot (tar.gz zip) |
| parent | c491e1521f20a44517c68ea920f10c03b864c140 | commitdiff |
aspeed/smc: improve segment register support
The HW does not enforce all the rules in the specs and allows a few
"curious" setups like zero size segments and overlaps. So change the
model to be in sync but keep the warnings which are always interesting
for debug.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 1480434248-27138-13-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The HW does not enforce all the rules in the specs and allows a few
"curious" setups like zero size segments and overlaps. So change the
model to be in sync but keep the warnings which are always interesting
for debug.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 1480434248-27138-13-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/ssi/aspeed_smc.c | diffblobblamehistory |